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kunlun/plc/halmac/inc/mac_desc_engine.h
andy c756587541 初始提交
2024-09-28 14:24:04 +08:00

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/****************************************************************************
Copyright(c) 2019 by Aerospace C.Power (Chongqing) Microelectronics. ALL RIGHTS RESERVED.
This Information is proprietary to Aerospace C.Power (Chongqing) Microelectronics and MAY NOT
be copied by any method or incorporated into another program without
the express written consent of Aerospace C.Power. This Information or any portion
thereof remains the property of Aerospace C.Power. The Information contained herein
is believed to be accurate and Aerospace C.Power assumes no responsibility or
liability for its use in any way and conveys no license or title under
any patent or copyright and makes no representation or warranty that this
Information is free from patent or copyright infringement.
****************************************************************************/
#ifndef MAC_DESC_ENGINE_H
#define MAC_DESC_ENGINE_H
#include "os_types.h"
#include "iot_mem_pool.h"
#include "command_list.h"
#include "plc_protocol.h"
#include "plc_const.h"
#include "mac_peer.h"
#include "mac_rf_hwq_mgr.h"
#include "hw_war.h"
#ifdef __cplusplus
extern "C" {
#endif
#define PLC_ROAM_PEER_RESV 16
#define PLC_SELF_PEER_RESV 3
/* mac tei bitmap size in the view of peer type occupy peer size */
#define PLC_MAC_TEI_BITMAP_OCCUPY (MAC_TEI_MAP_BYTE_LEN \
/ sizeof(mac_peer_t))
/* the param constrols how many peers could be directly conncted */
#if PLC_SUPPORT_CCO_ROLE
/* CCo */
#if RUN_IN_PSRAM
#if (IOT_PSRAM_SIZE >= 4)
#define PLC_MAC_PEER_POOL_SIZE PLC_TEI_MAX_NUM
/* rx pb desc should responding to the sub peer number */
#define PLC_RX_PB_POOL_SIZE (PLC_MAC_PEER_POOL_SIZE * 2)
/* cco stream peer:stream 1:8 */
#define PLC_MAC_STREAM_POOL_SIZE (PLC_MAC_PEER_POOL_SIZE * 8)
#else /* (IOT_PSRAM_SIZE >= 4) */
#define PLC_MAC_PEER_POOL_SIZE PLC_TEI_MAX_NUM
/* rx pb desc should responding to the sub peer number */
#define PLC_RX_PB_POOL_SIZE (PLC_MAC_PEER_POOL_SIZE * 2)
/* cco stream peer:stream 1:6 */
#define PLC_MAC_STREAM_POOL_SIZE (PLC_MAC_PEER_POOL_SIZE * 6)
#endif /* (IOT_PSRAM_SIZE >= 4) */
#else /* RUN_IN_PSRAM */
#define PLC_MAC_PEER_POOL_SIZE PLC_TEI_MAX_NUM
/* rx pb desc should responding to the sub peer number */
#define PLC_RX_PB_POOL_SIZE (PLC_MAC_PEER_POOL_SIZE * 1)
/* cco stream peer:stream 1:3 */
#define PLC_MAC_STREAM_POOL_SIZE (PLC_MAC_PEER_POOL_SIZE * 3)
#endif /* RUN_IN_PSRAM */
#else /* PLC_SUPPORT_CCO_ROLE */
/* PCO */
#define PLC_MAC_PEER_POOL_SIZE (PLC_PCO_MAX_D_SUB_STA \
+ PLC_ROAM_PEER_RESV \
+ PLC_SELF_PEER_RESV \
- PLC_MAC_TEI_BITMAP_OCCUPY)
/* rx pb desc should responding to the sub peer number */
#define PLC_RX_PB_POOL_SIZE (PLC_MAC_PEER_POOL_SIZE)
/* sta stream peer:stream 1:2.5 */
#define PLC_MAC_STREAM_POOL_SIZE (PLC_MAC_PEER_POOL_SIZE * 5 / 2)
#endif /* PLC_SUPPORT_CCO_ROLE */
/* SWQ depth related to buf num */
#define PLC_MAC_MSDU_FRAME_POOL_SIZE min(PLC_SMALL_TX_BUF_COUNT, \
PLC_SHORT_TX_BUF_COUNT)
/* token total cnt : 3/4 of SWQ depth buf num */
#define PLC_MAC_SWQ_DEPTH (PLC_MAC_MSDU_FRAME_POOL_SIZE - \
(PLC_MAC_MSDU_FRAME_POOL_SIZE >> 2))
/* msdu in hwq : should be less than tx buf num
* use half of tx buf temply
*/
#define PLC_MAC_MSDU_POOL_SIZE (PLC_MAC_MSDU_FRAME_POOL_SIZE / 2)
/* tx_mpdu desc num in hwq:
* need consider the swq depth, set to each msdu one mpdu temply */
#define PLC_TX_MPDU_POOL_SIZE (PLC_MAC_MSDU_POOL_SIZE / 2 * 3)
/* contains tx mpdu start desc in the msdu desc */
#define PLC_TX_MPDU_START_POOL_SIZE \
(PLC_TX_MPDU_POOL_SIZE - PLC_MAC_MSDU_POOL_SIZE)
#define PLC_TX_MPDU_END_POOL_SIZE PLC_TX_MPDU_POOL_SIZE
#define PLC_TX_PB_POOL_SIZE (PLC_TX_MPDU_POOL_SIZE * 2)
/* the amount left for 3phase tx beacon */
#define PLC_TX_DUMMY_LEFT 3
#define PLC_SCHED_CMD_LIST_POOL_SIZE HW_SCHED_QUEUE_DEPTH
#define PLC_TX_DUMMY_POOL_SIZE (MAC_QUE_NUM + PLC_TX_DUMMY_LEFT)
/* number of bound CSMA tokens */
#define PLC_MAC_CSMA_TOKEN_NUM (PLC_MAC_SWQ_DEPTH - \
PLC_TDMA_TOKEN_NUM - \
PLC_BCSMA_TOKEN_NUM)
/* rf config */
#if HPLC_RF_DEV_SUPPORT
/* SWQ depth related to buf num */
#define RF_MAC_MSDU_FRAME_POOL_SIZE min(RF_SMALL_TX_BUF_COUNT, \
RF_SHORT_TX_BUF_COUNT)
/* msdu in hwq : should be less than tx buf num
* use half of tx buf temply
*/
#define RF_MAC_MSDU_POOL_SIZE (RF_MAC_MSDU_FRAME_POOL_SIZE / 2)
/* tx_mpdu desc num in hwq:
* need consider the swq depth, set to each msdu one mpdu temply */
#define RF_TX_MPDU_POOL_SIZE (RF_MAC_MSDU_POOL_SIZE / 2 * 3)
/* contains tx mpdu start desc in the msdu desc */
#define RF_TX_MPDU_START_POOL_SIZE \
(RF_TX_MPDU_POOL_SIZE - RF_MAC_MSDU_POOL_SIZE)
#define RF_TX_MPDU_END_POOL_SIZE RF_TX_MPDU_POOL_SIZE
#define RF_TX_PB_POOL_SIZE RF_TX_MPDU_POOL_SIZE
#define RF_SCHED_CMD_LIST_POOL_SIZE HW_SCHED_QUEUE_DEPTH
#define RF_TX_DUMMY_POOL_SIZE (RF_TX_MPDU_POOL_SIZE / 2)
#define RF_MAC_STREAM_POOL_SIZE PLC_MAC_STREAM_POOL_SIZE
#else /* HPLC_RF_DEV_SUPPORT */
/* SWQ depth related to buf num */
#define RF_MAC_MSDU_FRAME_POOL_SIZE 0
/* msdu in hwq */
#define RF_MAC_MSDU_POOL_SIZE 0
/* tx_mpdu desc num in hwq */
#define RF_TX_MPDU_POOL_SIZE 0
#define RF_TX_MPDU_START_POOL_SIZE 0
#define RF_TX_MPDU_END_POOL_SIZE 0
#define RF_TX_PB_POOL_SIZE 0
#define RF_SCHED_CMD_LIST_POOL_SIZE 0
#define RF_TX_DUMMY_POOL_SIZE 0
#define RF_MAC_STREAM_POOL_SIZE 0
#endif /* HPLC_RF_DEV_SUPPORT */
#if ENA_RF_ONLY_ONE_CSMA_HWQ
/* rf csma beacon num */
#define RF_MAC_CSMA_BCN_NUM 0
#else
/* rf csma beacon num */
#define RF_MAC_CSMA_BCN_NUM 1
#endif
#define RF_MAC_PEER_POOL_SIZE 0 /* rf peer reuse plc peer */
#define RF_RX_PB_POOL_SIZE 0 /* rf only one pb */
/* token total cnt : 3/4 of SWQ depth buf num */
#define RF_MAC_SWQ_DEPTH (RF_MAC_MSDU_FRAME_POOL_SIZE - \
(RF_MAC_MSDU_FRAME_POOL_SIZE >> 2))
#define RF_MAC_CSMA_TOKEN_NUM (RF_MAC_SWQ_DEPTH - \
RF_TDMA_TOKEN_NUM - \
RF_BCSMA_TOKEN_NUM - \
RF_MAC_CSMA_BCN_NUM)
typedef enum _mac_desc_pool_type {
PLC_MAC_MSDU_POOL,
PLC_MAC_PEER_POOL,
PLC_MAC_STREAM_POOL,
PLC_TX_MPDU_START_POOL,
PLC_TX_MPDU_END_POOL,
PLC_TX_PB_START_POOL,
PLC_RX_PB_DESC_POOL,
PLC_SCHED_CMD_LIST_POOL,
PLC_TX_DUMMY_NODE_POOL,
PLC_MAC_MSDU_FRAME_POOL,
MAX_PLC_DESC_POOL_NUM
} mac_desc_pool_type_t;
typedef struct _mac_desc_pool_cfg {
/* mac_desc_pool_type_t desc_type; */
uint32_t desc_num;
uint32_t desc_size;
} mac_desc_pool_cfg_t;
typedef struct _mac_desc_cfg {
uint32_t mac_desc_num[MAX_PLC_DESC_POOL_NUM];
} mac_desc_cfg_t;
typedef struct _mac_desc_engine {
iot_mem_pool_t mem_pool[MAX_PLC_DESC_POOL_NUM];
uint32_t used[MAX_PLC_DESC_POOL_NUM];
os_mutex_h mutex[MAX_PLC_DESC_POOL_NUM];
#if PLC_MEM_ALLOC_STAT > 1
uint32_t desc_req_cnt;
#endif
uint32_t free_num_min[MAX_PLC_DESC_POOL_NUM];
} mac_desc_engine_t;
extern mac_desc_engine_t g_mac_desc_eng;
/* init the global mac desc node
* return 0 if successful
*/
uint32_t mac_desc_engine_init(
mac_desc_engine_t *desc_eng, \
mac_desc_pool_cfg_t *cfg
);
/* dump mac desc info
* desc_ptr (OUT) - the desc gotten if return 0
*/
void mac_desc_info_dump(mac_desc_engine_t *desc_eng);
/* dump mac desc info to flash immediately
* desc_ptr (OUT) - the desc gotten if return 0
*/
void mac_desc_info_dump_force(mac_desc_engine_t *desc_eng);
/* alloc a desc as requested type
* return 0 if success
* desc_ptr (OUT) - the desc gotten if return 0
*/
uint32_t mac_desc_get(mac_desc_engine_t *desc_eng, \
mac_desc_pool_type_t desc_type, \
void **desc_ptr
);
/* free a desc as requested type
* return 0 if success, other for error
*/
uint32_t mac_desc_free(mac_desc_engine_t *desc_eng, \
mac_desc_pool_type_t desc_type, void *desc_ptr);
/**
*@brief mac_check_peer_stream_desc mac check peer stream cnt
*@return void
*/
void mac_check_peer_stream_desc();
/* Flow control for msdu sending */
enum {
CSMA0_TOKEN_BUCKET_IDX,
CSMA1_TOKEN_BUCKET_IDX,
CSMA2_TOKEN_BUCKET_IDX,
CSMA3_TOKEN_BUCKET_IDX,
BCSMA_TOKEN_BUCKET_IDX,
TDMA_TOKEN_BUCKET_IDX ,
TOKEN_BUCKET_IDX_MAX,
};
typedef uint16_t token_num_t;
extern token_num_t g_mac_token_bucket[TOKEN_BUCKET_IDX_MAX];
#if HPLC_RF_DEV_SUPPORT
extern token_num_t g_rf_mac_token_bucket[TOKEN_BUCKET_IDX_MAX];
#endif
extern void mac_token_bucket_init();
#ifdef __cplusplus
}
#endif
#endif // !MAC_DESC_ENGINE_H
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