40 lines
		
	
	
		
			1.4 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			40 lines
		
	
	
		
			1.4 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /****************************************************************************
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| 
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| Copyright(c) 2019 by Aerospace C.Power (Chongqing) Microelectronics. ALL RIGHTS RESERVED.
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| 
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| This Information is proprietary to Aerospace C.Power (Chongqing) Microelectronics and MAY NOT
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| be copied by any method or incorporated into another program without
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| the express written consent of Aerospace C.Power. This Information or any portion
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| thereof remains the property of Aerospace C.Power. The Information contained herein
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| is believed to be accurate and Aerospace C.Power assumes no responsibility or
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| liability for its use in any way and conveys no license or title under
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| any patent or copyright and makes no representation or warranty that this
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| Information is free from patent or copyright infringement.
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| 
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| ****************************************************************************/
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| #ifndef SBL_BOOT_HW_H
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| #define SBL_BOOT_HW_H
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| 
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| #include "chip_reg_base.h"
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| #include "iot_mem_org.h"
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| 
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| #ifdef __cplusplus
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| extern "C" {
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| #endif
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| 
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| /*address mapping. */
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| #define RAM_BASE_ADDRESS             (AHB_RAM0_BASEADDR)
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| #define RAM_END_ADDRESS              (AHB_RAM3_ENDADDR)
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| #define REG_BASE_ADDRESS             (APB_REG_LITE_BASEADDR)
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| #define REG_END_ADDRESS              (ICACHE2_SMC_RAM_BASEADDR - 1)
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| 
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| //LZMA decompress address
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| #define LZMA_BUF_ADDR        MEM_CFG_DECOMPRESS_RAM
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| #define LZMA_BUF_SIZE        MEM_CFG_DECOMPRESS_RAM_SIZE
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| 
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| #ifdef __cplusplus
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| }
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| #endif
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| 
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| #endif //SBL_BOOT_HW_H
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