660 lines
20 KiB
C
Executable File
660 lines
20 KiB
C
Executable File
/****************************************************************************
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Copyright(c) 2019 by Aerospace C.Power (Chongqing) Microelectronics. ALL RIGHTS RESERVED.
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This Information is proprietary to Aerospace C.Power (Chongqing) Microelectronics and MAY NOT
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be copied by any method or incorporated into another program without
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the express written consent of Aerospace C.Power. This Information or any portion
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thereof remains the property of Aerospace C.Power. The Information contained herein
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is believed to be accurate and Aerospace C.Power assumes no responsibility or
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liability for its use in any way and conveys no license or title under
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any patent or copyright and makes no representation or warranty that this
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Information is free from patent or copyright infringement.
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****************************************************************************/
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#include "iot_config.h"
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#include "os_types.h"
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#include "hw_reg_api.h"
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#include "phy_tmap.h"
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#include "phy_bb.h"
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#include "iot_errno_api.h"
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#include "phy_reg.h"
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#include "phy_tx_reg.h"
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#include "phy_rx_fd_reg.h"
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#include "phy_rxtd_reg.h"
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#include "hw_tonemask.h"
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#include "hw_tonemap.h"
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#include "iot_io.h"
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#include "phy_mix.h"
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#include "hw_phy_api.h"
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void phy_fft_4096p_init(bool_t en)
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{
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/* init */
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uint32_t tmp = 0;
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if(en == true) {
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/* 4096 point */
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tmp = PHY_READ_REG(CFG_BB_SAMPLING_RATE_ADDR);
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REG_FIELD_SET(SW_SAMPLING_RATE_SEL, tmp, 1);
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PHY_WRITE_REG(CFG_BB_SAMPLING_RATE_ADDR, tmp);
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tmp = PHY_READ_REG(CFG_BB_FCPLD_FFT_NUM_CTRT_ADDR);
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REG_FIELD_SET(SW_PLD_FFT_HALF_NUM, tmp, 2048);
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REG_FIELD_SET(SW_FC_FFT_HALF_NUM, tmp, 2048);
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PHY_WRITE_REG(CFG_BB_FCPLD_FFT_NUM_CTRT_ADDR, tmp);
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tmp = PHY_TX_READ_REG(CFG_BB_TX_CONST_CTRL_3_ADDR);
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REG_FIELD_SET(SW_IS_191_INSERT_PREAM, tmp, 255);
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PHY_TX_WRITE_REG(CFG_BB_TX_CONST_CTRL_3_ADDR, tmp);
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tmp = PHY_TX_READ_REG(CFG_BB_TX_CONST_CTRL_1_ADDR);
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REG_FIELD_SET(SW_IS_1535_INSERT_PREAM, tmp, 2047);
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PHY_TX_WRITE_REG(CFG_BB_TX_CONST_CTRL_1_ADDR, tmp);
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tmp = PHY_TX_READ_REG(CFG_BB_TX_CONST_CTRL_D_ADDR);
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REG_FIELD_SET(SW_SG_IFFT_POINT_NUM_HALF, tmp, 2048);
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REG_FIELD_SET(SW_SG_IFFT_POINT_NUM, tmp, 4096);
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PHY_TX_WRITE_REG(CFG_BB_TX_CONST_CTRL_D_ADDR, tmp);
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tmp = PHY_TX_READ_REG(CFG_BB_TX_CONST_CTRL_E_ADDR);
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REG_FIELD_SET(SW_GP_PREAM_IFFT_POINT_NUM_HALF, tmp, 256);
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REG_FIELD_SET(SW_GP_PREAM_IFFT_POINT_NUM, tmp, 512);
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PHY_TX_WRITE_REG(CFG_BB_TX_CONST_CTRL_E_ADDR, tmp);
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tmp = PHY_TX_READ_REG(CFG_BB_TX_CONST_CTRL_C_ADDR);
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REG_FIELD_SET(SW_RI_POINT_NUM, tmp, 496);
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PHY_TX_WRITE_REG(CFG_BB_TX_CONST_CTRL_C_ADDR, tmp);
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tmp = PHY_READ_REG(CFG_BB_TONE_MAP_GIX_POINT_ADDR);
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REG_FIELD_SET(SW_AV_HIGH_SPEED_GI_567, tmp, 756);
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REG_FIELD_SET(SW_AV_HIGH_SPEED_GI_417, tmp, 556);
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PHY_WRITE_REG(CFG_BB_TONE_MAP_GIX_POINT_ADDR, tmp);
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tmp = PHY_READ_REG(CFG_BB_TONE_MAP_GIX_LONG_ADDR);
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REG_FIELD_SET(SW_AV_HIGH_SPEED_GI_3534, tmp, 4712);
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PHY_WRITE_REG(CFG_BB_TONE_MAP_GIX_LONG_ADDR, tmp);
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tmp = PHY_READ_REG(CFG_BB_TR_GP_FC_PLD_GI_ADDR);
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REG_FIELD_SET(SW_GP_PLD_GI_STD, tmp, 556);
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PHY_WRITE_REG(CFG_BB_TR_GP_FC_PLD_GI_ADDR, tmp);
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tmp = PHY_READ_REG(CFG_BB_TR_GP_PLD_GI_ADDR);
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REG_FIELD_SET(SW_GP_PLD_GI_HS, tmp, 556);
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REG_FIELD_SET(SW_GP_PLD_GI_MIN, tmp, 756);
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PHY_WRITE_REG(CFG_BB_TR_GP_PLD_GI_ADDR, tmp);
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phy_rxfd_rate0_det(0, 2047);
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phy_rxfd_rate1_det(0, 2047);
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} else {
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/* 4096 point */
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tmp = PHY_READ_REG(CFG_BB_SAMPLING_RATE_ADDR);
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REG_FIELD_SET(SW_SAMPLING_RATE_SEL, tmp, 0);
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PHY_WRITE_REG(CFG_BB_SAMPLING_RATE_ADDR, tmp);
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tmp = PHY_READ_REG(CFG_BB_FCPLD_FFT_NUM_CTRT_ADDR);
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REG_FIELD_SET(SW_PLD_FFT_HALF_NUM, tmp, 1536);
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REG_FIELD_SET(SW_FC_FFT_HALF_NUM, tmp, 1536);
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PHY_WRITE_REG(CFG_BB_FCPLD_FFT_NUM_CTRT_ADDR, tmp);
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tmp = PHY_TX_READ_REG(CFG_BB_TX_CONST_CTRL_3_ADDR);
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REG_FIELD_SET(SW_IS_191_INSERT_PREAM, tmp, 191);
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PHY_TX_WRITE_REG(CFG_BB_TX_CONST_CTRL_3_ADDR, tmp);
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tmp = PHY_TX_READ_REG(CFG_BB_TX_CONST_CTRL_1_ADDR);
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REG_FIELD_SET(SW_IS_1535_INSERT_PREAM, tmp, 1535);
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PHY_TX_WRITE_REG(CFG_BB_TX_CONST_CTRL_1_ADDR, tmp);
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tmp = PHY_TX_READ_REG(CFG_BB_TX_CONST_CTRL_D_ADDR);
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REG_FIELD_SET(SW_SG_IFFT_POINT_NUM_HALF, tmp, 1536);
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REG_FIELD_SET(SW_SG_IFFT_POINT_NUM, tmp, 3072);
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PHY_TX_WRITE_REG(CFG_BB_TX_CONST_CTRL_D_ADDR, tmp);
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tmp = PHY_TX_READ_REG(CFG_BB_TX_CONST_CTRL_E_ADDR);
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REG_FIELD_SET(SW_GP_PREAM_IFFT_POINT_NUM_HALF, tmp, 192);
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REG_FIELD_SET(SW_GP_PREAM_IFFT_POINT_NUM, tmp, 384);
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PHY_TX_WRITE_REG(CFG_BB_TX_CONST_CTRL_E_ADDR, tmp);
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tmp = PHY_TX_READ_REG(CFG_BB_TX_CONST_CTRL_C_ADDR);
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REG_FIELD_SET(SW_RI_POINT_NUM, tmp, 372);
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PHY_TX_WRITE_REG(CFG_BB_TX_CONST_CTRL_C_ADDR, tmp);
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tmp = PHY_READ_REG(CFG_BB_TONE_MAP_GIX_POINT_ADDR);
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REG_FIELD_SET(SW_AV_HIGH_SPEED_GI_567, tmp, 567);
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REG_FIELD_SET(SW_AV_HIGH_SPEED_GI_417, tmp, 417);
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PHY_WRITE_REG(CFG_BB_TONE_MAP_GIX_POINT_ADDR, tmp);
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tmp = PHY_READ_REG(CFG_BB_TONE_MAP_GIX_LONG_ADDR);
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REG_FIELD_SET(SW_AV_HIGH_SPEED_GI_3534, tmp, 3534);
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PHY_WRITE_REG(CFG_BB_TONE_MAP_GIX_LONG_ADDR, tmp);
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tmp = PHY_READ_REG(CFG_BB_TR_GP_FC_PLD_GI_ADDR);
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REG_FIELD_SET(SW_GP_PLD_GI_STD, tmp, 417);
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PHY_WRITE_REG(CFG_BB_TR_GP_FC_PLD_GI_ADDR, tmp);
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tmp = PHY_READ_REG(CFG_BB_TR_GP_PLD_GI_ADDR);
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REG_FIELD_SET(SW_GP_PLD_GI_HS, tmp, 417);
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REG_FIELD_SET(SW_GP_PLD_GI_MIN, tmp, 567);
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PHY_WRITE_REG(CFG_BB_TR_GP_PLD_GI_ADDR, tmp);
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/* config det tone */
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phy_update_tone_det_range();
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}
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}
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#if SUPPORT_GREEN_PHY
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uint32_t phy_tmap_cal( \
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uint32_t *sound_data_ptr, \
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uint32_t *tone_map_ptr, \
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uint32_t start_tone, \
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uint32_t end_tone, \
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uint8_t cal_lvl)
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{
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uint32_t ret = ERR_OK;
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#if HW_PLATFORM >= HW_PLATFORM_FPGA && \
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SUPPORT_GREEN_PHY == 1
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uint32_t i = 0;
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uint32_t tmp = 0;
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volatile uint32_t map_begin_col_idx = 0;
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volatile uint32_t map_begin_group_idx = 0;
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volatile uint32_t map_end_col_idx = 0;
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volatile uint32_t map_end_group_idx = 0;
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/* check valid */
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IOT_ASSERT((start_tone < end_tone) && \
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(end_tone < TOTAL_TONE_MASK_NUM) && \
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(sound_data_ptr != NULL) && \
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(tone_map_ptr != NULL));
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/* get start tone */
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map_begin_col_idx = start_tone & 0x7;
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map_begin_group_idx = start_tone >> 3;
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/* get end tone */
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map_end_col_idx = end_tone & 0x7;
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map_end_group_idx = end_tone >> 3;
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enable_sw_access_tmi_buf(true);
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/* tone mask table */
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for(i = map_begin_group_idx; i <= map_end_group_idx; i++)
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{
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tmp = 0;
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/* Must word write */
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if((map_begin_col_idx != 0) && \
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(i == map_begin_group_idx)) {
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while(map_begin_col_idx < 8)
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{
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tmp |= ((1 << PHY_TMAP_MODU_EN_OFFSET) | PHY_MODU_QPSK) << \
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(map_begin_col_idx << 2);
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map_begin_col_idx++;
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}
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} else if((map_end_col_idx != 7) && \
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(i == map_end_group_idx)){
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map_end_col_idx = map_end_col_idx + 1;
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while(map_end_col_idx > 0)
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{
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tmp |= ((1 << PHY_TMAP_MODU_EN_OFFSET) | PHY_MODU_QPSK) << \
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((map_end_col_idx - 1) << 2);
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map_end_col_idx--;
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}
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} else {
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/* TODO: get data from sound data */
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(void)sound_data_ptr;
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tmp = (((1 << PHY_TMAP_MODU_EN_OFFSET) | PHY_MODU_QPSK) << 0) | \
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(((1 << PHY_TMAP_MODU_EN_OFFSET) | PHY_MODU_QPSK) << 4) | \
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(((1 << PHY_TMAP_MODU_EN_OFFSET) | PHY_MODU_QPSK) << 8) | \
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(((1 << PHY_TMAP_MODU_EN_OFFSET) | PHY_MODU_QPSK) << 12) |\
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(((1 << PHY_TMAP_MODU_EN_OFFSET) | PHY_MODU_QPSK) << 16) | \
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(((1 << PHY_TMAP_MODU_EN_OFFSET) | PHY_MODU_QPSK) << 20) | \
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(((1 << PHY_TMAP_MODU_EN_OFFSET) | PHY_MODU_QPSK) << 24) | \
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(((1 << PHY_TMAP_MODU_EN_OFFSET) | PHY_MODU_QPSK) << 28);
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}
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*(tone_map_ptr + map_begin_group_idx) = tmp;
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tone_map_ptr++;
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}
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enable_sw_access_tmi_buf(false);
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(void)cal_lvl;
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#else
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(void)sound_data_ptr;
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(void)tone_map_ptr;
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(void)start_tone;
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(void)end_tone;
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(void)cal_lvl;
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#endif
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return ret;
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}
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void phy_tmap_tx_rule_set(plc_tmap_rule_t *rule)
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{
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#if HW_PLATFORM >= HW_PLATFORM_FPGA && \
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SUPPORT_GREEN_PHY == 1
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uint32_t tmp = 0;
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uint32_t reg_base = 0;
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uint32_t tmap_base = 0;
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uint32_t tmap_idx = 0;
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/* valid en */
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tmap_base = rule->rule_id >> 5;
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tmap_idx = 31 - (rule->rule_id & 0x1F);
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reg_base = CFG_BB_TMAP_TX_VLD_CTRL_0_ADDR + (tmap_base << 2);
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tmp = PHY_READ_REG(reg_base);
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if(rule->en) {
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tmp |= 1 << tmap_idx;
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PHY_WRITE_REG(reg_base, tmp);
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} else {
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tmp &= ~(1 << tmap_idx);
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PHY_WRITE_REG(reg_base, tmp);
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}
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/* tx dtei */
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tmap_base = rule->rule_id >> 2;
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tmap_idx = (3 - (rule->rule_id & 0x3)) << 3;
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reg_base = CFG_BB_TMAP_TX_DTEI_CTRL_0_ADDR + (tmap_base << 2);
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tmp = PHY_READ_REG(reg_base);
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tmp |= rule->dtei << tmap_idx;
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PHY_WRITE_REG(reg_base, tmp);
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/* tmi */
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tmap_base = rule->rule_id >> 2;
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tmap_idx = (3 - (rule->rule_id & 0x3)) << 3;
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reg_base = CFG_BB_TMAP_TX_TMI_CTRL_0_ADDR + (tmap_base << 2);
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tmp = PHY_READ_REG(reg_base);
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tmp |= rule->tmi << tmap_idx;
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PHY_WRITE_REG(reg_base, tmp);
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#else
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(void)rule;
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#endif
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}
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void phy_tmap_rx_rule_set(plc_tmap_rule_t *rule)
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{
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#if HW_PLATFORM >= HW_PLATFORM_FPGA && \
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SUPPORT_GREEN_PHY == 1
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uint32_t tmp = 0;
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uint32_t reg_base = 0;
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uint32_t tmap_base = 0;
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uint32_t tmap_idx = 0;
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/* valid en */
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tmap_base = rule->rule_id >> 5;
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tmap_idx = 31 - (rule->rule_id & 0x1F);
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reg_base = CFG_BB_TMAP_RX_VLD_CTRL_0_ADDR + (tmap_base << 2);
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tmp = PHY_READ_REG(reg_base);
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if(rule->en) {
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tmp |= 1 << tmap_idx;
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PHY_WRITE_REG(reg_base, tmp);
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} else {
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tmp &= ~(1 << tmap_idx);
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PHY_WRITE_REG(reg_base, tmp);
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}
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/* rx stei */
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tmap_base = rule->rule_id >> 2;
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tmap_idx = (3 - (rule->rule_id & 0x3)) << 3;
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reg_base = CFG_BB_TMAP_RX_STEI_CTRL_0_ADDR + (tmap_base << 2);
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tmp = PHY_READ_REG(reg_base);
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tmp |= rule->dtei << tmap_idx;
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PHY_WRITE_REG(reg_base, tmp);
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/* tmi */
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tmap_base = rule->rule_id >> 2;
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tmap_idx = (3 - (rule->rule_id & 0x3)) << 3;
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reg_base = CFG_BB_TMAP_RX_TMI_CTRL_0_ADDR + (tmap_base << 2);
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tmp = PHY_READ_REG(reg_base);
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tmp |= rule->tmi << tmap_idx;
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PHY_WRITE_REG(reg_base, tmp);
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#else
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(void)rule;
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#endif
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}
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void phy_tmap_self_tmi_set(uint8_t tmi)
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{
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#if HW_PLATFORM >= HW_PLATFORM_FPGA && \
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SUPPORT_GREEN_PHY == 1
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uint32_t tmp = 0;
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/* tx/rx stei */
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tmp = PHY_READ_REG(CFG_BB_TMAP_SELF_TEI_CTRL_ADDR);
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REG_FIELD_SET(SW_TMAP_TX_STEI, tmp, tmi);
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REG_FIELD_SET( SW_TMAP_RX_DTEI, tmp, tmi);
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PHY_WRITE_REG(CFG_BB_TMAP_SELF_TEI_CTRL_ADDR, tmp);
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#else
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(void)tmi;
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#endif
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}
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void phy_tmap_init()
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{
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#if HW_PLATFORM >= HW_PLATFORM_FPGA && \
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SUPPORT_GREEN_PHY == 1
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uint32_t tmp = 0;
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tmp = PHY_RX_FD_READ_REG(CFG_BB_DECISION_FEEDBACK_ADDR);
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REG_FIELD_SET(SW_DCFB_ALPHA, tmp, 4);
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REG_FIELD_SET(SW_DCFB_EN, tmp, 0);
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PHY_RX_FD_WRITE_REG(CFG_BB_DECISION_FEEDBACK_ADDR, tmp);
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phy_mix_flag_set(false);
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tmp = PHY_RX_FD_READ_REG(CFG_BB_RATE_OFFET_ADDR);
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REG_FIELD_SET(SW_CSI_RATE1_OFFSET, tmp, 0);
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PHY_RX_FD_WRITE_REG(CFG_BB_RATE_OFFET_ADDR, tmp);
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phy_rxfd_mc_en(true);
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tmp = PHY_RX_FD_READ_REG(CFG_BB_PKT_DET_ADDR);
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REG_FIELD_SET(SW_SYMB_SYNC_OFFSET, tmp, 1);
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PHY_RX_FD_WRITE_REG(CFG_BB_PKT_DET_ADDR, tmp);
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/* disable acc first negative preamble */
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tmp = PHY_RX_FD_READ_REG(CFG_BB_FRAME_SYNC_ADDR);
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REG_FIELD_SET(SW_SYNC_SYMB_ACC_EN, tmp, 0);
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PHY_RX_FD_WRITE_REG(CFG_BB_FRAME_SYNC_ADDR,tmp);
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/* GI */
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tmp = PHY_RXTD_READ_REG(CFG_BB_TUNE_FOR_GI_ADDR);
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REG_FIELD_SET(SW_TUNE_FOR_PLD_GI2, tmp, 2);
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REG_FIELD_SET(SW_TUNE_FOR_PLD_GI1, tmp, 2);
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REG_FIELD_SET(SW_TUNE_FOR_PLD_GI0, tmp, 2);
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REG_FIELD_SET(SW_TUNE_FOR_FC_GI1, tmp, 0);
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PHY_RXTD_WRITE_REG(CFG_BB_TUNE_FOR_GI_ADDR, tmp);
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#endif
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}
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/* tmap bits array
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PHY_MODU_BPSK ~ PHY_MODU_4096QAM */
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uint8_t tmap_bits_arry[] = {1,2,4,3,6,8,10,12};
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uint32_t phy_cal_tmap_symb_bits( \
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uint32_t start_tone, \
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uint32_t end_tone, \
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uint32_t *tone_map_ptr, \
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const plc_tonemask_table *tmt)
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{
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uint32_t i = 0;
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uint32_t modu = 0;
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uint32_t bits_in_a_symb = 0;
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uint32_t tmap_col_idx = 0, tmsk_col_idx = 0;
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uint32_t tmap_group_idx = 0, tmsk_group_idx = 0;
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/* check valid */
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IOT_ASSERT((start_tone < end_tone) && \
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(end_tone < TOTAL_TONE_MASK_NUM) && \
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(tone_map_ptr != NULL) && \
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(tmt != NULL));
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for(i = start_tone; i <= end_tone; i++)
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{
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/* get tmap index */
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tmap_col_idx = i & 0x7;
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tmap_group_idx = i >> 3;
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/* get tone mask index */
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tmsk_col_idx = i & 0x1F;
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tmsk_group_idx = i >> 5;
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/* (*(tone_map_ptr + group_idx) & (0x8 << (col_idx << 2))) */
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if (tmt->tone_mask_bitmap[tmsk_group_idx] & \
|
|
(1 << tmsk_col_idx)) {
|
|
/* cal modulation */
|
|
modu = (*(tone_map_ptr + tmap_group_idx) >> \
|
|
(tmap_col_idx << 2)) & 0x7;
|
|
/* cal bits */
|
|
bits_in_a_symb += tmap_bits_arry[modu];
|
|
}
|
|
//iot_printf("i=%d, bits:%d\n", i, bits_in_a_symb);
|
|
}
|
|
return bits_in_a_symb;
|
|
}
|
|
|
|
static const uint8_t sv_turbo_rate_x16[3] =
|
|
{
|
|
32, 21, 18
|
|
};
|
|
|
|
int hpav_cal_fl_tmap
|
|
(
|
|
uint8_t mpdu_cnt,
|
|
uint8_t pb_num,
|
|
uint8_t turbo_rate,
|
|
uint8_t tmap_gi,
|
|
uint32_t bits_per_symb
|
|
)
|
|
{
|
|
int cur_ifs;
|
|
uint16_t pb_size;
|
|
int pb_gi0;
|
|
int pb_gi0_range;
|
|
int align_para;
|
|
int bits_num_total;
|
|
int bits_rest;
|
|
int bits_per_pb;
|
|
int turbo_rate_x16;
|
|
int max_symb_num;
|
|
int max_pb_num;
|
|
int symb_num_total;
|
|
float fl_total;
|
|
int fl_total_new;
|
|
int tmap_gi_val;
|
|
|
|
tmap_gi_val = (tmap_gi == PHY_GI_417) ? 417 :
|
|
(tmap_gi == PHY_GI_567) ? 567 : 3534;
|
|
|
|
cur_ifs = (mpdu_cnt == 0) ? HPAV_RIFS : HPAV_BIFS ;
|
|
pb_size = PB_SIZE_520;
|
|
|
|
if (turbo_rate > 2) {
|
|
turbo_rate = 2;
|
|
}
|
|
turbo_rate_x16 = sv_turbo_rate_x16[turbo_rate];
|
|
|
|
pb_gi0 = PB_GI0;
|
|
pb_gi0_range = 2;
|
|
align_para = ALIGN_PARA;
|
|
|
|
bits_per_pb = (pb_size * 8 * turbo_rate_x16)/16 ;
|
|
|
|
/* (4095-140/1.28) = 3985.625 */
|
|
max_symb_num = (int)(((3985.625) * (float)(align_para) - \
|
|
(FFT_POINT + pb_gi0) * pb_gi0_range) / \
|
|
(FFT_POINT + tmap_gi_val) + pb_gi0_range - 1) ;
|
|
max_pb_num = (int)(max_symb_num * bits_per_symb / bits_per_pb);
|
|
if (pb_num > max_pb_num) {
|
|
pb_num = max_pb_num;
|
|
}
|
|
|
|
bits_num_total = pb_num * bits_per_pb ;
|
|
symb_num_total = bits_num_total / bits_per_symb ;
|
|
bits_rest = bits_num_total % bits_per_symb;
|
|
|
|
if (bits_rest == 0) {
|
|
symb_num_total = symb_num_total - 1;
|
|
bits_rest = bits_per_symb;
|
|
}
|
|
|
|
while (bits_rest > bits_per_pb)
|
|
{
|
|
pb_num = pb_num + 1;
|
|
|
|
bits_num_total = bits_num_total + bits_per_pb ;
|
|
symb_num_total = bits_num_total / bits_per_symb ;
|
|
bits_rest = bits_num_total % bits_per_symb;
|
|
|
|
if (bits_rest == 0) {
|
|
symb_num_total = symb_num_total - 1;
|
|
bits_rest = bits_per_symb;
|
|
}
|
|
}
|
|
symb_num_total = symb_num_total + 1;
|
|
|
|
fl_total = (float)( (FFT_POINT + pb_gi0) * pb_gi0_range + \
|
|
(symb_num_total - pb_gi0_range) * (FFT_POINT + tmap_gi_val) \
|
|
) / ((float)align_para) + (float)(cur_ifs) / 1.28;
|
|
|
|
if (fl_total > 4095) {
|
|
/* error, it should not happen! */
|
|
IOT_ASSERT("Based on spec, GP fl_total cannot be over 4095!");
|
|
}
|
|
|
|
if (fl_total - (int)fl_total > 0) {
|
|
fl_total_new = (int)fl_total + 1;
|
|
} else {
|
|
fl_total_new = (int)fl_total;
|
|
}
|
|
|
|
return fl_total_new;
|
|
}
|
|
|
|
extern tonemap_table_entry gp_tonemap_table[];
|
|
|
|
int hpav_cal_fl_robo(uint8_t tmi, uint8_t mpdu_cnt, uint8_t pb_num)
|
|
{
|
|
int cur_ifs;
|
|
uint16_t pb_size;
|
|
uint8_t copy_num;
|
|
uint8_t modulation;
|
|
uint8_t turbo_rate;
|
|
int pb_gi0;
|
|
int pb_gi1;
|
|
int pb_gi0_range;
|
|
int align_para;
|
|
int bpc;
|
|
int inter_num;
|
|
int car_robo_cnt;
|
|
int car_in_seg;
|
|
int inter_bits_num;
|
|
int bits_per_symb;
|
|
int bits_in_seg;
|
|
int bits_in_last_sym;
|
|
int pad_bit_num;
|
|
int bits_in_last_seg;
|
|
int last_bits_seg;
|
|
int bits_per_pb;
|
|
int turbo_rate_x16;
|
|
int symb_per_pb;
|
|
int symb_num_total;
|
|
float fl_total;
|
|
int fl_total_new;
|
|
int tx_vld_tone_num = phy_vld_tone_num_get(0, phy_band_id_get());
|
|
|
|
if (tmi > 2) {
|
|
return 0;
|
|
}
|
|
|
|
cur_ifs = (mpdu_cnt == 0) ? HPAV_RIFS : HPAV_BIFS ;
|
|
pb_size = gp_tonemap_table[tmi].pb_size;
|
|
copy_num = gp_tonemap_table[tmi].robo_cnt;
|
|
modulation = gp_tonemap_table[tmi].modulation;
|
|
turbo_rate = gp_tonemap_table[tmi].coding_rate_idx;
|
|
|
|
if (turbo_rate > 2) {
|
|
turbo_rate = 2;
|
|
}
|
|
turbo_rate_x16 = sv_turbo_rate_x16[turbo_rate];
|
|
|
|
pb_gi0 = PB_GI0;
|
|
pb_gi0_range = 2;
|
|
pb_gi1 = ((tmi == 1) || (tmi == 0)) ? GI_STD_ROBO : GI_MINI_ROBO;
|
|
align_para = ALIGN_PARA;
|
|
|
|
bpc = modulation;
|
|
inter_num = copy_num;
|
|
car_robo_cnt = (tx_vld_tone_num / inter_num) * inter_num;
|
|
car_in_seg = car_robo_cnt / copy_num;
|
|
|
|
inter_bits_num = (pb_size * 8 * turbo_rate_x16) / 16;
|
|
bits_per_symb = bpc * car_robo_cnt;
|
|
bits_in_seg = bpc * car_in_seg;
|
|
bits_in_last_sym = inter_bits_num % bits_per_symb;
|
|
|
|
if (bits_in_last_sym == 0) {
|
|
bits_in_last_sym = bits_per_symb;
|
|
bits_in_last_seg = bits_in_seg;
|
|
} else {
|
|
int tmp;
|
|
|
|
tmp = (bits_in_last_sym - 1) / bits_in_seg;
|
|
bits_in_last_seg = bits_in_last_sym - bits_in_seg * tmp;
|
|
}
|
|
|
|
pad_bit_num = bits_in_seg - bits_in_last_seg;
|
|
last_bits_seg = (bits_in_last_sym / bits_in_seg);
|
|
|
|
if (bits_in_last_sym % bits_in_seg == 0) {
|
|
if (last_bits_seg) {
|
|
last_bits_seg--;
|
|
}
|
|
}
|
|
|
|
bits_per_pb = \
|
|
((pb_size * 8 * turbo_rate_x16) / 16 + pad_bit_num) * copy_num;
|
|
symb_per_pb = (bits_per_pb + bits_per_symb -1)/bits_per_symb;
|
|
symb_num_total = symb_per_pb * pb_num;
|
|
|
|
fl_total = (float)( (FFT_POINT + pb_gi0) * pb_gi0_range +
|
|
(symb_num_total - pb_gi0_range) * (FFT_POINT + pb_gi1)
|
|
) / ((float)align_para) + (float)(cur_ifs) / 1.28;
|
|
|
|
if (fl_total > 4095) {
|
|
/* error, it should not happen! */
|
|
IOT_ASSERT("Based on spec, GP fl_total cannot be over 4095!");
|
|
}
|
|
|
|
if (fl_total - (int)fl_total > 0) {
|
|
fl_total_new = (int)fl_total + 1;
|
|
} else {
|
|
fl_total_new = (int)fl_total;
|
|
}
|
|
|
|
#if PHY_DBG_EN
|
|
hpav_printf(ePRINT_LEVEL_INFO, \
|
|
"hpav_cal_fl_robo::tmi = %d\n", tmi);
|
|
hpav_printf(ePRINT_LEVEL_INFO, \
|
|
"hpav_cal_fl_robo::tx_vld_tone_num = %d\n", tx_vld_tone_num);
|
|
hpav_printf(ePRINT_LEVEL_INFO, \
|
|
"hpav_cal_fl_robo::fl_total_new = %d\n", fl_total_new);
|
|
#endif
|
|
|
|
return fl_total_new;
|
|
}
|
|
|
|
uint32_t phy_symb_bits_get(uint32_t *tmap_addr)
|
|
{
|
|
/* get symbol number bits */
|
|
uint16_t band_start_tone = 0;
|
|
uint16_t band_end_tone = 0;
|
|
uint16_t valid_tone_num = 0;
|
|
uint8_t fc_sym = 0;
|
|
const plc_tonemask_table *tone_msk_ptr = NULL;
|
|
uint32_t symb_bits = 0;
|
|
|
|
/* get tone */
|
|
phy_band_info_get_by_id( \
|
|
PHY_PROTO_TYPE_GET(), \
|
|
IOT_PLC_PHY_BAND_RANGE_DFT, \
|
|
phy_band_id_get(), \
|
|
&valid_tone_num, \
|
|
&fc_sym, \
|
|
&band_start_tone, \
|
|
&band_end_tone);
|
|
|
|
/* mask id */
|
|
tone_msk_ptr = phy_tone_mask_ptr_get(phy_mask_id_get());
|
|
|
|
/* get symb bits */
|
|
symb_bits = phy_cal_tmap_symb_bits( \
|
|
band_start_tone, \
|
|
band_end_tone, \
|
|
tmap_addr, \
|
|
tone_msk_ptr);
|
|
//iot_printf("symb_bits :%d\n", symb_bits);
|
|
|
|
return symb_bits;
|
|
}
|
|
|
|
#endif
|
|
|