Files
kunlun/dtest/kl2_aec_test/es7210.h
2024-09-28 14:24:04 +08:00

132 lines
4.0 KiB
C

/****************************************************************************
Copyright(c) 2019 by Aerospace C.Power (Chongqing) Microelectronics. ALL RIGHTS RESERVED.
This Information is proprietary to Aerospace C.Power (Chongqing) Microelectronics and MAY NOT
be copied by any method or incorporated into another program without
the express written consent of Aerospace C.Power. This Information or any portion
thereof remains the property of Aerospace C.Power. The Information contained herein
is believed to be accurate and Aerospace C.Power assumes no responsibility or
liability for its use in any way and conveys no license or title under
any patent or copyright and makes no representation or warranty that this
Information is free from patent or copyright infringement.
****************************************************************************/
#ifndef _ES7210_H
#define _ES7210_H
#define ES7210_RESET_CTL_REG00 0x00
#define ES7210_CLK_ON_OFF_REG01 0x01
#define ES7210_MCLK_CTL_REG02 0x02
#define ES7210_MST_CLK_CTL_REG03 0x03
#define ES7210_MST_LRCDIVH_REG04 0x04
#define ES7210_MST_LRCDIVL_REG05 0x05
#define ES7210_DIGITAL_PDN_REG06 0x06
#define ES7210_ADC_OSR_REG07 0x07
#define ES7210_MODE_CFG_REG08 0x08
#define ES7210_TCT0_CHPINI_REG09 0x09
#define ES7210_TCT1_CHPINI_REG0A 0x0A
#define ES7210_CHIP_STA_REG0B 0x0B
#define ES7210_IRQ_CTL_REG0C 0x0C
#define ES7210_MISC_CTL_REG0D 0x0D
#define ES7210_DMIC_CTL_REG10 0x10
#define ES7210_SDP_CFG1_REG11 0x11
#define ES7210_SDP_CFG2_REG12 0x12
#define ES7210_ADC_AUTOMUTE_REG13 0x13
#define ES7210_ADC34_MUTE_REG14 0x14
#define ES7210_ADC12_MUTE_REG15 0x15
#define ES7210_ALC_SEL_REG16 0x16
#define ES7210_ALC_COM_CFG1_REG17 0x17
#define ES7210_ALC34_LVL_REG18 0x18
#define ES7210_ALC12_LVL_REG19 0x19
#define ES7210_ALC_COM_CFG2_REG1A 0x1A
#define ES7210_ALC4_MAX_GAIN_REG1B 0x1B
#define ES7210_ALC3_MAX_GAIN_REG1C 0x1C
#define ES7210_ALC2_MAX_GAIN_REG1D 0x1D
#define ES7210_ALC1_MAX_GAIN_REG1E 0x1E
#define ES7210_ADC34_HPF2_REG20 0x20
#define ES7210_ADC34_HPF1_REG21 0x21
#define ES7210_ADC12_HPF2_REG22 0x22
#define ES7210_ADC12_HPF1_REG23 0x23
#define ES7210_CHP_ID1_REG3D 0x3D
#define ES7210_CHP_ID0_REG3E 0x3E
#define ES7210_CHP_VER_REG3F 0x3F
#define ES7210_ANALOG_SYS_REG40 0x40
#define ES7210_MICBIAS12_REG41 0x41
#define ES7210_MICBIAS34_REG42 0x42
#define ES7210_MIC1_GAIN_REG43 0x43
#define ES7210_MIC2_GAIN_REG44 0x44
#define ES7210_MIC3_GAIN_REG45 0x45
#define ES7210_MIC4_GAIN_REG46 0x46
#define ES7210_MIC1_LP_REG47 0x47
#define ES7210_MIC2_LP_REG48 0x48
#define ES7210_MIC3_LP_REG49 0x49
#define ES7210_MIC4_LP_REG4A 0x4A
#define ES7210_MIC12_PDN_REG4B 0x4B
#define ES7210_MIC34_PDN_REG4C 0x4C
typedef struct _es7210_iic_cfg {
uint8_t reg;
uint8_t value;
} es7210_iic_cfg_t;
es7210_iic_cfg_t g_es7210_iic_cfg[] = {
/* digital reset */
{ 0x00, 0xff},
{ 0x00, 0x32},
/* set chip initial time */
{ 0x09, 0x30},
{ 0x0A, 0x30},
/* setup HPF */
{ 0x23, 0x2a},
{ 0x22, 0x0a},
{ 0x21, 0x2a},
{ 0x20, 0x0a},
/* I2S mode: 16bit, left justified */
{ 0x11, 0x61},
/* 0: ADC12 to SDOUT1, ADC34 to SDOUT2; 0x2: TDM mode */
//{ 0x12, 0x02},
{ 0x12, 0x0},
/* analog system */
{ 0x40, 0xC3},
/* ADC1/2 bias set: 0x00: 2.18, 0x10: 2.26, 0x20: 2.36, 0x30: 2.45,
0x40: 2.55, 0x50: 2.66, 0x60: 2.78, 0x70: 2.87 */
{ 0x41, 0x40},
{ 0x42, 0x40},
/* MIC1 GAIN */
{ 0x43, 0x1e},
{ 0x44, 0x1e},
{ 0x45, 0x1e},
{ 0x46, 0x1e},
/* low power */
{ 0x47, 0x08},
{ 0x48, 0x08},
{ 0x49, 0x08},
{ 0x4A, 0x08},
/* ADC osr = 32 */
{ 0x07, 0x20},
/* clock control */
{ 0x02, 0xC1},
/* dll power down */
{ 0x06, 0x04},
/* mic1/2 power down */
{ 0x4B, 0x0F},
{ 0x4C, 0x0F},
/* reset */
{ 0x00, 0x71},
{ 0x00, 0x41},
};
#endif /* _ES7210_H_ */