2039 lines
61 KiB
C
2039 lines
61 KiB
C
/****************************************************************************
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*
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* Copyright(c) 2019 by Aerospace C.Power (Chongqing) Microelectronics. ALL RIGHTS RESERVED.
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*
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* This Information is proprietary to Aerospace C.Power (Chongqing) Microelectronics Ltd and MAY NOT
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* be copied by any method or incorporated into another program without
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* the express written consent of Aerospace C.Power. This Information or any portion
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* thereof remains the property of Aerospace C.Power. The Information contained herein
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* is believed to be accurate and Aerospace C.Power assumes no responsibility or
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* liability for its use in any way and conveys no license or title under
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* any patent or copyright and makes no representation or warranty that this
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* Information is free from patent or copyright infringement.
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*
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* ****************************************************************************/
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/* os shim includes */
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#include "os_types.h"
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#include "os_task.h"
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#include "os_utils.h"
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#include "iot_errno_api.h"
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/* common includes */
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#include "iot_io.h"
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#include "iot_bitops.h"
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#include "iot_config.h"
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/* driver includes */
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#include "iot_clock.h"
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#include "iot_uart.h"
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#include "iot_i2c_api.h"
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#include "iot_gpio_api.h"
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#include "i2c_hw.h"
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/* cli includes */
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#include "iot_cli.h"
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#include "iot_uart_h.h"
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/* debug includes*/
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#include "dbg_io.h"
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#include "hw_reg_api.h"
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#include "gpio_mtx.h"
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#include "i2c_reg.h"
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extern void nfc_write_access_write(uint8_t cmd, uint8_t addr, uint8_t val);
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extern uint8_t nfc_write_access_read();
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#define I2C_S_READ (1 << 0)
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#define I2C_S_WRITE (1 << 1)
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#define I2C_S_FILE (1 << 2)
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#define I2C_S_ALL (I2C_S_READ | I2C_S_WRITE)
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#define TEST_CASE I2C_S_ALL //(I2C_S_FILE)
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os_task_h test_init_handle;
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extern int platform_init();
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uint8_t test_dev_addr = 0x28;//0x50;//0x1b;
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uint8_t i2c_test_data[] = {0x18, 0x57, 0x16};
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iot_i2c_module_cfg_t g_cfg = {0};
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/********************ctrl external ADC************************/
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//-----------------------------------
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#define CFG_BT_SPI_EN_ADDR 0x0000
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#define SW_AFC_WRITE_DONE_OFFSET 5
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#define SW_AFC_WRITE_DONE_MASK 0x00000020
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#define SW_ADDA_WRITE_DONE_OFFSET 4
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#define SW_ADDA_WRITE_DONE_MASK 0x00000010
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#define SW_RF_WRITE_DONE_OFFSET 3
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#define SW_RF_WRITE_DONE_MASK 0x00000008
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#define SW_AFC_WRITE_START_OFFSET 2
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#define SW_AFC_WRITE_START_MASK 0x00000004
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#define SW_ADDA_WRITE_START_OFFSET 1
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#define SW_ADDA_WRITE_START_MASK 0x00000002
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#define SW_RF_WRITE_START_OFFSET 0
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#define SW_RF_WRITE_START_MASK 0x00000001
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#define CFG_BT_WRITE_ADDA_SPI_DATA_ADDR 0x0008
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#define SW_ADDA_SPI_DATA_OFFSET 0
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#define SW_ADDA_SPI_DATA_MASK 0xFFFFFFFF
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#define APB_ANA_READ_REG(addr) SOC_READ_REG(0x03400000 + addr)
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#define APB_ANA_WRITE_REG(addr,value) SOC_WRITE_REG(0x03400000 + addr,value)
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void write_rf_ad_spi(uint32_t adress, uint32_t data)
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{
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uint32_t regv;
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uint32_t tmp;
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uint32_t spi_read;
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regv = (adress<<8)|data;
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APB_ANA_WRITE_REG(CFG_BT_WRITE_ADDA_SPI_DATA_ADDR,regv);
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tmp = APB_ANA_READ_REG(CFG_BT_SPI_EN_ADDR);
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REG_FIELD_SET(SW_ADDA_WRITE_START,tmp,1);
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APB_ANA_WRITE_REG(CFG_BT_SPI_EN_ADDR,tmp);
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spi_read = APB_ANA_READ_REG(CFG_BT_SPI_EN_ADDR);
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spi_read = spi_read&SW_ADDA_WRITE_DONE_MASK;
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while(spi_read != SW_ADDA_WRITE_DONE_MASK)
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{
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spi_read = APB_ANA_READ_REG(CFG_BT_SPI_EN_ADDR);
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spi_read = spi_read&SW_ADDA_WRITE_DONE_MASK;
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}
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}
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void DAC_change_ad()
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{
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write_rf_ad_spi(0x14,2);
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iot_delay_us(30);
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}
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void DAC_change_da()
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{
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write_rf_ad_spi(0x14,0xa);
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iot_delay_us(30);
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}
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void DAC_init()
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{
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uint32_t r=0;
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r |= iot_gpio_open_as_output(50); //44
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r |= iot_gpio_open_as_output(51); //46
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r |= iot_gpio_open_as_output(49); //39
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r |= iot_gpio_value_set(50, 0);//50 44
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r |= iot_gpio_value_set(51, 0);//51 46
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r |= iot_gpio_value_set(49, 1); //49 39
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iot_delay_us(10000);
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r |= iot_gpio_value_set(49, 0); //49 39
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iot_delay_us(10000);
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r |= iot_gpio_value_set(49, 1); //49 39
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iot_delay_us(10000);
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write_rf_ad_spi(1,0);
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iot_delay_us(30);
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write_rf_ad_spi(0x14,0xa);
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iot_delay_us(30);
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write_rf_ad_spi(0x13,0x0);
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iot_delay_us(30);
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write_rf_ad_spi(0x10,0x40);
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iot_delay_us(30);
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write_rf_ad_spi(0xd, 0x40);
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iot_delay_us(30);
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DAC_change_ad();
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iot_printf("\nDAC inited!!\n");
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SOC_WRITE_REG(0x05d80108,0x3);
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}
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/********************************************/
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int gpio_rst_test(uint8_t gpio)
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{
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uint8_t r = ERR_FAIL;
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r = iot_gpio_open_as_output(gpio);
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if(r != 0)
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{
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iot_printf("\ngpio_set_direction failed!\n");
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}
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if (0 != iot_gpio_value_set(gpio, 1)) {
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iot_printf("\n WRITE 1 FAILED\n");
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r = ERR_FAIL;
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} else {
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os_delay(1000);
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if (0 != iot_gpio_value_set(gpio, 0)) {
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iot_printf("\n WRITE 0 FAILED\n");
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r = ERR_FAIL;
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} else {
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r = ERR_OK;
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}
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os_delay(1000);
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if (0 != iot_gpio_value_set(gpio, 1)) {
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iot_printf("\n WRITE 1 FAILED\n");
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r = ERR_FAIL;
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} else {
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r = ERR_OK;
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}
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}
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// iot_gpio_close(gpio);
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return r;
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}
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int i2c_write_command(uint8_t addr, uint8_t reg1, uint8_t reg2, uint8_t val)
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{
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uint8_t ret = 0;
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char buf[4] = {0};
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buf[0] = reg1;
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buf[1] = reg2;
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buf[2] = val;
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ret = iot_i2c_write(g_cfg.port, addr, buf, 3);
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os_delay(10);
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// todo : receive buffer from rdata fifo
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return ret;
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}
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int i2c_write_file(uint8_t addr, uint8_t reg, uint8_t *data, uint8_t len)
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{
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uint8_t ret = 0;
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char buf[33] = {0};
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buf[0] = reg;
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os_mem_cpy(buf+1, data, len);
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ret = iot_i2c_write(g_cfg.port, addr, buf, len+1);
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os_delay(10);
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// todo : receive buffer from rdata fifo
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return ret;
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}
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int i2c_read_file(uint8_t addr, uint8_t reg, uint8_t *data, uint8_t len)
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{
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uint8_t ret = 0;
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char buf[33] = {0};
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buf[0] = reg;
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ret = iot_i2c_write(g_cfg.port, addr, buf, 1);
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if (ret) {
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iot_printf("i2c_read_command write addr error\n");
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return ret;
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}
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os_delay(10);
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ret = iot_i2c_read(g_cfg.port, addr, (char *)data, len);
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//if slave wdata fifo is not empty, the master will receive nak at the end
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if (ret) {
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iot_printf("i2c_read_command get value error\n");
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return ret;
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}
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return ret;
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}
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int i2c_read_command(uint8_t addr, uint16_t reg, uint8_t *data, uint8_t len)
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{
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uint8_t ret = 0;
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char buf[4] = {0};
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buf[0] = reg >> 8;
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buf[1] = reg & 0xff;
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ret = iot_i2c_write(g_cfg.port, addr, buf, 2);
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if (ret) {
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iot_printf("i2c_read_command write addr error\n");
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return ret;
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}
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// todo : if write match write pattern, put buffer info wdata fifo
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os_delay(10);
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ret = iot_i2c_read(g_cfg.port, addr, (char *)data, len);
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//if slave wdata fifo is not empty, the master will receive nak at the end
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if (ret) {
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iot_printf("i2c_read_command get value error\n");
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return ret;
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}
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return ret;
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}
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/**************************************************************************************
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* RC522 Command
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**************************************************************************************/
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#define PCD_IDLE (0x00) // ȡ<><C8A1><EFBFBD><EFBFBD>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD>
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#define PCD_AUTHENT (0x0E) // <20><>֤<EFBFBD><D6A4>Կ
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#define PCD_RECEIVE (0x08) // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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#define PCD_TRANSMIT (0x04) // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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#define PCD_TRANSCEIVE (0x0C) // <20><><EFBFBD>Ͳ<EFBFBD><CDB2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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#define PCD_RESETPHASE (0x0F) // <20><>λ
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#define PCD_CALCCRC (0x03) // CRC<52><43><EFBFBD><EFBFBD>
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/**************************************************************************************
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* Mifare One Card Command
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**************************************************************************************/
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#define PICC_REQIDL (0x26) // Ѱ<><D1B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>δ<EFBFBD><CEB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬
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#define PICC_REQALL (0x52) // Ѱ<><D1B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȫ<EFBFBD><C8AB><EFBFBD><EFBFBD>
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#define PICC_ANTICOLL1 (0x93) // <20><><EFBFBD><EFBFBD>ײ
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#define PICC_ANTICOLL2 (0x95) // <20><><EFBFBD><EFBFBD>ײ
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#define PICC_AUTHENT1A (0x60) // <20><>֤A<D6A4><41>Կ
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#define PICC_AUTHENT1B (0x61) // <20><>֤B<D6A4><42>Կ
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#define PICC_READ (0x30) // <20><><EFBFBD><EFBFBD>
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#define PICC_WRITE (0xA0) // д<><D0B4>
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#define PICC_DECREMENT (0xC0) // <20>ۿ<EFBFBD>
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#define PICC_INCREMENT (0xC1) // <20><>ֵ
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#define PICC_RESTORE (0xC2) // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݵ<EFBFBD><DDB5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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#define PICC_TRANSFER (0xB0) // <20><><EFBFBD>滺<EFBFBD><E6BBBA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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#define PICC_HALT (0x50) // <20><><EFBFBD><EFBFBD>
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/**************************************************************************************
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* Register Definition
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**************************************************************************************/
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// PAGE 0
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#define RFU00 (0x00)
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#define CommandReg (0x01)
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#define ComIEnReg (0x02)
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#define DivlEnReg (0x03)
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#define ComIrqReg (0x04)
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#define DivIrqReg (0x05)
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#define ErrorReg (0x06)
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#define Status1Reg (0x07)
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#define Status2Reg (0x08)
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#define FIFODataReg (0x09)
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#define FIFOLevelReg (0x0A)
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#define WaterLevelReg (0x0B)
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#define ControlReg (0x0C)
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#define BitFramingReg (0x0D)
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#define CollReg (0x0E)
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#define RFU0F (0x0F)
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// PAGE 1
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#define RFU10 (0x10)
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#define ModeReg (0x11)
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#define TxModeReg (0x12)
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#define RxModeReg (0x13)
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#define TxControlReg (0x14)
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#define TxASKReg (0x15)
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#define TxSelReg (0x16)
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#define RxSelReg (0x17)
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#define RxThresholdReg (0x18)
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#define DemodReg (0x19)
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#define RFU1A (0x1A)
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#define RFU1B (0x1B)
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#define MifareReg (0x1C)
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#define RFU1D (0x1D)
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#define TypeBReg (0x1E)
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#define SerialSpeedReg (0x1F)
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// PAGE 2
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#define RFU20 (0x20)
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#define CRCResultRegM (0x21)
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#define CRCResultRegL (0x22)
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#define RFU23 (0x23)
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#define ModWidthReg (0x24)
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#define RFU25 (0x25)
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#define RFCfgReg (0x26)
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#define GsNReg (0x27)
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#define CWGsPReg (0x28)
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#define ModGsPReg (0x29)
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#define TModeReg (0x2A)
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#define TPrescalerReg (0x2B)
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#define TReloadRegH (0x2C)
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#define TReloadRegL (0x2D)
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#define TCounterValueRegH (0x2E)
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#define TCounterValueRegL (0x2F)
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// PAGE 3
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#define RFU30 (0x30)
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#define TestSel1Reg (0x31)
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#define TestSel2Reg (0x32)
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#define TestPinEnReg (0x33)
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#define TestPinValueReg (0x34)
|
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#define TestBusReg (0x35)
|
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#define AutoTestReg (0x36)
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#define VersionReg (0x37)
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#define AnalogTestReg (0x38)
|
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#define TestDAC1Reg (0x39)
|
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#define TestDAC2Reg (0x3A)
|
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#define TestADCReg (0x3B)
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#define RFU3C (0x3C)
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#define RFU3D (0x3D)
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#define RFU3E (0x3E)
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#define RFU3F (0x3F)
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|
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|
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#define RC_ISO14443_A 0
|
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#define RC_ISO14443_B 1
|
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|
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|
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|
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static uint8_t ReadReg(uint8_t addr)
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{
|
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uint8_t ret;
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char buff[64]= {0};
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char value;
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|
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value=addr;
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ret = iot_i2c_write(0, test_dev_addr, (char *)(&value), 1);
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if (ret) {
|
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iot_printf("i2c_read_command write addr errori 22222\n");
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// return ret;
|
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}
|
||
|
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ret = iot_i2c_read(0, test_dev_addr, buff, 1);
|
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//if slave wdata fifo is not empty, the master will receive nak at the end
|
||
if (ret) {
|
||
iot_printf("i2c_read_command get value error\n");
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// return ret;
|
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}
|
||
os_delay(5);
|
||
return buff[0];
|
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//return (uint8_t)(0xff & nfc_write_access_read(addr));
|
||
}
|
||
|
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static void WriteReg(uint8_t addr,uint8_t v)
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{
|
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uint8_t ret;
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i2c_test_data[0]=addr;
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i2c_test_data[1]=v;
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ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
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if (ret) {
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iot_printf("i2c_read_command write addr error\n");
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}
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||
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nfc_write_access_write(0, addr, v);
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os_delay(5);
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}
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||
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static void ClearBitMask(uint8_t addr,uint8_t v)
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{
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WriteReg(addr,ReadReg(addr) & (~v));
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}
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||
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static void SetBitMask(uint8_t addr,uint8_t v)
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||
{
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||
WriteReg(addr,ReadReg(addr) | v);
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}
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||
|
||
void DUMP_532()
|
||
{/*
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||
int i;
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||
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||
for(i=1;i<0x3b;i++)
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||
{
|
||
iot_printf("REG-1:%02X,val:%02X %X\r\n",i,ReadReg(i), nfc_write_access_read(i));
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||
}
|
||
*/
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||
}
|
||
|
||
static uint8_t RC_PcdCmd(uint8_t cmd, uint8_t *pIn, uint8_t inLen, uint8_t *pOut, uint8_t *pOutLen)
|
||
{
|
||
uint8_t status = 0;
|
||
uint8_t irqEn = 0x00;
|
||
//uint8_t waitFor = 0x00;
|
||
uint8_t lastBits;
|
||
uint8_t n;
|
||
uint32_t i;
|
||
|
||
switch (cmd)
|
||
{
|
||
case PCD_AUTHENT :
|
||
irqEn = 0x12;
|
||
// waitFor = 0x10;
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||
break;
|
||
case PCD_TRANSCEIVE:
|
||
irqEn = 0x20;//0x77
|
||
//waitFor = 0x30;
|
||
break;
|
||
default: break;
|
||
}
|
||
|
||
iot_printf("\n fir ComIrqReg:0x%x\r\n", ReadReg(ComIrqReg));
|
||
|
||
WriteReg(ComIEnReg, irqEn | 0x80);
|
||
ClearBitMask(ComIrqReg, 0x80);
|
||
// WriteReg(CommandReg, PCD_IDLE);
|
||
SetBitMask(FIFOLevelReg, 0x80);
|
||
|
||
for (i=0; i<inLen; i++)
|
||
{
|
||
WriteReg(FIFODataReg, pIn[i]);
|
||
}
|
||
|
||
WriteReg(CommandReg, cmd);
|
||
iot_printf("mid ComIrqReg:0x%x\r\n", ReadReg(ComIrqReg));
|
||
|
||
DUMP_532();
|
||
if (cmd == PCD_TRANSCEIVE)
|
||
{
|
||
SetBitMask(BitFramingReg,0x80);
|
||
}
|
||
|
||
i = 2000;
|
||
i=10; // <20><><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>Ƶ<EFBFBD>ʵ<EFBFBD><CAB5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>M1<4D><31><EFBFBD><EFBFBD><EFBFBD>ȴ<EFBFBD>ʱ<EFBFBD><CAB1>25ms
|
||
do
|
||
{
|
||
n = ReadReg(ComIrqReg);
|
||
iot_printf("%d ComIrqReg:0x%x\r\n", i, n);
|
||
i--;
|
||
os_delay(5);
|
||
} while((i>0) && ((n & 0x60)!=0x60));//while ((i!=0) && !(n&0x01) && !(n&waitFor));
|
||
|
||
|
||
ClearBitMask(BitFramingReg, 0x80);
|
||
|
||
/* for(int i = 0 ; i < 0x40 ; i ++)
|
||
{
|
||
regbuff[i] = ReadReg(i);
|
||
}*/
|
||
iot_printf("\r\n........AFTER SEND.........\r\n");
|
||
DUMP_532();
|
||
|
||
if (1)//(i != 0)
|
||
{
|
||
iot_printf("ErrorReg:0x%x\r\n",ReadReg(ErrorReg));
|
||
if (!(ReadReg(ErrorReg) & 0x1B))
|
||
{
|
||
status = 0;
|
||
if (n & irqEn & 0x01)
|
||
{
|
||
status = 1;
|
||
}
|
||
|
||
if (cmd == PCD_TRANSCEIVE)
|
||
{
|
||
iot_printf("cmd: 0x%x\r\n",cmd);
|
||
n = ReadReg(FIFOLevelReg);
|
||
iot_printf("FIFO_LEVEL: 0x%x\r\n",n);
|
||
lastBits = ReadReg(ControlReg) & 0x07;
|
||
iot_printf("lastBits: 0x%x\r\n",lastBits);
|
||
*pOutLen = (lastBits) ? ((n-1)*8 + lastBits) : (n*8);
|
||
|
||
if (n > 18)
|
||
{
|
||
n = 18;
|
||
}
|
||
|
||
for (i=0; i<n; i++)
|
||
{
|
||
pOut[i] = ReadReg(FIFODataReg);
|
||
iot_printf("Got it!!!!!!0x%x 0x%x\r\n", pOut[i], nfc_write_access_read(FIFODataReg));
|
||
}
|
||
}
|
||
}
|
||
else
|
||
{
|
||
status = 1;
|
||
}
|
||
}
|
||
|
||
SetBitMask(ControlReg, 0x80); // stop timer now
|
||
WriteReg(CommandReg, PCD_IDLE);
|
||
return status;
|
||
}
|
||
|
||
static void RC_Antenna(uint8_t mode)
|
||
{
|
||
if (mode == 1)
|
||
{
|
||
SetBitMask(TxControlReg, 0x03); // <20><><EFBFBD>߿<EFBFBD>
|
||
}
|
||
else
|
||
{
|
||
ClearBitMask(TxControlReg, 0x03); // <20><><EFBFBD>߹<EFBFBD>
|
||
}
|
||
}
|
||
|
||
|
||
void RC_PcdISOType(uint8_t type)
|
||
{
|
||
switch (type)
|
||
{
|
||
case RC_ISO14443_A:
|
||
{
|
||
ClearBitMask(Status2Reg, 0x08); //
|
||
WriteReg(ModeReg, 0x3D);
|
||
WriteReg(TReloadRegL, 30);
|
||
WriteReg(TReloadRegH, 0);
|
||
WriteReg(TModeReg, 0x8D);
|
||
WriteReg(TPrescalerReg, 0x3E);
|
||
WriteReg(TxASKReg, 0x40);
|
||
|
||
// ------------------------- <20><><EFBFBD>Ͳ<EFBFBD><CDB2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> ------------------------------
|
||
|
||
// ------------------------- <20><><EFBFBD>ղ<EFBFBD><D5B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> ------------------------------
|
||
WriteReg(RFCfgReg, 0x7F);
|
||
WriteReg(RxSelReg, 0x86);
|
||
|
||
// ------------------------- <20><><EFBFBD>߿<EFBFBD><DFBF><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> ------------------------------
|
||
//RC_Antenna(0);
|
||
//RC_DelayMs(1);
|
||
RC_Antenna(1);
|
||
break;
|
||
}
|
||
|
||
case RC_ISO14443_B:
|
||
{
|
||
ClearBitMask(Status2Reg, 0x08);
|
||
WriteReg(ModeReg, 0x3F); // For 0xFFFF crc
|
||
WriteReg(TReloadRegL, 30);
|
||
WriteReg(TReloadRegH, 0);
|
||
WriteReg(TModeReg, 0x8D);
|
||
WriteReg(TPrescalerReg, 0x3E);
|
||
WriteReg(TxASKReg, 0); // Force 100ASK = 0
|
||
|
||
// ------------------------- <20><><EFBFBD>Ͳ<EFBFBD><CDB2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> ------------------------------
|
||
WriteReg(GsNReg, 0xfa);//0xfa // TX<54><58><EFBFBD><EFBFBD>絼<EFBFBD><E7B5BC><EFBFBD><EFBFBD>
|
||
WriteReg(CWGsPReg, 0x3F);
|
||
WriteReg(ModGsPReg, 0x06);//0x06 //0x2a /*modulate deepth*/
|
||
//WriteReg(ModGsPReg, 0x1A); // <20><><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>RegModGsp,, TYPEB ModConductance 0x1A
|
||
WriteReg(TxModeReg, 0x83); //0x83 // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>,106kbps,14443B
|
||
WriteReg(BitFramingReg, 0x00); // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>,0x13->2.95us RegTypeBFraming ,,TYPEB
|
||
WriteReg(AutoTestReg, 0x00);
|
||
WriteReg(TypeBReg, 0x01);//0xc0
|
||
WriteReg(ModWidthReg,0x26); //0x68
|
||
// WriteReg(DemodReg, 0x5D);
|
||
WriteReg(CollReg, 0xa0);
|
||
WriteReg(RFCfgReg, 0x70);//0x48
|
||
WriteReg(DivlEnReg, 0x80);
|
||
|
||
// ------------------------- <20><><EFBFBD>ղ<EFBFBD><D5B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> ------------------------------
|
||
// <20>Ͷ<EFBFBD>λΪ<CEBB><CEAA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>棬
|
||
// 00,10,20,30,40,50,60,70
|
||
// 18,23,18,23,33,38,43,48dB
|
||
//WriteReg(RFCfgReg, 0x78); //0x70
|
||
//WriteReg(RFCfgReg, 0x70);// 0x59 RegRxControl1//73,
|
||
WriteReg(RxModeReg, 0x83); //0x83 // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>,,106kbps,14443B
|
||
WriteReg(RxThresholdReg, 0x65);//0x84 //0x75); // <20><><EFBFBD><EFBFBD>λ-><3E><>С<EFBFBD>ź<EFBFBD>ǿ<EFBFBD>ȣ<EFBFBD><C8A3><EFBFBD><EFBFBD><EFBFBD>λ-><3E><>ͻ<EFBFBD><CDBB>С<EFBFBD>ź<EFBFBD>ǿ<EFBFBD><C7BF>,<2C><><EFBFBD>0xF7
|
||
WriteReg(WaterLevelReg, 0x10);
|
||
// ------------------------- TYPEB<45><42><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>趨 -------------------------
|
||
iot_printf("+RxSelReg:0x%x\r\n",ReadReg(RxSelReg));
|
||
// ClearBitMask(RxSelReg,0x3F); // TR0
|
||
// SetBitMask(RxSelReg, 0x06);
|
||
iot_printf("-RxSelReg:0x%x\r\n",ReadReg(RxSelReg));
|
||
// ClearBitMask(TxModeReg, 0x80); // <20><>CRC,<2C><><EFBFBD><EFBFBD>żУ<C5BC><D0A3>
|
||
// ClearBitMask(RxModeReg, 0x80);
|
||
ClearBitMask(Status2Reg, 0x08); // MFCrypto1On =0
|
||
WriteReg(AnalogTestReg,0x68);
|
||
|
||
WriteReg(TestDAC2Reg,0x03);
|
||
|
||
WriteReg(0x2a,0x80);
|
||
WriteReg(0x2b,0x00);
|
||
WriteReg(0x2c,0x4f);
|
||
WriteReg(0x2d,0x00);
|
||
WriteReg(0x32,0x07);
|
||
WriteReg(0x33,0x00);
|
||
WriteReg(0x35,0x00);
|
||
WriteReg(0x36,0x40);
|
||
WriteReg(0x37,0x00);
|
||
WriteReg(0x38,0x00);
|
||
WriteReg(0x39,0x00);
|
||
WriteReg(0x3a,0x00);
|
||
|
||
// SetBitMask(TxSelReg, 0x17);
|
||
uint8_t ret;
|
||
i2c_test_data[0]=TxSelReg;
|
||
i2c_test_data[1]=0x27;
|
||
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr error\n");
|
||
}
|
||
|
||
|
||
i2c_test_data[0]=RxSelReg;
|
||
i2c_test_data[1]=0x86;
|
||
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr error\n");
|
||
}
|
||
|
||
nfc_write_access_write(0, TxSelReg, 0x04);
|
||
nfc_write_access_write(0, RxSelReg, 0x86);
|
||
|
||
iot_printf("TxModeReg:0x%x RxModeReg:0x%x Status2Reg:0x%x\r\n",ReadReg(TxModeReg),ReadReg(RxModeReg),ReadReg(Status2Reg));
|
||
// ------------------------- <20><><EFBFBD>߿<EFBFBD><DFBF><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> ------------------------------
|
||
//RC_Antenna(0);
|
||
//RC_DelayMs(1);
|
||
|
||
RC_Antenna(1);
|
||
/*ClearBitMask(Status2Reg,0x08);
|
||
WriteReg(ModeReg,0x2F);
|
||
WriteReg(TReloadRegL,30);
|
||
WriteReg(TReloadRegH,0);
|
||
WriteReg(TModeReg,0x8D);//
|
||
WriteReg(TPrescalerReg,0x3E);
|
||
WriteReg(TxASKReg,0);
|
||
WriteReg(GsNReg,0xF8);
|
||
WriteReg(CWGsPReg,0x3F);
|
||
WriteReg(ModGsPReg,0x0D);
|
||
WriteReg(TxModeReg,0x03);
|
||
WriteReg(BitFramingReg,0);//
|
||
WriteReg(AutoTestReg,0);
|
||
WriteReg(RFCfgReg,0x73);
|
||
WriteReg(RxModeReg,0x03);
|
||
WriteReg(RxThresholdReg,0x75);
|
||
ClearBitMask(RxSelReg,0x3F);
|
||
SetBitMask(RxSelReg,0x08);
|
||
ClearBitMask(TxModeReg,0x80);
|
||
ClearBitMask(RxModeReg,0x80);
|
||
ClearBitMask(Status2Reg,0x08);//
|
||
RC_Antenna(1);
|
||
WriteReg(TxASKReg, 0x00);
|
||
WriteReg(ControlReg, 0x10);
|
||
WriteReg(TxModeReg, 0x03);
|
||
WriteReg(RxModeReg, 0x0B);
|
||
WriteReg(TypeBReg, 0x03);
|
||
WriteReg(DemodReg, 0x4D);
|
||
WriteReg(GsNReg, 0xFF);
|
||
WriteReg(CWGsPReg, 0x3F);
|
||
WriteReg(ModGsPReg, 0x18);
|
||
WriteReg(RxThresholdReg, 0x4D);
|
||
WriteReg(ModWidthReg,0x68);
|
||
RC_Antenna(1);*/
|
||
break;
|
||
}
|
||
|
||
}
|
||
|
||
}
|
||
|
||
uint8_t RCRequestTypeB(void)
|
||
{
|
||
uint8_t status;
|
||
uint8_t len;
|
||
uint8_t buf[18] = {0};
|
||
|
||
buf[0] = 0x05;
|
||
buf[1] = 0x00;
|
||
buf[2] = 0x08;
|
||
|
||
//buf[3] = 0x71; // crc
|
||
//buf[4] = 0xFF;
|
||
//RC_CalulateCRC(buf, 3, &buf[3]);
|
||
status = RC_PcdCmd(PCD_TRANSCEIVE, buf, 3, buf, &len); //5 // <20>жϻ<D0B6>Ӧ<EFBFBD><D3A6><EFBFBD><EFBFBD><EFBFBD><EFBFBD>buf<75>Ƿ<EFBFBD>Ϊ"50,00,...."
|
||
|
||
iot_printf("%s: len:%d buff: 0x%x 0x%x 0x%x",__func__, len, buf[0], buf[1], buf[2]);
|
||
return status;
|
||
}
|
||
|
||
/**************************************************************************************
|
||
* FunctionName : RCATTRIBTypeB()
|
||
* Description : <20><>TypeB<65><42><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ATTRIBָ<42><D6B8>
|
||
* EntryParameter : None
|
||
* ReturnValue : <20>ɹ<EFBFBD><C9B9><EFBFBD><EFBFBD><EFBFBD>MI_OK
|
||
**************************************************************************************/
|
||
uint8_t RCATTRIBTypeB(void)
|
||
{
|
||
uint8_t status;
|
||
uint8_t len;
|
||
uint8_t buf[18] = {0};
|
||
|
||
buf[ 0] = 0x1D; // 1d 00 00 00 00 00 08 01 08
|
||
|
||
buf[ 1] = 0x00; // PUPI
|
||
buf[ 2] = 0x00;
|
||
buf[ 3] = 0x00;
|
||
buf[ 4] = 0x00;
|
||
|
||
buf[ 5] = 0x00;
|
||
buf[ 6] = 0x08;
|
||
buf[ 7] = 0x01;
|
||
buf[ 8] = 0x08;
|
||
|
||
buf[ 9] = 0xF3; // crc
|
||
buf[10] = 0x10;
|
||
//RC_CalulateCRC(buf, 9, &buf[9]);
|
||
status = RC_PcdCmd(PCD_TRANSCEIVE, buf, 11, buf, &len); // <20>жϻ<D0B6>Ӧ<EFBFBD><D3A6><EFBFBD><EFBFBD><EFBFBD><EFBFBD>buf<75>Ƿ<EFBFBD>Ϊ"08"
|
||
|
||
return status;
|
||
}
|
||
|
||
/**************************************************************************************
|
||
* FunctionName : RCGetUIDTypeB()
|
||
* Description : <20><>ȡUID
|
||
* EntryParameter : pUID - <20><><EFBFBD><EFBFBD>UID
|
||
* ReturnValue : <20>ɹ<EFBFBD><C9B9><EFBFBD><EFBFBD><EFBFBD>MI_OK
|
||
**************************************************************************************/
|
||
uint8_t RCGetUIDTypeB(uint8_t *pUID)
|
||
{
|
||
uint8_t status;
|
||
uint8_t len;
|
||
uint8_t buf[18] = {0};
|
||
|
||
buf[0] = 0x00;
|
||
buf[1] = 0x36;
|
||
buf[2] = 0x00;
|
||
buf[3] = 0x00;
|
||
buf[4] = 0x08;
|
||
|
||
buf[5] = 0x57; // crc
|
||
buf[6] = 0x44;
|
||
//RC_CalulateCRC(buf, 5, &buf[5]);
|
||
status = RC_PcdCmd(PCD_TRANSCEIVE, buf, 7, buf, &len); // <20>жϻ<D0B6>Ӧ<EFBFBD><D3A6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ƿ<EFBFBD>ΪUID "....9000"
|
||
if (status == 0)
|
||
{
|
||
os_mem_cpy(pUID, buf, 10);
|
||
}
|
||
|
||
return status;
|
||
}
|
||
|
||
|
||
void i2c_test_task()
|
||
{
|
||
// gpio reset
|
||
gpio_rst_test(24); //52
|
||
iot_printf("rst finished!!\n");
|
||
|
||
// i2c master init
|
||
g_cfg.port = IOT_I2C_PORT_0;
|
||
g_cfg.nack_wait_num = 1;
|
||
g_cfg.baud = 400;//300
|
||
g_cfg.gpio.scl = 25; //53
|
||
g_cfg.gpio.sda = 26; //54
|
||
iot_i2c_module_init(&g_cfg);
|
||
|
||
int ret = 0;
|
||
char value;
|
||
char buff[64]= {0};
|
||
int i;
|
||
|
||
while(0) //typeB wake up only for MFRC523
|
||
{
|
||
DAC_init();
|
||
WriteReg(CommandReg, PCD_RESETPHASE);
|
||
os_delay(1000);//100
|
||
RC_PcdISOType(RC_ISO14443_B);
|
||
|
||
while(1)
|
||
{
|
||
RCRequestTypeB();
|
||
}
|
||
// RCATTRIBTypeB();
|
||
// RCGetUIDTypeB((uint8_t *)buff);
|
||
|
||
iot_printf("%x %x %x %x %x %x %x %x %x %x\r\n",buff[0],buff[1],buff[2],buff[3],buff[4],buff[5],buff[6],buff[7],buff[8],buff[9]);
|
||
for(int i = 0 ; i < 16000 ; i ++);
|
||
os_delay(100);
|
||
}
|
||
|
||
|
||
#if 0
|
||
i2c_test_data[0]=0x01;
|
||
i2c_test_data[1]=0x0f;
|
||
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr error\n");
|
||
}
|
||
|
||
i2c_test_data[0]=0x13;
|
||
i2c_test_data[1]=0x00;
|
||
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr error\n");
|
||
}
|
||
|
||
i2c_test_data[0]=0x14;
|
||
i2c_test_data[1]=0x83;
|
||
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr error\n");
|
||
}
|
||
|
||
i2c_test_data[0]=0x26;
|
||
i2c_test_data[1]=0x78;
|
||
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr error\n");
|
||
}
|
||
|
||
i2c_test_data[0]=0x01;
|
||
i2c_test_data[1]=0x08;
|
||
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr error\n");
|
||
}
|
||
#endif
|
||
|
||
///////////////////////////////////////////////////////////////////////////////////////////
|
||
|
||
|
||
|
||
DAC_init();
|
||
|
||
i2c_test_data[0]=0x01;
|
||
i2c_test_data[1]=0x0f;
|
||
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr error\n");
|
||
// return ret;
|
||
}
|
||
|
||
nfc_write_access_write(0,1,0xf);
|
||
os_delay(1000);
|
||
|
||
i2c_test_data[0]=0x02;
|
||
i2c_test_data[1]=0x60;
|
||
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr error\n");
|
||
// return ret;
|
||
}
|
||
nfc_write_access_write(0,0x02,0x60);
|
||
|
||
i2c_test_data[0]=0x16;
|
||
i2c_test_data[1]=0x27;//0x27
|
||
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr error\n");
|
||
// return ret;
|
||
}
|
||
nfc_write_access_write(0,0x16,0x04);
|
||
iot_printf("cfg inter tx src\r\n");
|
||
|
||
|
||
while(1) //typeA wake up for nfc + MFRC523
|
||
{
|
||
i2c_test_data[0]=0x0c;
|
||
i2c_test_data[1]=0x90;//0x27
|
||
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr error\n");
|
||
// return ret;
|
||
}
|
||
nfc_write_access_write(0,0x0c,0x90);
|
||
#if 1
|
||
value=0x4;
|
||
ret = iot_i2c_write(0, test_dev_addr, (char *)(&value), 1);
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr errori 22222\n");
|
||
// return ret;
|
||
}
|
||
|
||
ret = iot_i2c_read(0, test_dev_addr, buff, 1);
|
||
//if slave wdata fifo is not empty, the master will receive nak at the end
|
||
if (ret) {
|
||
iot_printf("i2c_read_command get value error\n");
|
||
// return ret;
|
||
}
|
||
|
||
iot_printf("\nBef: irq stat 0x%x------0x%x\r\n",buff[0], nfc_write_access_read(value));
|
||
#endif
|
||
#if 0
|
||
i2c_test_data[0]=0x01;
|
||
i2c_test_data[1]=0x0f;
|
||
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr error\n");
|
||
// return ret;
|
||
}
|
||
|
||
nfc_write_access_write(0,1,0xf);
|
||
os_delay(1000);
|
||
#endif
|
||
|
||
|
||
i2c_test_data[0]=0x04;
|
||
i2c_test_data[1]=(buff[0]&0x7f);
|
||
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr error\n");
|
||
// return ret;
|
||
}
|
||
nfc_write_access_write(0,0x04,(nfc_write_access_read(value)&0x7f));
|
||
iot_printf("Clean intr......\r\n\n");
|
||
|
||
value=0x4;
|
||
ret = iot_i2c_write(0, test_dev_addr, (char *)(&value), 1);
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr errori 22222\n");
|
||
// return ret;
|
||
}
|
||
|
||
ret = iot_i2c_read(0, test_dev_addr, buff, 1);
|
||
//if slave wdata fifo is not empty, the master will receive nak at the end
|
||
if (ret) {
|
||
iot_printf("i2c_read_command get value error\n");
|
||
// return ret;
|
||
}
|
||
iot_printf("AFT0000: irq stat 0x%x------0x%x\r\n",buff[0], nfc_write_access_read(value));
|
||
|
||
i2c_test_data[0]=0x01;
|
||
i2c_test_data[1]=0x20;
|
||
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr error\n");
|
||
// return ret;
|
||
}
|
||
nfc_write_access_write(0,0x01,0x20);
|
||
os_delay(1000);
|
||
|
||
#if 0
|
||
i2c_test_data[0]=0x01;
|
||
i2c_test_data[1]=0x20;
|
||
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr error\n");
|
||
// return ret;
|
||
}
|
||
nfc_write_access_write(0,0x01,0x20);
|
||
#endif
|
||
|
||
iot_printf("\n\n...................................\n");
|
||
i2c_test_data[0]=0x0a;
|
||
i2c_test_data[1]=0x80;
|
||
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr error\n");
|
||
// return ret;
|
||
}
|
||
nfc_write_access_write(0,0x0a,0x80);
|
||
iot_printf("Clean FIFO......\r\n\n");
|
||
#if 1
|
||
#if 0 /////////////////////////2
|
||
i2c_test_data[0]=0x02;
|
||
i2c_test_data[1]=0x60;
|
||
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr error\n");
|
||
// return ret;
|
||
}
|
||
nfc_write_access_write(0,0x02,0x60);
|
||
#endif
|
||
i2c_test_data[0]=0x03;
|
||
i2c_test_data[1]=0x80;
|
||
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr error\n");
|
||
// return ret;
|
||
}
|
||
nfc_write_access_write(0,0x03,0x80);
|
||
value=0x4;
|
||
ret = iot_i2c_write(0, test_dev_addr, (char *)(&value), 1);
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr errori 22222\n");
|
||
// return ret;
|
||
}
|
||
|
||
ret = iot_i2c_read(0, test_dev_addr, buff, 1);
|
||
//if slave wdata fifo is not empty, the master will receive nak at the end
|
||
if (ret) {
|
||
iot_printf("i2c_read_command get value error\n");
|
||
// return ret;
|
||
}
|
||
iot_printf("AFT: irq stat 0x%x------0x%x\r\n",buff[0], nfc_write_access_read(value));
|
||
#endif
|
||
buff[0]=0x09; buff[1]=0x52;
|
||
ret = iot_i2c_write(0, test_dev_addr, buff, 2);//16
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr error.\n");
|
||
// return ret;
|
||
}
|
||
nfc_write_access_write(0,0x09,0x52);
|
||
iot_printf("config fifo\r\n");
|
||
|
||
|
||
value=0x0a;
|
||
ret = iot_i2c_write(0, test_dev_addr, (char *)(&value), 1);
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr errori 22222\n");
|
||
// return ret;
|
||
}
|
||
|
||
ret = iot_i2c_read(0, test_dev_addr, buff, 1);
|
||
//if slave wdata fifo is not empty, the master will receive nak at the end
|
||
if (ret) {
|
||
iot_printf("i2c_read_command get value error\n");
|
||
// return ret;
|
||
}
|
||
|
||
iot_printf("tx fifo num: 0x%x------0x%x\r\n",buff[0], nfc_write_access_read(value));
|
||
|
||
i2c_test_data[0]=0x12;
|
||
i2c_test_data[1]=0x00;
|
||
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr error\n");
|
||
// return ret;
|
||
}
|
||
nfc_write_access_write(0,0x12,0x00);
|
||
iot_printf("config tx speed\r\n");
|
||
|
||
i2c_test_data[0]=0x14;
|
||
i2c_test_data[1]=0xa3;
|
||
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr error\n");
|
||
// return ret;
|
||
}
|
||
nfc_write_access_write(0,0x14,0xa3);
|
||
iot_printf("ctrl tx1 tx2\r\n");
|
||
#if 1 //////////////3
|
||
i2c_test_data[0]=0x16;
|
||
i2c_test_data[1]=0x27;//0x27
|
||
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr error\n");
|
||
// return ret;
|
||
}
|
||
nfc_write_access_write(0,0x16,0x04);
|
||
iot_printf("cfg inter tx src\r\n");
|
||
#endif
|
||
i2c_test_data[0]=0x15;
|
||
i2c_test_data[1]=0x40;
|
||
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr error\n");
|
||
// return ret;
|
||
}
|
||
nfc_write_access_write(0,0x15,0x40);
|
||
|
||
i2c_test_data[0]=0x17;
|
||
i2c_test_data[1]=0x84; //0x84
|
||
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr error\n");
|
||
// return ret;
|
||
}
|
||
nfc_write_access_write(0,0x17,0x84);//0x84
|
||
|
||
i2c_test_data[0]=0x18;
|
||
i2c_test_data[1]=0x7f;
|
||
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr error\n");
|
||
// return ret;
|
||
}
|
||
nfc_write_access_write(0,0x18,0x7f);
|
||
|
||
i2c_test_data[0]=0x27;
|
||
i2c_test_data[1]=0x88;//0xf0
|
||
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr error\n");
|
||
// return ret;
|
||
}
|
||
nfc_write_access_write(0,0x27,0x88);//0xf0
|
||
|
||
i2c_test_data[0]=0x28;
|
||
i2c_test_data[1]=0x3f;
|
||
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr error\n");
|
||
// return ret;
|
||
}
|
||
nfc_write_access_write(0,0x28,0x3f);
|
||
iot_printf("cfg ant p no wrk ratio\r\n");
|
||
|
||
i2c_test_data[0]=0x29;
|
||
i2c_test_data[1]=0x00;
|
||
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr error\n");
|
||
// return ret;
|
||
}
|
||
nfc_write_access_write(0,0x29,0x00);
|
||
iot_printf("cfg ant p wrk ratio\r\n");
|
||
|
||
i2c_test_data[0]=0x13;
|
||
i2c_test_data[1]=0;//0x04;//0x00
|
||
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr error\n");
|
||
// return ret;
|
||
}
|
||
nfc_write_access_write(0,0x13,0);//0x04);//0x00
|
||
|
||
i2c_test_data[0]=0x26;
|
||
i2c_test_data[1]=0x78;
|
||
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr error\n");
|
||
// return ret;
|
||
}
|
||
nfc_write_access_write(0,0x26,0x78);
|
||
|
||
i=0;
|
||
while(i<10)
|
||
buff[i++]=0;
|
||
|
||
buff[20]=0;
|
||
|
||
os_delay(10);
|
||
i2c_test_data[0]=0x01;
|
||
i2c_test_data[1]=0x0c;
|
||
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr error\n");
|
||
// return ret;
|
||
}
|
||
nfc_write_access_write(0,0x1,0xc);
|
||
|
||
|
||
// nfc_write_access_write(0,0xd,0x87);
|
||
// os_delay(10);
|
||
i2c_test_data[0]=0x0d;
|
||
i2c_test_data[1]=0x87; //0x80
|
||
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr error\n");
|
||
// return ret;
|
||
}
|
||
|
||
nfc_write_access_write(0,0xd,0x87);
|
||
os_delay(10);//500
|
||
#if 0
|
||
i=0;
|
||
while(i<30)
|
||
{
|
||
value=0x4;
|
||
ret = iot_i2c_write(0, test_dev_addr, (char *)(&value), 1);
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr errori 22222\n");
|
||
// return ret;
|
||
}
|
||
|
||
ret = iot_i2c_read(0, test_dev_addr, buff, 1);
|
||
//if slave wdata fifo is not empty, the master will receive nak at the end
|
||
if (ret) {
|
||
iot_printf("i2c_read_command get value error\n");
|
||
// return ret;
|
||
}
|
||
if(buff[0]& 0x20)
|
||
break;
|
||
|
||
iot_printf("%d: irq stat 0x%x\r\n", i, buff[0]);
|
||
os_delay(500);
|
||
i++;
|
||
|
||
buff[0]=0x09; buff[1]=0x52;
|
||
ret = iot_i2c_write(0, test_dev_addr, buff, 2);//16
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr error.\n");
|
||
// return ret;
|
||
}
|
||
|
||
os_delay(10);
|
||
i2c_test_data[0]=0x01;
|
||
i2c_test_data[1]=0x0c;
|
||
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr error\n");
|
||
// return ret;
|
||
}
|
||
|
||
os_delay(10);
|
||
i2c_test_data[0]=0x0d;
|
||
i2c_test_data[1]=0x80;
|
||
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr error\n");
|
||
// return ret;
|
||
}
|
||
os_delay(500);
|
||
}
|
||
#endif
|
||
value = 0x0a;
|
||
ret = iot_i2c_write(0, test_dev_addr, (char *)(&value), 1);
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr errori 22222\n");
|
||
// return ret;
|
||
}
|
||
|
||
ret = iot_i2c_read(0, test_dev_addr, (char *)(&buff[20]), 1);
|
||
//if slave wdata fifo is not empty, the master will receive nak at the end
|
||
if (ret) {
|
||
iot_printf("i2c_read_command get value error\n");
|
||
}
|
||
iot_printf("RX fifo num : %x------0x%x\n",buff[20], nfc_write_access_read(value));
|
||
// ret
|
||
|
||
#if 1
|
||
value = 0x09;
|
||
os_delay(10);//1000
|
||
ret = iot_i2c_write(0, test_dev_addr, (char *)(&value), 1);
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr errori 22222\n");
|
||
// return ret;
|
||
}
|
||
ret = iot_i2c_read(0, test_dev_addr, buff, 10);
|
||
//if slave wdata fifo is not empty, the master will receive nak at the end
|
||
if (ret) {
|
||
iot_printf("i2c_read_command get value error\n");
|
||
// return ret;
|
||
}
|
||
|
||
i=0;
|
||
while(i<5)
|
||
iot_printf(" 0x%x ------ 0x%x\r\n",buff[i++], nfc_write_access_read(value));
|
||
#endif
|
||
// os_delay(100);
|
||
}
|
||
|
||
|
||
///////////////////////////////////////////////////////////////////////////////////////////
|
||
while(1) //typeA wake up only for MFRC523
|
||
{
|
||
#if 1
|
||
value=0x4;
|
||
ret = iot_i2c_write(0, test_dev_addr, (char *)(&value), 1);
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr errori 22222\n");
|
||
// return ret;
|
||
}
|
||
|
||
ret = iot_i2c_read(0, test_dev_addr, buff, 1);
|
||
//if slave wdata fifo is not empty, the master will receive nak at the end
|
||
if (ret) {
|
||
iot_printf("i2c_read_command get value error\n");
|
||
// return ret;
|
||
}
|
||
|
||
iot_printf("\nBef: irq stat 0x%x\r\n",buff[0]);
|
||
#endif
|
||
i2c_test_data[0]=0x01;
|
||
i2c_test_data[1]=0x0f;
|
||
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr error\n");
|
||
// return ret;
|
||
}
|
||
iot_printf("\n\n.....................................................................\n");
|
||
i2c_test_data[0]=0x0a;
|
||
i2c_test_data[1]=0x80;
|
||
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr error\n");
|
||
// return ret;
|
||
}
|
||
iot_printf("Clean FIFO......\r\n\n");
|
||
#if 1
|
||
i2c_test_data[0]=0x02;
|
||
i2c_test_data[1]=0x60;
|
||
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr error\n");
|
||
// return ret;
|
||
}
|
||
|
||
i2c_test_data[0]=0x03;
|
||
i2c_test_data[1]=0x80;
|
||
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr error\n");
|
||
// return ret;
|
||
}
|
||
|
||
value=0x4;
|
||
ret = iot_i2c_write(0, test_dev_addr, (char *)(&value), 1);
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr errori 22222\n");
|
||
// return ret;
|
||
}
|
||
|
||
ret = iot_i2c_read(0, test_dev_addr, buff, 1);
|
||
//if slave wdata fifo is not empty, the master will receive nak at the end
|
||
if (ret) {
|
||
iot_printf("i2c_read_command get value error\n");
|
||
// return ret;
|
||
}
|
||
iot_printf("AFT: irq stat 0x%x\r\n",buff[0]);
|
||
#endif
|
||
buff[0]=0x09; buff[1]=0x52;
|
||
ret = iot_i2c_write(0, test_dev_addr, buff, 2);//16
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr error.\n");
|
||
// return ret;
|
||
}
|
||
iot_printf("config fifo\r\n");
|
||
|
||
|
||
value=0x0a;
|
||
ret = iot_i2c_write(0, test_dev_addr, (char *)(&value), 1);
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr errori 22222\n");
|
||
// return ret;
|
||
}
|
||
|
||
ret = iot_i2c_read(0, test_dev_addr, buff, 1);
|
||
//if slave wdata fifo is not empty, the master will receive nak at the end
|
||
if (ret) {
|
||
iot_printf("i2c_read_command get value error\n");
|
||
// return ret;
|
||
}
|
||
|
||
iot_printf("tx fifo num: %x\r\n",buff[0]);
|
||
|
||
i2c_test_data[0]=0x12;
|
||
i2c_test_data[1]=0x00;
|
||
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr error\n");
|
||
// return ret;
|
||
}
|
||
iot_printf("config tx speed\r\n");
|
||
|
||
i2c_test_data[0]=0x14;
|
||
i2c_test_data[1]=0xa3;
|
||
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr error\n");
|
||
// return ret;
|
||
}
|
||
iot_printf("ctrl tx1 tx2\r\n");
|
||
|
||
i2c_test_data[0]=0x16;
|
||
i2c_test_data[1]=0x17;
|
||
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr error\n");
|
||
// return ret;
|
||
}
|
||
iot_printf("cfg inter tx src\r\n");
|
||
|
||
i2c_test_data[0]=0x15;
|
||
i2c_test_data[1]=0x40;
|
||
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr error\n");
|
||
// return ret;
|
||
}
|
||
i2c_test_data[0]=0x17;
|
||
i2c_test_data[1]=0x84;
|
||
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr error\n");
|
||
// return ret;
|
||
}
|
||
|
||
i2c_test_data[0]=0x18;
|
||
i2c_test_data[1]=0x7f;
|
||
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr error\n");
|
||
// return ret;
|
||
}
|
||
|
||
|
||
i2c_test_data[0]=0x27;
|
||
i2c_test_data[1]=0xf0;
|
||
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr error\n");
|
||
// return ret;
|
||
}
|
||
|
||
i2c_test_data[0]=0x28;
|
||
i2c_test_data[1]=0x3f;
|
||
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr error\n");
|
||
// return ret;
|
||
}
|
||
iot_printf("cfg ant p no wrk ratio\r\n");
|
||
|
||
i2c_test_data[0]=0x29;
|
||
i2c_test_data[1]=0x00;
|
||
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr error\n");
|
||
// return ret;
|
||
}
|
||
iot_printf("cfg ant p wrk ratio\r\n");
|
||
|
||
i2c_test_data[0]=0x13;
|
||
i2c_test_data[1]=0x00;
|
||
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr error\n");
|
||
// return ret;
|
||
}
|
||
|
||
i2c_test_data[0]=0x26;
|
||
i2c_test_data[1]=0x78;
|
||
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr error\n");
|
||
// return ret;
|
||
}
|
||
|
||
|
||
|
||
i=0;
|
||
while(i<10)
|
||
buff[i++]=0;
|
||
|
||
buff[20]=0;
|
||
|
||
os_delay(10);
|
||
i2c_test_data[0]=0x01;
|
||
i2c_test_data[1]=0x0c;
|
||
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr error\n");
|
||
// return ret;
|
||
}
|
||
iot_printf(".");
|
||
|
||
os_delay(10);
|
||
i2c_test_data[0]=0x0d;
|
||
i2c_test_data[1]=0x87; //0x80
|
||
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr error\n");
|
||
// return ret;
|
||
}
|
||
|
||
iot_printf(".\n");
|
||
os_delay(500);
|
||
#if 0
|
||
i=0;
|
||
while(i<30)
|
||
{
|
||
|
||
value=0x4;
|
||
ret = iot_i2c_write(0, test_dev_addr, (char *)(&value), 1);
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr errori 22222\n");
|
||
// return ret;
|
||
}
|
||
|
||
ret = iot_i2c_read(0, test_dev_addr, buff, 1);
|
||
//if slave wdata fifo is not empty, the master will receive nak at the end
|
||
if (ret) {
|
||
iot_printf("i2c_read_command get value error\n");
|
||
// return ret;
|
||
}
|
||
if(buff[0]& 0x20)
|
||
break;
|
||
|
||
iot_printf("%d: irq stat 0x%x\r\n", i, buff[0]);
|
||
os_delay(500);
|
||
i++;
|
||
|
||
buff[0]=0x09; buff[1]=0x52;
|
||
ret = iot_i2c_write(0, test_dev_addr, buff, 2);//16
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr error.\n");
|
||
// return ret;
|
||
}
|
||
|
||
os_delay(10);
|
||
i2c_test_data[0]=0x01;
|
||
i2c_test_data[1]=0x0c;
|
||
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr error\n");
|
||
// return ret;
|
||
}
|
||
|
||
os_delay(10);
|
||
i2c_test_data[0]=0x0d;
|
||
i2c_test_data[1]=0x80;
|
||
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr error\n");
|
||
// return ret;
|
||
}
|
||
os_delay(500);
|
||
}
|
||
#endif
|
||
value = 0x0a;
|
||
ret = iot_i2c_write(0, test_dev_addr, (char *)(&value), 1);
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr errori 22222\n");
|
||
// return ret;
|
||
}
|
||
|
||
ret = iot_i2c_read(0, test_dev_addr, (char *)(&buff[20]), 1);
|
||
//if slave wdata fifo is not empty, the master will receive nak at the end
|
||
if (ret) {
|
||
iot_printf("i2c_read_command get value error\n");
|
||
}
|
||
|
||
iot_printf("RX fifo num : %x\n",buff[20]);
|
||
// ret
|
||
|
||
#if 1
|
||
value = 0x09;
|
||
os_delay(1000);
|
||
ret = iot_i2c_write(0, test_dev_addr, (char *)(&value), 1);
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr errori 22222\n");
|
||
// return ret;
|
||
}
|
||
ret = iot_i2c_read(0, test_dev_addr, buff, 10);
|
||
//if slave wdata fifo is not empty, the master will receive nak at the end
|
||
if (ret) {
|
||
iot_printf("i2c_read_command get value error\n");
|
||
// return ret;
|
||
}
|
||
|
||
i=0;
|
||
|
||
while(i<10)
|
||
iot_printf(" 0x%x ",buff[i++]);
|
||
#endif
|
||
os_delay(100);
|
||
}
|
||
|
||
|
||
while(1)
|
||
{
|
||
#if 0
|
||
i2c_test_data[0]=0x01;
|
||
i2c_test_data[1]=0x0f;
|
||
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr error\n");
|
||
// return ret;
|
||
}
|
||
#if 1
|
||
//os_delay(50);
|
||
buff[0]=0x09;
|
||
ret = iot_i2c_write(0, test_dev_addr, buff, 26);
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr error.\n");
|
||
// return ret;
|
||
}
|
||
//os_delay(50);
|
||
#endif
|
||
i2c_test_data[0]=0x01;
|
||
i2c_test_data[1]=0x01;
|
||
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr error..\n");
|
||
// return ret;
|
||
}
|
||
//os_delay(50);
|
||
i2c_test_data[0]=0x36;
|
||
i2c_test_data[1]=0x09;
|
||
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr error...\n");
|
||
// return ret;
|
||
}
|
||
//os_delay(50);
|
||
i2c_test_data[0]=0x09;
|
||
i2c_test_data[1]=0x00;
|
||
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr error....\n");
|
||
|
||
// return ret;
|
||
}
|
||
//os_delay(50);
|
||
i2c_test_data[0]=0x01;
|
||
i2c_test_data[1]=0x03;
|
||
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr error.....\n");
|
||
// return ret;
|
||
}
|
||
//os_delay(50);
|
||
value=0x09;
|
||
ret = iot_i2c_write(0, test_dev_addr, (char *)(&value), 1);
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr errori ......\n");
|
||
// return ret;
|
||
}
|
||
//os_delay(50);
|
||
ret = iot_i2c_read(0, test_dev_addr, buff, 64);
|
||
if (ret) {
|
||
iot_printf("i2c_read_command get value error.......\n");
|
||
// return ret;
|
||
}
|
||
i =0;
|
||
while(i<64)
|
||
iot_printf("0x%x ",buff[i++]);
|
||
|
||
|
||
iot_printf("\r\n");
|
||
#endif
|
||
i2c_test_data[0]=0x01;
|
||
i2c_test_data[1]=0x0f;
|
||
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr error\n");
|
||
// return ret;
|
||
}
|
||
|
||
iot_printf("RESET\r\n");
|
||
//os_delay(50);
|
||
buff[0]=0x09; buff[1]=0x00; buff[2]=0xd3;buff[3]=0x0f;buff[4]=0xaa;buff[5]=0x33;buff[6]=0xaa;buff[7]=0x33;
|
||
buff[8]=0xaa;buff[9]=0x33;buff[10]=0xaa;buff[11]=0x33;buff[12]=0xaa;buff[13]=0x33;buff[14]=0xaa;buff[15]=0x33;
|
||
ret = iot_i2c_write(0, test_dev_addr, buff, 16);
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr error.\n");
|
||
// return ret;
|
||
}
|
||
iot_printf("config fifo\r\n");
|
||
|
||
i2c_test_data[0]=0x12;
|
||
i2c_test_data[1]=0x00;
|
||
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr error\n");
|
||
// return ret;
|
||
}
|
||
iot_printf("config tx speed\r\n");
|
||
|
||
i2c_test_data[0]=0x14;
|
||
i2c_test_data[1]=0x83;
|
||
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr error\n");
|
||
// return ret;
|
||
}
|
||
iot_printf("ctrl tx1 tx2\r\n");
|
||
|
||
i2c_test_data[0]=0x16;
|
||
i2c_test_data[1]=0x10;
|
||
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr error\n");
|
||
// return ret;
|
||
}
|
||
iot_printf("cfg inter tx src\r\n");
|
||
|
||
i2c_test_data[0]=0x27;
|
||
i2c_test_data[1]=0xf0;
|
||
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr error\n");
|
||
// return ret;
|
||
}
|
||
iot_printf("cfg ant N ratio\r\n");
|
||
|
||
i2c_test_data[0]=0x28;
|
||
i2c_test_data[1]=0x3f;
|
||
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr error\n");
|
||
// return ret;
|
||
}
|
||
iot_printf("cfg ant p no wrk ratio\r\n");
|
||
|
||
i2c_test_data[0]=0x29;
|
||
i2c_test_data[1]=0x00;
|
||
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr error\n");
|
||
// return ret;
|
||
}
|
||
iot_printf("cfg ant p wrk ratio\r\n");
|
||
|
||
|
||
i2c_test_data[0]=0x01;
|
||
i2c_test_data[1]=0x04;
|
||
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr error\n");
|
||
// return ret;
|
||
}
|
||
iot_printf("send fifo\r\n");
|
||
|
||
|
||
}
|
||
|
||
// todo : if write match write pattern, put buffer info wdata fifo
|
||
|
||
while(1) //do a nfc module regs test
|
||
{
|
||
value=0x18;
|
||
os_delay(100);
|
||
ret = iot_i2c_write(0, test_dev_addr, (char *)(&value), 1);
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr errori 22222\n");
|
||
// return ret;
|
||
}
|
||
|
||
ret = iot_i2c_read(0, test_dev_addr, buff, 1);
|
||
//if slave wdata fifo is not empty, the master will receive nak at the end
|
||
if (ret) {
|
||
iot_printf("i2c_read_command get value error\n");
|
||
// return ret;
|
||
}
|
||
iot_printf("1, 0x%x,0x%x,0x%x,0x%x,\r\n",buff[0],buff[1],buff[2],buff[3]);
|
||
|
||
value=0x26;
|
||
os_delay(100);
|
||
ret = iot_i2c_write(0, test_dev_addr, (char *)(&value), 1);
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr errori 22222\n");
|
||
// return ret;
|
||
}
|
||
|
||
ret = iot_i2c_read(0, test_dev_addr, buff, 1);
|
||
//if slave wdata fifo is not empty, the master will receive nak at the end
|
||
if (ret) {
|
||
iot_printf("i2c_read_command get value error\n");
|
||
// return ret;
|
||
}
|
||
iot_printf("2, 0x%x,0x%x,0x%x,0x%x\r\n",buff[0],buff[1],buff[2],buff[3]);
|
||
|
||
value = 0x24;
|
||
os_delay(100);
|
||
ret = iot_i2c_write(0, test_dev_addr, (char *)(&value), 1);
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr errori 22222\n");
|
||
// return ret;
|
||
}
|
||
|
||
ret = iot_i2c_read(0, test_dev_addr, buff, 1);
|
||
//if slave wdata fifo is not empty, the master will receive nak at the end
|
||
if (ret) {
|
||
iot_printf("i2c_read_command get value error\n");
|
||
// return ret;
|
||
}
|
||
iot_printf("3,0x%x,0x%x,0x%x,0x%x\r\n",buff[0],buff[1],buff[2],buff[3]);
|
||
|
||
value = 0x37;
|
||
os_delay(100);
|
||
ret = iot_i2c_write(0, test_dev_addr, (char *)(&value), 1);
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr errori 22222\n");
|
||
// return ret;
|
||
}
|
||
|
||
ret = iot_i2c_read(0, test_dev_addr, buff, 1);
|
||
//if slave wdata fifo is not empty, the master will receive nak at the end
|
||
if (ret) {
|
||
iot_printf("i2c_read_command get value error\n");
|
||
// return ret;
|
||
}
|
||
iot_printf("version reg: 0x%x\r\n",buff[0]);
|
||
|
||
value = 0x09;
|
||
os_delay(100);
|
||
ret = iot_i2c_write(0, test_dev_addr, (char *)(&value), 1);
|
||
if (ret) {
|
||
iot_printf("i2c_read_command write addr errori 22222\n");
|
||
// return ret;
|
||
}
|
||
|
||
ret = iot_i2c_read(0, test_dev_addr, buff, 64);
|
||
//if slave wdata fifo is not empty, the master will receive nak at the end
|
||
if (ret) {
|
||
iot_printf("i2c_read_command get value error\n");
|
||
// return ret;
|
||
}
|
||
|
||
i=0;
|
||
|
||
while(i<64)
|
||
iot_printf(" 0x%x ",buff[i++]);
|
||
|
||
iot_printf("\r\n");
|
||
|
||
|
||
}
|
||
|
||
// send i2c command
|
||
while(1) {
|
||
#if TEST_CASE & I2C_S_WRITE
|
||
do {
|
||
int ret = 0;
|
||
ret = i2c_write_command(test_dev_addr, i2c_test_data[0],
|
||
i2c_test_data[1], i2c_test_data[2]);
|
||
if (ret) {
|
||
iot_printf("write regs error[%d]\n", ret);
|
||
} else {
|
||
iot_printf("write successful, \n");
|
||
}
|
||
} while(0);
|
||
#endif
|
||
|
||
#if TEST_CASE & I2C_S_READ
|
||
do {
|
||
uint8_t val = 0xaa;
|
||
if(i2c_read_command(test_dev_addr, 0xaa55, &val, 1)) {
|
||
iot_printf("read error\n");
|
||
} else {
|
||
iot_printf("read value: %02x\n", val);
|
||
}
|
||
} while(0);
|
||
#endif
|
||
|
||
#if TEST_CASE & I2C_S_FILE // test pmu rom code
|
||
// command control
|
||
// write reg
|
||
#define I2C_REG_CTRL (0x23)
|
||
#define I2C_REG_TRANS (0x45)
|
||
// read reg
|
||
#define I2C_REG_RLEN (0x67)
|
||
|
||
// reg control segment
|
||
#define I2C_CTRL_START (0x11)
|
||
#define I2C_CTRL_BOOT (0x33)
|
||
do {
|
||
int ret = 0;
|
||
uint8_t test_val = 0x22;
|
||
ret = i2c_write_file(test_dev_addr, I2C_REG_CTRL, &test_val, 1);
|
||
iot_printf("send stop command\n");
|
||
// send start trans reg
|
||
uint8_t start_val = I2C_CTRL_START;
|
||
ret = i2c_write_file(test_dev_addr, I2C_REG_CTRL, &start_val, 1);
|
||
iot_printf("send start command\n");
|
||
|
||
// send code
|
||
uint8_t *p = pmu_test_bin;
|
||
uint8_t step = 4;
|
||
uint32_t cnt = pmu_test_bin_len / step;
|
||
uint32_t left = pmu_test_bin_len % step;
|
||
for(uint32_t i = 0; i < cnt; i++) {
|
||
ret = i2c_write_file(test_dev_addr, I2C_REG_TRANS, p+i*step, step);
|
||
if (ret) {
|
||
iot_printf("write regs error[%d]\n");
|
||
} else {
|
||
iot_printf("write successful,i =%d\n", i);
|
||
}
|
||
}
|
||
if (left > 0) {
|
||
ret = i2c_write_file(test_dev_addr, I2C_REG_TRANS, p+cnt*step, left);
|
||
if (ret) {
|
||
iot_printf("write regs error[%d]\n");
|
||
} else {
|
||
iot_printf("write left successful, left: %d\n", left);
|
||
}
|
||
|
||
}
|
||
|
||
// read written length command
|
||
uint32_t len = 0;
|
||
ret = i2c_read_file(test_dev_addr, I2C_REG_RLEN, (uint8_t *)&len, 2);
|
||
if (ret) {
|
||
iot_printf("read regs error\n");
|
||
} else {
|
||
iot_printf("read successful\n");
|
||
iot_printf("len: %x\n", len);
|
||
}
|
||
|
||
// send boot command
|
||
uint8_t boot_val = I2C_CTRL_BOOT;
|
||
ret = i2c_write_file(test_dev_addr, I2C_REG_CTRL, &boot_val, 1);
|
||
if (ret) {
|
||
iot_printf("write regs error\n");
|
||
} else {
|
||
iot_printf("write successful\n");
|
||
}
|
||
iot_printf("send boot command\n");
|
||
while(1) {
|
||
os_delay(1000);
|
||
iot_printf(".............\n");
|
||
}
|
||
|
||
while(1);
|
||
} while(0);
|
||
#endif
|
||
}
|
||
}
|
||
|
||
void i2c_test_task_init()
|
||
{
|
||
os_task_h handle;
|
||
|
||
handle = os_create_task(i2c_test_task, NULL, 6);
|
||
if(handle != NULL) {
|
||
// iot_printf("task create successfully...\n");
|
||
}
|
||
}
|
||
|
||
void i2c_test_init()
|
||
{
|
||
/* init common modules */
|
||
iot_bitops_init();
|
||
|
||
/* init os related modules and utilities */
|
||
// os_utils_init();
|
||
|
||
/* gpio matrix enable */
|
||
gpio_mtx_enable();
|
||
|
||
|
||
/*init uart module*/
|
||
//iot_uart_init(1);
|
||
|
||
|
||
i2c_test_task_init();
|
||
|
||
}
|
||
|
||
void i2c_init_task(void *arg)
|
||
{
|
||
// iot_printf("task 1 entry....\n");
|
||
|
||
for(;;) {
|
||
i2c_test_init();
|
||
os_delete_task(test_init_handle);
|
||
}
|
||
}
|
||
|
||
int32_t i2c_task_init()
|
||
{
|
||
/* start plc lib task */
|
||
test_init_handle = os_create_task(i2c_init_task, NULL, 9);
|
||
//create the tasks;
|
||
if(test_init_handle != NULL) {
|
||
// iot_printf("task 1 init successfully...\n");
|
||
}
|
||
|
||
return 0;
|
||
}
|
||
|
||
int32_t i2c_task_start()
|
||
{
|
||
os_start_kernel();
|
||
|
||
return 0;
|
||
}
|
||
|
||
int32_t iot_platform_init()
|
||
{
|
||
platform_init();
|
||
system_clock_init();
|
||
// system_uart_init();
|
||
dbg_uart_init();
|
||
|
||
return 0;
|
||
}
|
||
|
||
int32_t iot_module_init(void)
|
||
{
|
||
//platform intialization;
|
||
iot_platform_init();
|
||
//create all the tasks;
|
||
i2c_task_init();
|
||
// iot_printf("starting...\n");
|
||
|
||
return 0;
|
||
}
|
||
|
||
int main(void)
|
||
{
|
||
//module init;
|
||
iot_module_init();
|
||
|
||
//module start;
|
||
i2c_task_start();
|
||
|
||
return 0;
|
||
}
|
||
|