2220 lines
68 KiB
C
Executable File
2220 lines
68 KiB
C
Executable File
/****************************************************************************
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Copyright(c) 2019 by Aerospace C.Power (Chongqing) Microelectronics. ALL RIGHTS RESERVED.
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This Information is proprietary to Aerospace C.Power (Chongqing) Microelectronics and MAY NOT
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be copied by any method or incorporated into another program without
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the express written consent of Aerospace C.Power. This Information or any portion
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thereof remains the property of Aerospace C.Power. The Information contained herein
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is believed to be accurate and Aerospace C.Power assumes no responsibility or
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liability for its use in any way and conveys no license or title under
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any patent or copyright and makes no representation or warranty that this
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Information is free from patent or copyright infringement.
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****************************************************************************/
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#include "mac_cert_test.h"
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#include "mac_tx_hw.h"
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#include "iot_io.h"
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#include "mac_desc_engine.h"
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#include "iot_bitops.h"
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#include "phy_chn.h"
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#include "phy_phase.h"
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#include "phy_reg.h"
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#include "os_utils.h"
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#include "tx_test_lib.h"
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#include "mac_msg.h"
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#include "mac.h"
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#include "hw_tonemask.h"
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#include "rx_pb_reorder.h"
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#include "plc_cert_test.h"
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#include "mpdu_header.h"
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#include "mac_rx_hw.h"
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#include "iot_board.h"
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#include "mac_sys_reg.h"
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#include "hw_reg_api.h"
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#include "hw_phy_api.h"
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#include "hw_phy_init.h"
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#include "phy_isr.h"
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#include "mac_pdev.h"
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#include "mac_tx_power.h"
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#include "multi_nid_sync.h"
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#include "iot_oem_api.h"
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#include "iot_oem.h"
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#include "mac_cert_sec_lib.h"
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#include "mac_rf_cert_test.h"
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#include "mac_rf_rx_hw.h"
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#include "phy_pm.h"
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#include "mac_vdev.h"
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#include "mac_sched.h"
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#include "mac_rf_sched.h"
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#include "mac_rf_tx_power.h"
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#include "phy_nf.h"
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#include "mp_mode.h"
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mac_mt_tx_ctxt_t *g_mt_ctxt = NULL;
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#if (CPLC_IOT_CERT_SUPPORT && (IOT_MP_MODE_DIRECT_ENABLE == 0))
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/* certification testing loopback mode, for band1, reduces some power and
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* improves left out of band PSD performance.
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*/
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#define PHY_CERT_LP_TX_POWER_REDUCE_DB 7
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uint32_t fill_pb_hdr_crc_rawdata(tx_pb_start *pb, uint8_t *pb_hdr_tlb, \
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uint32_t *pb_crc_tlb)
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{
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IOT_ASSERT(pb && pb_hdr_tlb && pb_crc_tlb);
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uint8_t i = 0;
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tx_pb_start *tmp = NULL;
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for(tmp = pb, i=0; tmp && (i < 4); tmp = tmp->next_pb)
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{
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tmp->sof_pb_header = pb_hdr_tlb[i];
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tmp->sw_pb_crc = pb_crc_tlb[i];
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i++;
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}
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return 0;
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}
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/*
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* @brief mm_to_cert_switch() - mm to cert mode .
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* @param cert_mode_type: cert mode type
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*/
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uint32_t mm_to_cert_switch(uint8_t cert_mode_type)
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{
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#if (PLC_PM_SWITCH_POLICY == 1)
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mac_vdev_t *vdev = get_vdev_ptr(PLC_PDEV_ID, PLC_DEFAULT_VDEV);
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mac_rf_vdev_t *rf_vdev = get_rf_vdev_ptr(PLC_PDEV_ID, RF_PDEV_ID,
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PLC_DEFAULT_VDEV);
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if (mac_vdev_cfg_get_node_role(vdev)!= PLC_DEV_ROLE_CCO) {
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/* stop current HW scheduler */
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mac_sched_stop(vdev);
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/* rf schedule stop */
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mac_rf_sched_stop(rf_vdev);
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uint64_t start_ntb = mac_sched_get_ntb64(vdev);
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mac_sched_set_csma_only(vdev, start_ntb, 0);
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mac_rf_sched_set_csma_only(rf_vdev, start_ntb, 0);
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}
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#endif
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/* mac rf certification mode config */
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mac_rf_cert_mode_cfg(cert_mode_type);
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if(CERT_TEST_CMD_ENTER_PHY_LP == cert_mode_type ||
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CERT_TEST_CMD_ENTER_PHY_RF_LP == cert_mode_type ||
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CERT_TEST_CMD_ENTER_PHY_RF_T == cert_mode_type ||
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CERT_TEST_CMD_ENTER_PHY_RF_AND_HPLC_LP == cert_mode_type ||
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CERT_TEST_CMD_ENTER_PHY_HPLC2RF_LP == cert_mode_type)
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{
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if (CERT_TEST_CMD_ENTER_PHY_LP != cert_mode_type) {
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/* rf mm to lp cert switch config */
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mac_rf_mm_to_lp_cert_switch();
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}
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/* switch hwq to debug mode */
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mac_txq_set_dbg_mode(HWQ_DEBUG_MODE);
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/* init debug mode hwq */
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mac_q_init(&g_mac_pdev[0]->hwq_hdl);
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/* enable hwq0 */
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mac_txq_cfg(MT_MODE_HWQ, 0, 0);
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/* disable bc alert dsr */
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mac_dsr_table_t *table = &p_mac_glb->dsr_table;
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g_mt_ctxt->dsr_tmp = table->entry[MAC_DSR_BC_ALERT_ID].dsr;
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table->entry[MAC_DSR_BC_ALERT_ID].dsr = NULL;
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}
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/* disable high power req feature and recover to normal power */
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mac_rf_tx_power_comen_en(0);
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mac_high_power_req_ena(g_mac_pdev[0]->vdev[0], false);
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uint8_t hplc_power = 0;
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int8_t rf_power = RF_TX_PWR_INVALID;
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mac_set_tx_power_cap(g_mac_pdev[0]->vdev[0], &hplc_power, &rf_power, 1);
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if (CERT_HPLC_WAR_TX_POWER_REDUCE &&
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cert_mode_type == CERT_TEST_CMD_ENTER_PHY_LP &&
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phy_band_id_get() == IOT_SUPPORT_TONE_100_230) {
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hplc_power = (uint8_t)phy_get_tx_pwr_limit(phy_proto_single_band_id_get());
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if (hplc_power > PHY_CERT_LP_TX_POWER_REDUCE_DB) {
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/* certification testing loop back mode, for KL3 band1, reduces some
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* power and improves left out of band PSD performance.
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*/
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hplc_power -= PHY_CERT_LP_TX_POWER_REDUCE_DB;
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phy_pwr_adjust_set(hplc_power);
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}
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}
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/* force rx phase not change */
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//phy_rx_phase_force_set(1, 1);
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return 0;
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}
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/*
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* @brief cert_to_mm_switch() - cert mode -> mm.
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* @param cert_mode_type: cert mode type
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* note: not used currently, as the cert mode to mm,
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* and now only need required reboot
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*/
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uint32_t cert_to_mm_switch(uint8_t cert_mode_type)
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{
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if(CERT_TEST_CMD_ENTER_PHY_LP == cert_mode_type)
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{
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mac_dsr_table_t *table = &p_mac_glb->dsr_table;
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table->entry[MAC_DSR_BC_ALERT_ID].dsr = g_mt_ctxt->dsr_tmp;
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}
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return 0;
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}
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/*
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* @brief cert_mode_stop() - cert mote to stop .
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* note: this function is called, only when cvg call stop vdev.
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* and not used currently, as the cert mode to stop
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* and now only need required reboot
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*/
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uint32_t cert_mode_stop()
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{
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if (mac_get_cert_test_mode())
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{
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mac_multi_sync_set_ena(PLC_PDEV_ID, true);
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rx_buf_ring_set_callback(&g_mac_pdev[0]->ring_hdl, NULL);
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/*cert_test mode switch to mission mode */
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cert_to_mm_switch(mac_get_cert_test_mode());
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/*reset g_mt_ctxt*/
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phy_set_g_mt_mode_sel(0);
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g_mt_ctxt->g_mt_mode_sel = 0;
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g_mt_ctxt->mt_msdu_tx_funt = NULL;
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g_mt_ctxt->mt_uart_h = 0;
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g_mt_ctxt->data_pkt = NULL;
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g_mt_ctxt->dsr_tmp = NULL;
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}
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return 0;
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}
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uint32_t mac_cert_test_phy_passthrough(iot_pkt_t *pkt_data)
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{
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iot_printf("this is mpdu transparent transmission!\n");
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#if HW_PLATFORM >= HW_PLATFORM_FPGA
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uint8_t *data_war = NULL;
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iot_pkt_push(pkt_data, PLC_FC_LEN);
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uint32_t pkt_len = iot_pkt_data_len(pkt_data) ;
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iot_pkt_t *uart_data = \
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iot_pkt_alloc(pkt_len, PLC_MAC_COMMON_MID);
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IOT_ASSERT(uart_data);
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iot_pkt_put(uart_data, pkt_len);
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uint8_t *dsr_data = iot_pkt_data(uart_data);
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uint8_t *src_data = iot_pkt_data(pkt_data);
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os_mem_cpy(dsr_data, src_data, pkt_len);
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if (g_mt_ctxt->cert_spur_war_en || g_mt_ctxt->cert_spike_war_en) {
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uint32_t war_data_len = iot_pkt_data_len(g_mt_ctxt->war_data);
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if (war_data_len == 0) {
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if (pkt_len <= MAC_CERT_WAR_TX_BUF_LEN) {
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iot_pkt_put(g_mt_ctxt->war_data, pkt_len);
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data_war = iot_pkt_data(g_mt_ctxt->war_data);
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os_mem_cpy(data_war, src_data, pkt_len);
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}
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} else if (war_data_len == pkt_len) {
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data_war = iot_pkt_data(g_mt_ctxt->war_data);
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if (os_mem_cmp(data_war, src_data, pkt_len)) {
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iot_pkt_reset(g_mt_ctxt->war_data);
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}
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} else {
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iot_pkt_reset(g_mt_ctxt->war_data);
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}
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}
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g_mt_ctxt->orgin_trans_flag = 1;
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iot_uart_send_taken(g_mt_ctxt->mt_uart_h, uart_data, NULL);
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iot_pkt_pull(pkt_data, PLC_FC_LEN);
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#else
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(void)pkt_data;
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#endif
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return 0;
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}
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void mac_cert_test_mac_trans(void *pdev, iot_pkt_t *mt_pkt)
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{
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(void)pdev;
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uint32_t ret;
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iot_printf("%s\n", __FUNCTION__);
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if (!mt_pkt) {
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IOT_ASSERT(0);
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return;
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}
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uint32_t mac_hdr_len = \
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mac_get_hdr_len((uint8_t)PHY_PROTO_TYPE_GET(), mt_pkt);
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if(!mac_hdr_len)
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{
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IOT_ASSERT(0);
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return;
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}
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if (iot_pkt_pull(mt_pkt, mac_hdr_len)) {
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ret = iot_uart_send_taken(g_mt_ctxt->mt_uart_h, mt_pkt, NULL);
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if (ret) {
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iot_printf("uart send failed.\n");
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}
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} else {
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IOT_ASSERT(0);
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}
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return;
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}
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void mac_cert_test_security_trans(void *pdev, iot_pkt_t *msdu)
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{
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uint8_t *data;
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iot_pkt_t *out_pkt;
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(void)pdev;
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#if CERT_TEST_DEBUG
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uint32_t start_ts, end_ts;
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start_ts = mac_sched_get_lts();
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#endif
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/* set pkt */
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data = iot_pkt_pull(msdu, mac_get_hdr_len((uint8_t)PHY_PROTO_TYPE_GET(),
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msdu));
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out_pkt = mac_cert_sec_cmd_parse(g_mt_ctxt->sec_mode, data,
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iot_pkt_data_len(msdu));
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if (out_pkt) {
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iot_uart_send_taken(g_mt_ctxt->mt_uart_h, out_pkt, NULL);
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}
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#if CERT_TEST_DEBUG
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end_ts = mac_sched_get_lts();
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iot_printf("sec time %u to %u, delta:%u(us)\n",
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start_ts, end_ts, (uint32_t)(end_ts - start_ts) / 25);
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#endif
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iot_pkt_free(msdu);
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}
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/*
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* @brief mac_cert_desc_init() - in loopback mode, get desc before use,
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* do not free when mac_tx_hw_comp.
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*/
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uint32_t mac_cert_desc_init()
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{
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tx_mpdu_start *mpdu = NULL;
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tx_mpdu_end *end = NULL;
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mac_desc_get(&g_mac_desc_eng, PLC_TX_MPDU_START_POOL, \
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(void**)&mpdu);
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mac_desc_get(&g_mac_desc_eng, PLC_TX_MPDU_END_POOL, \
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(void**)&end);
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IOT_ASSERT(mpdu && end);
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uint32_t pb_hdr_resv_crc_len = mac_get_pb_hdr_resv_crc_len(\
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FC_DELIM_SOF, PHY_PROTO_TYPE_GET());
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/*
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* base on the reg set fill the descriptor
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* NOTE: fill mac info would refer the following
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* cfg to fill the desc, so the following function
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* must be placed before the mac info filling
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*/
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mac_tx_mpdu_fill_macinfo(mpdu, MT_MODE_HWQ, 0, false, false, 0, 0, 0,
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pb_hdr_resv_crc_len, 0,
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true, true, end, NULL, NULL, false, 0, false, 0, 0, 0, true);
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mac_tx_mpdu_fill_phyinfo(mpdu, HW_DESC_TX_PORT_PLC, 128, PLC_PHASE_ALL, 0,
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0, 0, 0, 0);
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g_mt_ctxt->mpdu = mpdu;
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/*pb desc*/
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for(uint8_t i = 0; i<4; i++)
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{
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g_mt_ctxt->pb_st[i] = NULL;
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mac_desc_get(&g_mac_desc_eng, PLC_TX_PB_START_POOL, \
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(void**)&g_mt_ctxt->pb_st[i]);
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IOT_ASSERT(g_mt_ctxt->pb_st[i]);
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}
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return 0;
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}
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uint8_t mac_cert_is_nid_valid(nid_t nid)
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{
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uint8_t is_valid = 1;
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/* fix beijing cert test bed loopback case, and the value of the test bed
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* nid exceeds 16
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*/
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if ((iot_oem_get_user_type() != USER_TYPE_STATE_GRID_BJ) &&
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PHY_PROTO_TYPE_GET() == PLC_PROTO_TYPE_SG && nid > MAC_CERT_NID_MAX) {
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is_valid = 0;
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}
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return is_valid;
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}
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uint32_t mac_cert_loopback_handle(void *pdev, iot_pkt_t *mt_pkt)
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{
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uint32_t ret = CON_PKT_NOT_FREE;
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#if HW_PLATFORM >= HW_PLATFORM_FPGA
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IOT_ASSERT(mt_pkt);
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#if CERT_TEST_DEBUG
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iot_printf("%s\n", __FUNCTION__);
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#endif
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uint32_t tmi = 0, ext_tmi = 0;
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uint32_t pb_num = 0;
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uint32_t proto = PHY_PROTO_TYPE_GET();
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uint32_t network = (PLC_PROTO_TYPE_SPG == proto)? 1:0;
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uint8_t phase, user_type;
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rx_buf_hdr_t *rx_buf_t = \
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(rx_buf_hdr_t *)iot_pkt_data(mt_pkt);
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rx_mpdu_start *rx_mpdu_st = &(rx_buf_t->mpdu_st);
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rx_pb_start *pb_st = &(rx_buf_t->pb_st);
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rx_pb_end *pb_ed = &(rx_buf_t->pb_ed);
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void *fc = NULL;
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rx_fc_msg_t rx_fc_msg = { 0 };
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uint32_t pb_size;
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uint32_t i, j;
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if(pb_ed->rx_pb_crc_err)
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{
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iot_printf("rx a error pb! pb_ed_rxpbcrc = %d\n",\
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pb_ed->rx_pb_crc_err);
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return CON_PKT_NOT_CARE;
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}
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fc = mac_rx_mpdu_st_get_fc_addr(rx_mpdu_st);
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mac_get_rx_frm_msg_from_fc(PHY_PROTO_TYPE_GET(),
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fc, &rx_fc_msg);
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if (!mac_cert_is_nid_valid((nid_t)rx_fc_msg.nid)) {
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return CON_PKT_FREE;
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}
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uint8_t *tmp_src =\
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iot_pkt_block_ptr(mt_pkt, IOT_PKT_BLOCK_DATA);
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uint8_t *buf_addr = \
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tmp_src + sizeof(rx_buf_hdr_t);
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if(1 == pb_st->first_pb)
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{
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g_mt_ctxt->mpdu_st_tmp = rx_mpdu_st;
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}
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else
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{
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/* retrieve fc from ctxt */
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if (!g_mt_ctxt->mpdu_st_tmp) {
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return CON_PKT_NOT_CARE;
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}
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fc = mac_rx_mpdu_st_get_fc_addr(g_mt_ctxt->mpdu_st_tmp);
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mac_get_rx_frm_msg_from_fc(PHY_PROTO_TYPE_GET(),
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fc, &rx_fc_msg);
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}
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switch(rx_fc_msg.delimiter){
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case FC_DELIM_BEACON:
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{
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iot_printf("this is a beacon!, phase:%d\n",\
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rx_fc_msg.phase);
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if (proto == PLC_PROTO_TYPE_SG) {
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/*record beacon phase*/
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g_mt_ctxt->rx_phase = rx_fc_msg.phase;
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if (mac_cert_is_nid_valid(rx_fc_msg.nid)) {
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if (rx_fc_msg.phase == PLC_PHASE_ALL) {
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phase = PLC_PHASE_A;
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} else {
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phase = rx_fc_msg.phase;
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}
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phy_rx_phase_force_set(1, PLC_PHASE_TO_HW_PHASE(phase));
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}
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return CON_PKT_NOT_CARE;
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}
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else if (proto == PLC_PROTO_TYPE_SPG) {
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pb_num = 1;
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|
|
tmi = rx_fc_msg.tmi;
|
|
ext_tmi = rx_fc_msg.tmi_ext;
|
|
phy_get_pb_size(proto, tmi, ext_tmi,&pb_size);
|
|
/* bcn resv len = pld_crc + resv 1 + pb_crc */
|
|
uint32_t bcn_resv_len = mac_get_pb_pld_crc_len(FC_DELIM_BEACON, proto) + \
|
|
mac_get_pb_crc_len(FC_DELIM_BEACON, proto) + 1;
|
|
|
|
for(j = 0; j < (pb_size - bcn_resv_len); j++)
|
|
{
|
|
*(buf_addr + j) = ~(*(buf_addr + j));
|
|
}
|
|
|
|
mac_tx_mpdu_fill_pb_start(g_mt_ctxt->pb_st[0], NULL, buf_addr,\
|
|
0, 1, 1, proto);
|
|
|
|
/* NOTE: cur mpdu all pb offset should be the same, or tx_comp will err */
|
|
if (g_mt_ctxt->sw_buf_offset == 0) {
|
|
g_mt_ctxt->sw_buf_offset =
|
|
(uint32_t)(buf_addr - (uint8_t*)mt_pkt);
|
|
}
|
|
}
|
|
else {
|
|
IOT_ASSERT(0);
|
|
}
|
|
|
|
user_type = iot_oem_get_user_type();
|
|
if ((user_type == USER_TYPE_SOUTHEN_POWER_GRID_GX_NW21)
|
|
|| (USER_TYPE_SOUTHEN_POWER_GRID_GUIZHOU == user_type)) {
|
|
pb_ed->rx_pb_crc_err = 1;
|
|
ret = CON_PKT_NOT_CARE;
|
|
}
|
|
break;
|
|
}
|
|
case FC_DELIM_SOF:
|
|
{
|
|
#if CERT_TEST_DEBUG
|
|
iot_printf("this is a sof!\n");
|
|
#endif
|
|
pb_num = rx_fc_msg.pb_num;
|
|
|
|
tmi = rx_fc_msg.tmi;
|
|
ext_tmi = rx_fc_msg.tmi_ext;
|
|
|
|
phy_get_pb_size(PHY_PROTO_TYPE_GET(), tmi, ext_tmi,&pb_size);
|
|
#if CERT_TEST_DEBUG
|
|
if(1 == pb_st->first_pb)
|
|
{
|
|
g_mt_ctxt->raw_snr = mac_rx_mpdu_st_get_avg_snr(rx_mpdu_st);
|
|
mac_rx_mpdu_st_set_avg_snr(rx_mpdu_st,
|
|
phy_rx_snr_cal(
|
|
mac_rx_mpdu_st_get_phy_info_addr(rx_mpdu_st),
|
|
mac_rx_mpdu_st_get_rx_phase(rx_mpdu_st)));
|
|
}
|
|
mac_rx_debug_log_sof_uicast_info(rx_fc_msg,
|
|
rx_mpdu_st, (rx_mpdu_end *)&(rx_buf_t->mpdu_ed), pb_st,
|
|
g_mt_ctxt->raw_snr);
|
|
#endif
|
|
if (pb_st->ssn >= MAX_PB_NUM_4) {
|
|
/* if ssn not match sg standard, need free this pkt */
|
|
pb_ed->rx_pb_crc_err = 1;
|
|
return CON_PKT_NOT_CARE;
|
|
}
|
|
/* NOTE: cur mpdu all pb offset should be the same, or tx_comp will err */
|
|
if (g_mt_ctxt->sw_buf_offset == 0) {
|
|
g_mt_ctxt->sw_buf_offset = (uint32_t)(buf_addr - (uint8_t*)mt_pkt);
|
|
}
|
|
|
|
if (g_mt_ctxt->all_pb_loopbacked == 1) {
|
|
g_mt_ctxt->all_pb_loopbacked = 0;
|
|
g_mt_ctxt->rx_pb_cnt = 0;
|
|
g_mt_ctxt->pb_st[0]->pb_buf_addr = 0;
|
|
g_mt_ctxt->pb_st[1]->pb_buf_addr = 0;
|
|
g_mt_ctxt->pb_st[2]->pb_buf_addr = 0;
|
|
g_mt_ctxt->pb_st[3]->pb_buf_addr = 0;
|
|
}
|
|
|
|
if (1 == pb_st->first_pb || g_mt_ctxt->rx_first_pb == 0) {
|
|
/* flush all pb received */
|
|
if (g_mt_ctxt->rx_pb_cnt) {
|
|
g_mt_ctxt->rx_pb_cnt = 0;
|
|
for (i = 0; i < MAX_PB_NUM_4; i++) {
|
|
tx_pb_start *pb = g_mt_ctxt->pb_st[i];
|
|
if (pb->pb_buf_addr != 0) {
|
|
iot_pkt_t *tmp_buf = (iot_pkt_t*)(pb->pb_buf_addr - \
|
|
g_mt_ctxt->sw_buf_offset);
|
|
iot_pkt_free(tmp_buf);
|
|
pb->pb_buf_addr = 0;
|
|
}
|
|
}
|
|
}
|
|
}
|
|
if (1 == pb_st->first_pb) {
|
|
g_mt_ctxt->rx_first_pb = 1;
|
|
g_mt_ctxt->pb_st[0]->next_pb = NULL;
|
|
g_mt_ctxt->pb_st[1]->next_pb = NULL;
|
|
g_mt_ctxt->pb_st[2]->next_pb = NULL;
|
|
g_mt_ctxt->pb_st[3]->next_pb = NULL;
|
|
g_mt_ctxt->mpdu->pb_list = g_mt_ctxt->pb_st[0];
|
|
} else if (g_mt_ctxt->rx_first_pb == 0 || \
|
|
g_mt_ctxt->rx_pb_cnt != pb_st->ssn) {
|
|
/* TODO: this is assume the platform send correct ssn to us */
|
|
/* if mpdu's first pb is not first pb
|
|
* or received pb is not in sequence,
|
|
* just leave it, usually be freed later
|
|
* by main rx process
|
|
*/
|
|
return CON_PKT_NOT_CARE;
|
|
}
|
|
g_mt_ctxt->rx_pb_cnt++;
|
|
|
|
tx_pb_start *pb = g_mt_ctxt->pb_st[g_mt_ctxt->rx_pb_cnt - 1];
|
|
if(g_mt_ctxt->rx_pb_cnt > 1)
|
|
{
|
|
g_mt_ctxt->pb_st[(g_mt_ctxt->rx_pb_cnt - 1) - 1]->next_pb = pb;
|
|
}
|
|
pb->next_pb = NULL;
|
|
|
|
/*save pb header and pb crc*/
|
|
pb->sof_pb_header = ((uint8_t)pb_st->msdu_end<<7)\
|
|
|((uint8_t)pb_st->msdu_start<<6)\
|
|
|(uint8_t)pb_st->ssn;
|
|
|
|
/* define sof resve len */
|
|
uint32_t sof_resv_len = mac_get_pb_hdr_resv_crc_len(FC_DELIM_SOF, proto);
|
|
|
|
if (proto == PLC_PROTO_TYPE_SPG) {
|
|
user_type = iot_oem_get_user_type();
|
|
if ((USER_TYPE_SOUTHEN_POWER_GRID_GX_NW21 == user_type)
|
|
|| (USER_TYPE_SOUTHEN_POWER_GRID_GUIZHOU == user_type)) {
|
|
j = 0;
|
|
} else {
|
|
j = 4;
|
|
}
|
|
/* spg pld need take inverse */
|
|
for( ; j < (pb_size - sof_resv_len); j++) {
|
|
*(buf_addr + j) = ~(*(buf_addr + j));
|
|
}
|
|
/* spg just have ssn */
|
|
pb->sof_pb_header = pb_st->ssn;
|
|
} else {
|
|
/* note: current only have SG.
|
|
* spg pbcrc calculate by hw.
|
|
*/
|
|
uint8_t crc0 = *(uint8_t *)(tmp_src + sizeof(rx_buf_hdr_t) + \
|
|
+ (pb_size - sof_resv_len));
|
|
uint8_t crc1 = *(uint8_t *)(tmp_src + sizeof(rx_buf_hdr_t) + \
|
|
+ (pb_size - sof_resv_len) + 1);
|
|
uint8_t crc2 = *(uint8_t *)(tmp_src + sizeof(rx_buf_hdr_t) + \
|
|
+ (pb_size - sof_resv_len) + 2);
|
|
pb->sw_pb_crc = (crc2<<16) + (crc1<<8) + crc0;
|
|
}
|
|
|
|
pb->pb_buf_addr = (uint32_t)buf_addr;
|
|
break;
|
|
}
|
|
case FC_DELIM_SACK:
|
|
case FC_DELIM_NNCCO:
|
|
{
|
|
#if CERT_TEST_DEBUG
|
|
iot_printf("this is a NNCCO or ACK!\n");
|
|
#endif
|
|
g_mt_ctxt->mpdu->pb_list = NULL;
|
|
break;
|
|
}
|
|
default:
|
|
{
|
|
iot_printf("No frame type detected\n");
|
|
return CON_PKT_NOT_CARE;
|
|
}
|
|
}
|
|
if(1 == pb_st->last_pb)
|
|
{
|
|
uint8_t phase = g_mt_ctxt->rx_phase;
|
|
tx_mpdu_start *mpdu = g_mt_ctxt->mpdu;
|
|
IOT_ASSERT(mpdu);
|
|
tx_mpdu_end *end = mpdu->tx_status;
|
|
IOT_ASSERT(end);
|
|
|
|
/* TODO: maybe need support multi band.
|
|
* be careful g_mt_ctxt->band_id is proto band id or single band id.
|
|
*/
|
|
uint32_t tx_symbnum_ppb = \
|
|
phy_get_symppb_from_table(phy_def_hw_band_id_get(), tmi, ext_tmi);
|
|
uint32_t sw_tx_fl_ppb = \
|
|
phy_get_flppb_from_table(phy_def_hw_band_id_get(), tmi, ext_tmi);
|
|
if (tx_symbnum_ppb == 0 || sw_tx_fl_ppb == 0) {
|
|
iot_printf("%s,sym_ppb or fl_ppb = 0, band_id:%d, tmi:%d, exttmi:%d\n",\
|
|
__FUNCTION__, g_mt_ctxt->band_id, tmi, ext_tmi);
|
|
IOT_ASSERT(0);
|
|
}
|
|
uint32_t pb_mod;
|
|
phy_get_pb_mod(PHY_PROTO_TYPE_GET(), tmi, ext_tmi, &pb_mod);
|
|
uint32_t tx_phase = PLC_PHASE_TO_HW_PHASE(phase);
|
|
uint32_t sw_buf_offset = g_mt_ctxt->sw_buf_offset;
|
|
/* just sof and beacon need check sw_buf_offset */
|
|
if (rx_fc_msg.delimiter == FC_DELIM_SOF ||
|
|
rx_fc_msg.delimiter == FC_DELIM_BEACON) {
|
|
IOT_ASSERT(sw_buf_offset);
|
|
}
|
|
|
|
uint32_t pb_hdr_resv_crc_len = \
|
|
mac_get_pb_hdr_resv_crc_len(rx_fc_msg.delimiter, proto);
|
|
|
|
mpdu->tx_status->tx_done = 0;
|
|
mpdu->tx_status->tx_ok = 0;
|
|
|
|
mac_tx_mpdu_fill_macinfo(mpdu, MT_MODE_HWQ, pb_num, false, false,
|
|
tx_symbnum_ppb, sw_tx_fl_ppb, 0, pb_hdr_resv_crc_len, 0,
|
|
true, true, end, g_mt_ctxt->pb_st[0], NULL, false,
|
|
sw_buf_offset, false, 0, 0, 0, true);
|
|
|
|
mac_tx_mpdu_fill_phyinfo(mpdu, HW_DESC_TX_PORT_PLC, 128, tx_phase,
|
|
phy_def_hw_band_id_get(), 0, 0, pb_mod, 0);
|
|
|
|
/*
|
|
* fill fcinfo rawdata
|
|
* the other fields are no effect because
|
|
* of rawdata
|
|
*/
|
|
mac_tx_mpdu_fill_fcinfo(\
|
|
mpdu, proto, pb_num, phase, rx_fc_msg.delimiter, \
|
|
network, 0, 0, 0, 0, \
|
|
0xfff, 0, 0, 0, 0, 0, 0 , 0, (uint8_t *)fc);
|
|
|
|
/* NOTE: WAR: for etmi 1-2, may tx abort,
|
|
* we need use phy rate data mode only
|
|
*/
|
|
|
|
/* rawdata send cert mpdu */
|
|
mac_rawdata_send_cert_mpdu(MT_MODE_HWQ, mpdu, g_mt_ctxt->p_msg, fc,
|
|
tmi, ext_tmi);
|
|
|
|
if (rx_fc_msg.delimiter == FC_DELIM_SOF) {
|
|
if (g_mt_ctxt->rx_pb_cnt == pb_num) {
|
|
g_mt_ctxt->rx_pb_cnt = 0;
|
|
g_mt_ctxt->rx_first_pb = 0;
|
|
g_mt_ctxt->all_pb_loopbacked = 1;
|
|
} else {
|
|
/* sof not rx all pb */
|
|
iot_printf("pb miss:%d/%d\n", g_mt_ctxt->rx_pb_cnt, pb_num);
|
|
}
|
|
}
|
|
}
|
|
#else
|
|
(void)pdev;
|
|
(void)mt_pkt;
|
|
#endif
|
|
return ret;
|
|
}
|
|
|
|
void mac_cert_test_trans_war(iot_pkt_t *pkt_data)
|
|
{
|
|
uint32_t pkt_len = iot_pkt_data_len(pkt_data) ;
|
|
iot_printf("this is mpdu transparent transmission WAR!, pktlen:%d\n",
|
|
pkt_len);
|
|
if (pkt_len == 0) {
|
|
return;
|
|
}
|
|
iot_pkt_t *uart_data = iot_pkt_alloc(pkt_len, PLC_MAC_COMMON_MID);
|
|
IOT_ASSERT(uart_data);
|
|
iot_pkt_put(uart_data, pkt_len);
|
|
|
|
uint8_t *dst_data = iot_pkt_data(uart_data);
|
|
uint8_t *src_data = iot_pkt_data(pkt_data);
|
|
os_mem_cpy(dst_data, src_data, pkt_len);
|
|
|
|
g_mt_ctxt->orgin_trans_flag = 1;
|
|
|
|
iot_uart_send_taken(g_mt_ctxt->mt_uart_h, uart_data, NULL);
|
|
}
|
|
|
|
static void mac_cert_war_sof_add()
|
|
{
|
|
if (g_mt_ctxt->spur_att_cnt == MAC_CERT_SPUR_ATT_50DB) {
|
|
g_mt_ctxt->sof_50db_cnt++;
|
|
} else if (g_mt_ctxt->spur_att_cnt == MAC_CERT_SPUR_ATT_60DB) {
|
|
g_mt_ctxt->sof_60db_cnt++;
|
|
}
|
|
}
|
|
|
|
static void mac_cert_statis_trans_cnt()
|
|
{
|
|
g_mt_ctxt->sof_train_cnt = max(g_mt_ctxt->sof_50db_cnt,
|
|
g_mt_ctxt->sof_60db_cnt);
|
|
g_mt_ctxt->sof_60db_cnt = 0;
|
|
g_mt_ctxt->sof_50db_cnt = 0;
|
|
}
|
|
|
|
static void mac_cert_spike_check_flag_reset()
|
|
{
|
|
g_mt_ctxt->war_tmr_sts = MAC_CERT_TMR_INIT_STS;
|
|
g_mt_ctxt->spike_att_first_rcd = 0;
|
|
g_mt_ctxt->sof_50db_cnt = 0;
|
|
}
|
|
|
|
static void mac_cert_tt_spike_war()
|
|
{
|
|
if (!g_mt_ctxt->cert_spike_war_en) {
|
|
return;
|
|
}
|
|
|
|
uint32_t lsntbdlt = 0;
|
|
uint32_t curlsntb = mac_sched_get_lts();
|
|
|
|
if (g_mt_ctxt->spike_war_first == 0) {
|
|
g_mt_ctxt->spike_war_first = 1;
|
|
/* first entry */
|
|
g_mt_ctxt->spike_war_ntb = curlsntb;
|
|
return;
|
|
}
|
|
|
|
lsntbdlt = curlsntb - g_mt_ctxt->spike_war_ntb;
|
|
g_mt_ctxt->spike_war_ntb = curlsntb;
|
|
|
|
/* 1m spur exists only when 1m spur exists for two consecutive times */
|
|
/* < 1.5s */
|
|
if (lsntbdlt < MAC_CERT_1500MS_NTB) {
|
|
/* first record att */
|
|
if (g_mt_ctxt->spike_att_first_rcd == 0) {
|
|
/* now att is 50db */
|
|
g_mt_ctxt->spur_att_cnt = MAC_CERT_SPUR_ATT_50DB;
|
|
mac_cert_spike_check_flag_reset();
|
|
g_mt_ctxt->spike_att_first_rcd = 1;
|
|
}
|
|
/* > 6s */
|
|
} else if (lsntbdlt > MAC_CERT_6000MS_NTB) {
|
|
if (g_mt_ctxt->spike_att_first_rcd) {
|
|
g_mt_ctxt->spur_att_cnt++;
|
|
}
|
|
}
|
|
|
|
iot_printf("%s, firstrcd:%d, attcnt:%d, tmrflg:%d\n", __FUNCTION__,
|
|
g_mt_ctxt->spike_att_first_rcd, g_mt_ctxt->spur_att_cnt,
|
|
g_mt_ctxt->war_tmr_flg);
|
|
}
|
|
|
|
void mac_cert_tt_spike_war_check()
|
|
{
|
|
if (g_mt_ctxt->cert_spike_war_en == 0) {
|
|
return;
|
|
}
|
|
|
|
uint8_t nf = PHY_GET_NF();
|
|
if (g_mt_ctxt->spike_nf == 0) {
|
|
g_mt_ctxt->spike_nf = nf;
|
|
return;
|
|
}
|
|
if (nf > g_mt_ctxt->spike_nf) {
|
|
if (g_mt_ctxt->war_tmr_flg == 0 &&
|
|
(nf > 80 || nf - g_mt_ctxt->spike_nf > 65)) {
|
|
g_mt_ctxt->sof_train_cnt = 20;
|
|
|
|
if (g_mt_ctxt->sof_50db_cnt >= g_mt_ctxt->sof_train_cnt) {
|
|
g_mt_ctxt->spike_50db_ready_cnt = 0;
|
|
} else {
|
|
g_mt_ctxt->spike_50db_ready_cnt =
|
|
g_mt_ctxt->sof_train_cnt - g_mt_ctxt->sof_50db_cnt;
|
|
}
|
|
|
|
g_mt_ctxt->war_tmr_flg = 1;
|
|
g_mt_ctxt->orgin_trans_flag = 0;
|
|
|
|
if (g_mt_ctxt->spike_50db_ready_cnt == 0) {
|
|
g_mt_ctxt->war_tmr_sts = MAC_CERT_TMR_LONG_60DB_STS;
|
|
os_start_timer(g_mt_ctxt->cert_war_tmr,
|
|
MAC_CERT_WAR_TRANS_LONG_INTV_MS);
|
|
} else {
|
|
g_mt_ctxt->war_tmr_sts = MAC_CERT_TMR_SHORT_50DB_STS;
|
|
os_start_timer(g_mt_ctxt->cert_war_tmr,
|
|
MAC_CERT_WAR_TRANS_SHORT_INTV_MS);
|
|
}
|
|
|
|
iot_printf("%s, readycnt:%d\n", __FUNCTION__,
|
|
g_mt_ctxt->spike_50db_ready_cnt);
|
|
}
|
|
}
|
|
g_mt_ctxt->spike_nf = nf;
|
|
}
|
|
|
|
uint8_t mac_cert_get_spike_pd_detect_en()
|
|
{
|
|
if (g_mt_ctxt) {
|
|
return g_mt_ctxt->spike_pd_detect_en;
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
static void mac_cert_spike_pd_detect(uint32_t rx_bcn_ntb)
|
|
{
|
|
/* 6S beacon interval */
|
|
#define MAC_CERT_BCN_INT_NTB 150000000
|
|
/* bcn round */
|
|
#define MAC_CERT_BCN_ROUND 3
|
|
|
|
if (!g_mt_ctxt->spike_pd_detect_en) {
|
|
return;
|
|
}
|
|
|
|
if (g_mt_ctxt->spike_pd_detect_first) {
|
|
g_mt_ctxt->spike_pd_detect_first = 0;
|
|
g_mt_ctxt->last_bcn_ntb = rx_bcn_ntb;
|
|
/* rx first round bcn */
|
|
g_mt_ctxt->spike_detect_rxbcn_cnt = 1;
|
|
return;
|
|
}
|
|
|
|
if (rx_bcn_ntb - g_mt_ctxt->last_bcn_ntb > MAC_CERT_BCN_INT_NTB) {
|
|
g_mt_ctxt->spike_detect_rxbcn_cnt++;
|
|
if (g_mt_ctxt->spike_detect_rxbcn_cnt >= MAC_CERT_BCN_ROUND) {
|
|
g_mt_ctxt->spike_pd_detect_en = 0;
|
|
}
|
|
}
|
|
|
|
g_mt_ctxt->last_bcn_ntb = rx_bcn_ntb;
|
|
}
|
|
|
|
//now this function just handle physical layer transparent transfer mode
|
|
uint32_t mac_cert_test_handle(void *pdev, iot_pkt_t *mt_pkt)
|
|
{
|
|
#if HW_PLATFORM >= HW_PLATFORM_FPGA
|
|
IOT_ASSERT(mt_pkt);
|
|
#if CERT_TEST_DEBUG
|
|
iot_printf("%s\n", __FUNCTION__);
|
|
#endif
|
|
uint8_t pb_num = 0;
|
|
uint8_t tmi = 0;
|
|
uint8_t ext_tmi = 0, phase;
|
|
uint32_t pkt_len = 0;
|
|
uint32_t pb_size = 0;
|
|
|
|
rx_buf_hdr_t *rx_buf_t = \
|
|
(rx_buf_hdr_t *)iot_pkt_data(mt_pkt);
|
|
rx_attention *att = &(rx_buf_t->att);
|
|
rx_mpdu_start *rx_mpdu_st = &(rx_buf_t->mpdu_st);
|
|
rx_mpdu_end *rx_mpdu_ed = &(rx_buf_t->mpdu_ed);
|
|
rx_pb_start *pb_st = &(rx_buf_t->pb_st);
|
|
rx_pb_end *pb_ed = &(rx_buf_t->pb_ed);
|
|
void *fc = NULL;
|
|
|
|
if (att->rx_abort || att->is_fcserr) {
|
|
iot_printf("rx a error fc or abort!\n");
|
|
return CON_PKT_NOT_CARE;
|
|
}
|
|
|
|
if (1 == pb_st->first_pb) {
|
|
fc = mac_rx_mpdu_st_get_fc_addr(rx_mpdu_st);
|
|
os_mem_cpy(g_mt_ctxt->tmp_fc, fc, PLC_FC_LEN);
|
|
} else {
|
|
fc = g_mt_ctxt->tmp_fc;
|
|
}
|
|
|
|
rx_fc_msg_t rx_fc_msg = { 0 };
|
|
mac_get_rx_frm_msg_from_fc(PHY_PROTO_TYPE_GET(),\
|
|
fc, &rx_fc_msg);
|
|
|
|
if (pb_ed->rx_pb_crc_err) {
|
|
iot_printf("rx a error pb!\n");
|
|
if (g_mt_ctxt->cert_spur_war_en) {
|
|
if (rx_fc_msg.delimiter == FC_DELIM_SOF) {
|
|
mac_cert_war_sof_add();
|
|
mac_cert_test_trans_war(g_mt_ctxt->war_data);
|
|
}
|
|
}
|
|
return CON_PKT_NOT_CARE;
|
|
}
|
|
|
|
uint8_t *tmp_src =\
|
|
iot_pkt_block_ptr(mt_pkt, IOT_PKT_BLOCK_DATA);
|
|
|
|
switch(rx_fc_msg.delimiter){
|
|
case FC_DELIM_BEACON:
|
|
{
|
|
iot_printf("this is a beacon! , phase:%d\n", \
|
|
rx_fc_msg.phase);
|
|
if (mac_cert_is_nid_valid(rx_fc_msg.nid)) {
|
|
if (rx_fc_msg.phase == PLC_PHASE_ALL) {
|
|
phase = PLC_PHASE_A;
|
|
} else {
|
|
phase = rx_fc_msg.phase;
|
|
}
|
|
phy_rx_phase_force_set(1, PLC_PHASE_TO_HW_PHASE(phase));
|
|
}
|
|
mac_cert_spike_pd_detect(mac_rx_mpdu_end_get_ntb_timestamp(rx_mpdu_ed));
|
|
mac_cert_tt_spike_war();
|
|
return CON_PKT_NOT_CARE;
|
|
}
|
|
case FC_DELIM_SOF:
|
|
{
|
|
#if CERT_TEST_DEBUG
|
|
iot_printf("this is a sof!\n");
|
|
#endif
|
|
pb_num = rx_fc_msg.pb_num;
|
|
tmi = rx_fc_msg.tmi;
|
|
ext_tmi = rx_fc_msg.tmi_ext;
|
|
phy_get_pb_size(PHY_PROTO_TYPE_GET(), tmi, ext_tmi, &pb_size);
|
|
IOT_ASSERT(pb_size <= PB_SIZE_520 && pb_num <= MAX_PB_NUM_4);
|
|
|
|
/*judge whether it is the first pb*/
|
|
if(1 == pb_st->first_pb)
|
|
{
|
|
IOT_ASSERT(g_mt_ctxt->data_pkt);
|
|
iot_pkt_push(g_mt_ctxt->data_pkt, PLC_FC_LEN);
|
|
/*fc pull into pkt*/
|
|
uint8_t *tmp_fc = \
|
|
iot_pkt_block_ptr(g_mt_ctxt->data_pkt, IOT_PKT_BLOCK_DATA);
|
|
os_mem_cpy((uint8_t *)(tmp_fc), (uint8_t *)fc, PLC_FC_LEN);
|
|
/*record fc and pull */
|
|
iot_pkt_pull(g_mt_ctxt->data_pkt, PLC_FC_LEN);
|
|
pkt_len = pb_num * pb_size;
|
|
/* set tail = data */
|
|
iot_pkt_set_tail(g_mt_ctxt->data_pkt, \
|
|
iot_pkt_data(g_mt_ctxt->data_pkt));
|
|
/*put the pkt len*/
|
|
iot_pkt_put(g_mt_ctxt->data_pkt, pkt_len);
|
|
}
|
|
#if CERT_TEST_DEBUG
|
|
if(1 == pb_st->first_pb)
|
|
{
|
|
g_mt_ctxt->raw_snr = mac_rx_mpdu_st_get_avg_snr(rx_mpdu_st);
|
|
mac_rx_mpdu_st_set_avg_snr(rx_mpdu_st,
|
|
phy_rx_snr_cal(
|
|
mac_rx_mpdu_st_get_phy_info_addr(rx_mpdu_st),
|
|
mac_rx_mpdu_st_get_rx_phase(rx_mpdu_st)));
|
|
}
|
|
mac_rx_debug_log_sof_uicast_info(rx_fc_msg,
|
|
rx_mpdu_st, (rx_mpdu_end *)&(rx_buf_t->mpdu_ed), pb_st,
|
|
g_mt_ctxt->raw_snr);
|
|
#endif
|
|
/*put mutil-pb together and complete mpdu*/
|
|
IOT_ASSERT(g_mt_ctxt->data_pkt);
|
|
uint8_t *tmp_data = \
|
|
iot_pkt_block_ptr(g_mt_ctxt->data_pkt, IOT_PKT_BLOCK_DATA);
|
|
/* pb -> pb_header + pb + pb_crc */
|
|
if (pb_st->ssn >= 4) {
|
|
iot_printf("ssn = %d\n", pb_st->ssn);
|
|
IOT_ASSERT(0);
|
|
}
|
|
os_mem_cpy((uint8_t *)(tmp_data + (pb_st->ssn * pb_size)), \
|
|
(uint8_t *)(tmp_src + sizeof(rx_buf_hdr_t)), pb_size);
|
|
break;
|
|
}
|
|
case FC_DELIM_SACK:
|
|
case FC_DELIM_NNCCO:
|
|
{
|
|
#if CERT_TEST_DEBUG
|
|
iot_printf("this is a NNCCO or ACK!\n");
|
|
#endif
|
|
IOT_ASSERT(g_mt_ctxt->data_pkt);
|
|
iot_pkt_push(g_mt_ctxt->data_pkt, PLC_FC_LEN);
|
|
/*fc pull into pkt*/
|
|
uint8_t *tmp_fc = \
|
|
iot_pkt_block_ptr(g_mt_ctxt->data_pkt, IOT_PKT_BLOCK_DATA);
|
|
os_mem_cpy((uint8_t *)(tmp_fc), (uint8_t *)fc, PLC_FC_LEN);
|
|
/*record fc and pull */
|
|
iot_pkt_pull(g_mt_ctxt->data_pkt, PLC_FC_LEN);
|
|
/* set tail = data */
|
|
iot_pkt_set_tail(g_mt_ctxt->data_pkt, \
|
|
iot_pkt_data(g_mt_ctxt->data_pkt));
|
|
break;
|
|
}
|
|
default:
|
|
{
|
|
iot_printf("No frame type detected\n");
|
|
return CON_PKT_NOT_CARE;
|
|
}
|
|
}
|
|
|
|
if(1 == pb_st->last_pb)
|
|
{
|
|
IOT_ASSERT(g_mt_ctxt->data_pkt);
|
|
switch(mac_get_cert_test_mode()){
|
|
case CERT_TEST_CMD_ENTER_PHY_T:
|
|
{
|
|
mac_cert_war_sof_add();
|
|
mac_cert_test_phy_passthrough(g_mt_ctxt->data_pkt);
|
|
break;
|
|
}
|
|
default:
|
|
{
|
|
IOT_ASSERT(0);
|
|
break;
|
|
}
|
|
}
|
|
}
|
|
#else
|
|
(void)pdev;
|
|
(void)mt_pkt;
|
|
#endif
|
|
return CON_PKT_FREE;
|
|
}
|
|
|
|
uint32_t mac_cert_test_g_init()
|
|
{
|
|
iot_printf("%s\n", __FUNCTION__);
|
|
g_mt_ctxt = os_mem_malloc(IOT_FTM_MID,sizeof(mac_mt_tx_ctxt_t));
|
|
IOT_ASSERT(g_mt_ctxt);
|
|
os_mem_set(g_mt_ctxt, 0, sizeof(mac_mt_tx_ctxt_t));
|
|
g_mt_ctxt->cert_test_support = 1; //support cert test
|
|
g_mt_ctxt->p_msg = os_mem_malloc(IOT_FTM_MID,sizeof(fc_trans_msg));
|
|
os_mem_set(g_mt_ctxt->p_msg, 0, sizeof(fc_trans_msg));
|
|
g_mt_ctxt->raw_snr = INVALID_SNR;
|
|
return 0;
|
|
}
|
|
|
|
/* Post the data from uart port to the message queue. */
|
|
uint32_t mac_cert_uart_recv(uint8_t* buffer, uint32_t buffer_len,
|
|
bool_t is_full_frame, uint32_t invalid_data_len)
|
|
{
|
|
(void)buffer;
|
|
(void)buffer_len;
|
|
(void)is_full_frame;
|
|
(void)invalid_data_len;
|
|
return ERR_OK;
|
|
}
|
|
|
|
|
|
void mac_cert_war_tx_msg(timer_id_t timer_id, void * arg)
|
|
{
|
|
(void)timer_id;
|
|
(void)arg;
|
|
mac_msg_t *msg = mac_alloc_msg();
|
|
|
|
if (msg == NULL) {
|
|
iot_printf("mac cert war msg failed.\n");
|
|
IOT_ASSERT(0);
|
|
return;
|
|
}
|
|
msg->type = MAC_MSG_TYPE_TIMER;
|
|
msg->id = MAC_MSG_ID_MAC_CERT_WAR_TIMER;
|
|
|
|
mac_queue_msg(msg, MAC_MSG_QUEUE_HP);
|
|
}
|
|
|
|
void mac_cert_war_trans_handle()
|
|
{
|
|
iot_printf("%s sts:%d, orgin_trans_flag:%d, txcnt:%d\n", __FUNCTION__,
|
|
g_mt_ctxt->war_tmr_sts, g_mt_ctxt->orgin_trans_flag,
|
|
g_mt_ctxt->sof_train_cnt);
|
|
switch (g_mt_ctxt->war_tmr_sts) {
|
|
case MAC_CERT_TMR_SHORT_50DB_STS:
|
|
{
|
|
g_mt_ctxt->war_trans_cnt++;
|
|
|
|
if (g_mt_ctxt->orgin_trans_flag == 0) {
|
|
mac_cert_test_trans_war(g_mt_ctxt->war_data);
|
|
}
|
|
g_mt_ctxt->orgin_trans_flag = 0;
|
|
|
|
if (g_mt_ctxt->war_trans_cnt >= g_mt_ctxt->spike_50db_ready_cnt) {
|
|
g_mt_ctxt->war_trans_cnt = 0;
|
|
g_mt_ctxt->war_tmr_sts = MAC_CERT_TMR_LONG_60DB_STS;
|
|
os_stop_timer(g_mt_ctxt->cert_war_tmr);
|
|
os_start_timer(g_mt_ctxt->cert_war_tmr,
|
|
MAC_CERT_WAR_TRANS_LONG_INTV_MS);
|
|
return;
|
|
}
|
|
|
|
break;
|
|
}
|
|
case MAC_CERT_TMR_LONG_60DB_STS:
|
|
{
|
|
g_mt_ctxt->war_tmr_sts = MAC_CERT_TMR_SHORT_60DB_STS;
|
|
g_mt_ctxt->orgin_trans_flag = 0;
|
|
os_stop_timer(g_mt_ctxt->cert_war_tmr);
|
|
os_start_timer(g_mt_ctxt->cert_war_tmr,
|
|
MAC_CERT_WAR_TRANS_SHORT_INTV_MS);
|
|
break;
|
|
}
|
|
case MAC_CERT_TMR_SHORT_60DB_STS:
|
|
{
|
|
g_mt_ctxt->war_trans_cnt++;
|
|
|
|
if (g_mt_ctxt->orgin_trans_flag == 0) {
|
|
mac_cert_test_trans_war(g_mt_ctxt->war_data);
|
|
}
|
|
g_mt_ctxt->orgin_trans_flag = 0;
|
|
|
|
if (g_mt_ctxt->war_trans_cnt >= g_mt_ctxt->sof_train_cnt) {
|
|
g_mt_ctxt->war_trans_cnt = 0;
|
|
g_mt_ctxt->war_tmr_sts = MAC_CERT_TMR_LONG_70DB_STS;
|
|
os_stop_timer(g_mt_ctxt->cert_war_tmr);
|
|
os_start_timer(g_mt_ctxt->cert_war_tmr,
|
|
MAC_CERT_WAR_TRANS_LONG_INTV_MS);
|
|
return;
|
|
}
|
|
break;
|
|
}
|
|
case MAC_CERT_TMR_LONG_70DB_STS:
|
|
{
|
|
g_mt_ctxt->war_tmr_sts = MAC_CERT_TMR_SHORT_70DB_STS;
|
|
g_mt_ctxt->orgin_trans_flag = 0;
|
|
os_stop_timer(g_mt_ctxt->cert_war_tmr);
|
|
os_start_timer(g_mt_ctxt->cert_war_tmr,
|
|
MAC_CERT_WAR_TRANS_SHORT_INTV_MS);
|
|
break;
|
|
}
|
|
case MAC_CERT_TMR_SHORT_70DB_STS:
|
|
{
|
|
g_mt_ctxt->war_trans_cnt++;
|
|
|
|
if (g_mt_ctxt->orgin_trans_flag == 0) {
|
|
mac_cert_test_trans_war(g_mt_ctxt->war_data);
|
|
}
|
|
g_mt_ctxt->orgin_trans_flag = 0;
|
|
|
|
if (g_mt_ctxt->war_trans_cnt >= g_mt_ctxt->sof_train_cnt) {
|
|
g_mt_ctxt->war_trans_cnt = 0;
|
|
g_mt_ctxt->war_tmr_sts = MAC_CERT_TMR_LONG_80DB_STS;
|
|
os_stop_timer(g_mt_ctxt->cert_war_tmr);
|
|
os_start_timer(g_mt_ctxt->cert_war_tmr,
|
|
MAC_CERT_WAR_TRANS_LONG_INTV_MS);
|
|
return;
|
|
}
|
|
break;
|
|
}
|
|
case MAC_CERT_TMR_LONG_80DB_STS:
|
|
{
|
|
g_mt_ctxt->orgin_trans_flag = 0;
|
|
g_mt_ctxt->war_tmr_sts = MAC_CERT_TMR_SHORT_80DB_STS;
|
|
os_stop_timer(g_mt_ctxt->cert_war_tmr);
|
|
os_start_timer(g_mt_ctxt->cert_war_tmr,
|
|
MAC_CERT_WAR_TRANS_SHORT_INTV_MS);
|
|
break;
|
|
}
|
|
case MAC_CERT_TMR_SHORT_80DB_STS:
|
|
{
|
|
g_mt_ctxt->war_trans_cnt++;
|
|
|
|
if (g_mt_ctxt->orgin_trans_flag == 0) {
|
|
mac_cert_test_trans_war(g_mt_ctxt->war_data);
|
|
}
|
|
g_mt_ctxt->orgin_trans_flag = 0;
|
|
|
|
if (g_mt_ctxt->war_trans_cnt >= g_mt_ctxt->sof_train_cnt) {
|
|
g_mt_ctxt->war_trans_cnt = 0;
|
|
g_mt_ctxt->war_tmr_sts = MAC_CERT_TMR_LONG_90DB_STS;
|
|
os_stop_timer(g_mt_ctxt->cert_war_tmr);
|
|
os_start_timer(g_mt_ctxt->cert_war_tmr,
|
|
MAC_CERT_WAR_TRANS_LONG_INTV_MS);
|
|
return;
|
|
}
|
|
break;
|
|
}
|
|
case MAC_CERT_TMR_LONG_90DB_STS:
|
|
{
|
|
g_mt_ctxt->orgin_trans_flag = 0;
|
|
g_mt_ctxt->war_tmr_sts = MAC_CERT_TMR_SHORT_90DB_STS;
|
|
os_stop_timer(g_mt_ctxt->cert_war_tmr);
|
|
os_start_timer(g_mt_ctxt->cert_war_tmr,
|
|
MAC_CERT_WAR_TRANS_SHORT_INTV_MS);
|
|
break;
|
|
}
|
|
case MAC_CERT_TMR_SHORT_90DB_STS:
|
|
{
|
|
g_mt_ctxt->war_trans_cnt++;
|
|
|
|
if (g_mt_ctxt->orgin_trans_flag == 0) {
|
|
mac_cert_test_trans_war(g_mt_ctxt->war_data);
|
|
}
|
|
g_mt_ctxt->orgin_trans_flag = 0;
|
|
|
|
if (g_mt_ctxt->war_trans_cnt >= g_mt_ctxt->sof_train_cnt) {
|
|
g_mt_ctxt->war_trans_cnt = 0;
|
|
g_mt_ctxt->war_tmr_sts = MAC_CERT_TMR_LONG_100DB_STS;
|
|
os_stop_timer(g_mt_ctxt->cert_war_tmr);
|
|
os_start_timer(g_mt_ctxt->cert_war_tmr,
|
|
MAC_CERT_WAR_TRANS_LONG_INTV_MS);
|
|
return;
|
|
}
|
|
break;
|
|
}
|
|
case MAC_CERT_TMR_LONG_100DB_STS:
|
|
{
|
|
g_mt_ctxt->orgin_trans_flag = 0;
|
|
g_mt_ctxt->war_tmr_sts = MAC_CERT_TMR_INIT_STS;
|
|
os_stop_timer(g_mt_ctxt->cert_war_tmr);
|
|
break;
|
|
}
|
|
default:
|
|
break;
|
|
}
|
|
}
|
|
|
|
static void mac_cert_spur_check_flag_reset()
|
|
{
|
|
g_mt_ctxt->war_tmr_sts = MAC_CERT_TMR_INIT_STS;
|
|
g_mt_ctxt->spur_1m_exist = 0;
|
|
g_mt_ctxt->spur_3m_exist = 0;
|
|
g_mt_ctxt->spur_6m_exist = 0;
|
|
g_mt_ctxt->spur_2m_exist = 0;
|
|
g_mt_ctxt->spur_500k_exist = 0;
|
|
g_mt_ctxt->spur_5m_exist = 0;
|
|
g_mt_ctxt->war_tmr_flg = 0;
|
|
g_mt_ctxt->sof_60db_cnt = 0;
|
|
g_mt_ctxt->sof_50db_cnt = 0;
|
|
}
|
|
|
|
void mac_cert_test_tt_special(uint32_t tone_id)
|
|
{
|
|
if (CERT_TEST_CMD_ENTER_PHY_T != mac_get_cert_test_mode()) {
|
|
return;
|
|
}
|
|
|
|
if (!g_mt_ctxt->cert_spur_war_en) {
|
|
return;
|
|
}
|
|
|
|
uint32_t lsntbdlt = 0;
|
|
uint32_t curlsntb = mac_sched_get_lts();
|
|
uint32_t band_id = phy_band_id_get();
|
|
|
|
if (IOT_SUPPORT_TONE_100_230 == band_id) {
|
|
if (tone_id == 41) {
|
|
if (g_mt_ctxt->spur_1m_first == 0) {
|
|
g_mt_ctxt->spur_1m_first = 1;
|
|
/* first entry */
|
|
g_mt_ctxt->war_1m_ntb = curlsntb;
|
|
return;
|
|
}
|
|
|
|
lsntbdlt = curlsntb - g_mt_ctxt->war_1m_ntb;
|
|
g_mt_ctxt->war_1m_ntb = curlsntb;
|
|
|
|
/* 1m spur exists only when 1m spur exists for two consecutive times */
|
|
/* < 1.5s */
|
|
if (lsntbdlt < MAC_CERT_1500MS_NTB) {
|
|
// 1m spur exist
|
|
if (g_mt_ctxt->spur_1m_exist == 0) {
|
|
/* now att is 50db */
|
|
g_mt_ctxt->spur_att_cnt = MAC_CERT_SPUR_ATT_50DB;
|
|
mac_cert_spur_check_flag_reset();
|
|
g_mt_ctxt->spur_1m_exist = 1;
|
|
}
|
|
/* > 6s */
|
|
} else if (lsntbdlt > MAC_CERT_6000MS_NTB) {
|
|
if (g_mt_ctxt->spur_1m_exist) {
|
|
g_mt_ctxt->spur_att_cnt++;
|
|
}
|
|
}
|
|
if (g_mt_ctxt->spur_att_cnt == MAC_CERT_WAR_WORK_ATT) {
|
|
if (g_mt_ctxt->war_tmr_flg == 0) {
|
|
mac_cert_statis_trans_cnt();
|
|
g_mt_ctxt->war_tmr_flg = 1;
|
|
g_mt_ctxt->war_tmr_sts = MAC_CERT_TMR_LONG_70DB_STS;
|
|
os_start_timer(g_mt_ctxt->cert_war_tmr,
|
|
MAC_CERT_WAR_TRANS_LONG_INTV_MS);
|
|
}
|
|
}
|
|
} else if (tone_id == 123) {
|
|
if (g_mt_ctxt->spur_3m_first == 0) {
|
|
g_mt_ctxt->spur_3m_first = 1;
|
|
/* first entry */
|
|
g_mt_ctxt->war_3m_ntb = curlsntb;
|
|
return;
|
|
}
|
|
lsntbdlt = curlsntb - g_mt_ctxt->war_3m_ntb;
|
|
g_mt_ctxt->war_3m_ntb = curlsntb;
|
|
/* 3m spur exists only when 6m spur exists for two consecutive times */
|
|
/* < 1.5s */
|
|
if (lsntbdlt < MAC_CERT_1500MS_NTB) {
|
|
// 1m spur exist
|
|
if (g_mt_ctxt->spur_3m_exist == 0) {
|
|
/* now att is 50db */
|
|
g_mt_ctxt->spur_att_cnt = MAC_CERT_SPUR_ATT_50DB;
|
|
mac_cert_spur_check_flag_reset();
|
|
g_mt_ctxt->spur_3m_exist = 1;
|
|
}
|
|
/* > 6s */
|
|
} else if (lsntbdlt > MAC_CERT_6000MS_NTB) {
|
|
if (g_mt_ctxt->spur_3m_exist) {
|
|
g_mt_ctxt->spur_att_cnt++;
|
|
}
|
|
}
|
|
if (g_mt_ctxt->spur_att_cnt == MAC_CERT_WAR_WORK_ATT) {
|
|
if (g_mt_ctxt->war_tmr_flg == 0) {
|
|
mac_cert_statis_trans_cnt();
|
|
g_mt_ctxt->war_tmr_flg = 1;
|
|
g_mt_ctxt->war_tmr_sts = MAC_CERT_TMR_LONG_70DB_STS;
|
|
os_start_timer(g_mt_ctxt->cert_war_tmr,
|
|
MAC_CERT_WAR_TRANS_LONG_INTV_MS);
|
|
}
|
|
}
|
|
} else if (tone_id == 246) {
|
|
if (g_mt_ctxt->spur_6m_first == 0) {
|
|
g_mt_ctxt->spur_6m_first = 1;
|
|
/* first entry */
|
|
g_mt_ctxt->war_6m_ntb = curlsntb;
|
|
return;
|
|
}
|
|
lsntbdlt = curlsntb - g_mt_ctxt->war_6m_ntb;
|
|
g_mt_ctxt->war_6m_ntb = curlsntb;
|
|
/* 6m spur exists only when 6m spur exists for two consecutive times */
|
|
/* < 1.5s */
|
|
if (lsntbdlt < MAC_CERT_1500MS_NTB) {
|
|
// 1m spur exist
|
|
if (g_mt_ctxt->spur_6m_exist == 0) {
|
|
/* now att is 50db */
|
|
g_mt_ctxt->spur_att_cnt = MAC_CERT_SPUR_ATT_50DB;
|
|
mac_cert_spur_check_flag_reset();
|
|
g_mt_ctxt->spur_6m_exist = 1;
|
|
}
|
|
/* > 6s */
|
|
} else if (lsntbdlt > MAC_CERT_6000MS_NTB) {
|
|
if (g_mt_ctxt->spur_6m_exist) {
|
|
g_mt_ctxt->spur_att_cnt++;
|
|
}
|
|
}
|
|
if (g_mt_ctxt->spur_att_cnt == MAC_CERT_WAR_WORK_ATT) {
|
|
if (g_mt_ctxt->war_tmr_flg == 0) {
|
|
mac_cert_statis_trans_cnt();
|
|
g_mt_ctxt->war_tmr_flg = 1;
|
|
g_mt_ctxt->war_tmr_sts = MAC_CERT_TMR_LONG_70DB_STS;
|
|
os_start_timer(g_mt_ctxt->cert_war_tmr,
|
|
MAC_CERT_WAR_TRANS_LONG_INTV_MS);
|
|
}
|
|
}
|
|
}
|
|
} else if (IOT_SUPPORT_TONE_32_120 == band_id) {
|
|
if (tone_id == 20) {
|
|
if (g_mt_ctxt->spur_500k_first == 0) {
|
|
g_mt_ctxt->spur_500k_first = 1;
|
|
/* first entry */
|
|
g_mt_ctxt->war_500k_ntb = curlsntb;
|
|
return;
|
|
}
|
|
|
|
lsntbdlt = curlsntb - g_mt_ctxt->war_500k_ntb;
|
|
g_mt_ctxt->war_500k_ntb = curlsntb;
|
|
|
|
/* 500k spur exists only when 500k spur exists for two consecutive times */
|
|
/* < 1.5s */
|
|
if (lsntbdlt < MAC_CERT_1500MS_NTB) {
|
|
// 1m spur exist
|
|
if (g_mt_ctxt->spur_500k_exist == 0) {
|
|
/* now att is 50db */
|
|
g_mt_ctxt->spur_att_cnt = MAC_CERT_SPUR_ATT_50DB;
|
|
mac_cert_spur_check_flag_reset();
|
|
g_mt_ctxt->spur_500k_exist = 1;
|
|
}
|
|
/* > 6s */
|
|
} else if (lsntbdlt > MAC_CERT_6000MS_NTB) {
|
|
if (g_mt_ctxt->spur_500k_exist) {
|
|
g_mt_ctxt->spur_att_cnt++;
|
|
}
|
|
}
|
|
if (g_mt_ctxt->spur_att_cnt == MAC_CERT_WAR_WORK_ATT) {
|
|
if (g_mt_ctxt->war_tmr_flg == 0) {
|
|
mac_cert_statis_trans_cnt();
|
|
g_mt_ctxt->war_tmr_flg = 1;
|
|
g_mt_ctxt->war_tmr_sts = MAC_CERT_TMR_LONG_70DB_STS;
|
|
os_start_timer(g_mt_ctxt->cert_war_tmr,
|
|
MAC_CERT_WAR_TRANS_LONG_INTV_MS);
|
|
}
|
|
}
|
|
} if (tone_id == 82) {
|
|
if (g_mt_ctxt->spur_2m_first == 0) {
|
|
g_mt_ctxt->spur_2m_first = 1;
|
|
/* first entry */
|
|
g_mt_ctxt->war_2m_ntb = curlsntb;
|
|
return;
|
|
}
|
|
lsntbdlt = curlsntb - g_mt_ctxt->war_2m_ntb;
|
|
g_mt_ctxt->war_2m_ntb = curlsntb;
|
|
/* 2m spur exists only when 2m spur exists for two consecutive times */
|
|
/* < 1.5s */
|
|
if (lsntbdlt < MAC_CERT_1500MS_NTB) {
|
|
// 1m spur exist
|
|
if (g_mt_ctxt->spur_2m_exist == 0) {
|
|
/* now att is 50db */
|
|
g_mt_ctxt->spur_att_cnt = MAC_CERT_SPUR_ATT_50DB;
|
|
mac_cert_spur_check_flag_reset();
|
|
g_mt_ctxt->spur_2m_exist = 1;
|
|
}
|
|
/* > 6s */
|
|
} else if (lsntbdlt > MAC_CERT_6000MS_NTB) {
|
|
if (g_mt_ctxt->spur_2m_exist) {
|
|
g_mt_ctxt->spur_att_cnt++;
|
|
}
|
|
}
|
|
if (g_mt_ctxt->spur_att_cnt == MAC_CERT_WAR_WORK_ATT) {
|
|
if (g_mt_ctxt->war_tmr_flg == 0) {
|
|
mac_cert_statis_trans_cnt();
|
|
g_mt_ctxt->war_tmr_flg = 1;
|
|
g_mt_ctxt->war_tmr_sts = MAC_CERT_TMR_LONG_70DB_STS;
|
|
os_start_timer(g_mt_ctxt->cert_war_tmr,
|
|
MAC_CERT_WAR_TRANS_LONG_INTV_MS);
|
|
}
|
|
}
|
|
} else if (tone_id == 205) {
|
|
if (g_mt_ctxt->spur_5m_first == 0) {
|
|
g_mt_ctxt->spur_5m_first = 1;
|
|
/* first entry */
|
|
g_mt_ctxt->war_5m_ntb = curlsntb;
|
|
return;
|
|
}
|
|
lsntbdlt = curlsntb - g_mt_ctxt->war_5m_ntb;
|
|
g_mt_ctxt->war_5m_ntb = curlsntb;
|
|
/* 5m spur exists only when 5m spur exists for two consecutive times */
|
|
/* < 1.5s */
|
|
if (lsntbdlt < MAC_CERT_1500MS_NTB) {
|
|
// 1m spur exist
|
|
if (g_mt_ctxt->spur_5m_exist == 0) {
|
|
/* now att is 50db */
|
|
g_mt_ctxt->spur_att_cnt = MAC_CERT_SPUR_ATT_50DB;
|
|
mac_cert_spur_check_flag_reset();
|
|
g_mt_ctxt->spur_5m_exist = 1;
|
|
}
|
|
/* > 6s */
|
|
} else if (lsntbdlt > MAC_CERT_6000MS_NTB) {
|
|
if (g_mt_ctxt->spur_5m_exist) {
|
|
g_mt_ctxt->spur_att_cnt++;
|
|
}
|
|
}
|
|
if (g_mt_ctxt->spur_att_cnt == MAC_CERT_WAR_WORK_ATT) {
|
|
if (g_mt_ctxt->war_tmr_flg == 0) {
|
|
mac_cert_statis_trans_cnt();
|
|
g_mt_ctxt->war_tmr_flg = 1;
|
|
g_mt_ctxt->war_tmr_sts = MAC_CERT_TMR_LONG_70DB_STS;
|
|
os_start_timer(g_mt_ctxt->cert_war_tmr,
|
|
MAC_CERT_WAR_TRANS_LONG_INTV_MS);
|
|
}
|
|
}
|
|
}
|
|
}
|
|
iot_printf("%s, 1mexist:%d, 3mexist:%d, 6mexist:%d, 500kexist:%d, "
|
|
"2mexist:%d, 5mexist:%d, attcnt:%d, tmrflg:%d\n", __FUNCTION__,
|
|
g_mt_ctxt->spur_1m_exist, g_mt_ctxt->spur_3m_exist,
|
|
g_mt_ctxt->spur_6m_exist, g_mt_ctxt->spur_500k_exist,
|
|
g_mt_ctxt->spur_2m_exist, g_mt_ctxt->spur_5m_exist,
|
|
g_mt_ctxt->spur_att_cnt, g_mt_ctxt->war_tmr_flg);
|
|
}
|
|
|
|
uint32_t mac_cert_test_g_set(uint8_t mt_mode_sel)
|
|
{
|
|
iot_printf("%s - mode%d\n", __FUNCTION__, mt_mode_sel);
|
|
|
|
#if HW_PLATFORM >= HW_PLATFORM_FPGA
|
|
uint32_t cert_baud;
|
|
uint8_t cur_cert_mode, user_type, cert_uart;
|
|
mac_vdev_t *vdev = get_vdev_ptr(PLC_PDEV_ID, PLC_DEFAULT_VDEV);
|
|
|
|
mac_multi_sync_set_ena(PLC_PDEV_ID, false);
|
|
vdev_reset_ppm_sync(vdev);
|
|
mac_rf_vdev_t *rf_vdev = get_rf_vdev_ptr(PLC_PDEV_ID, RF_PDEV_ID,
|
|
PLC_DEFAULT_VDEV);
|
|
mac_rf_vdev_reset_sync_nid(rf_vdev);
|
|
|
|
phy_set_g_mt_mode_sel(mt_mode_sel);
|
|
g_mt_ctxt->g_mt_mode_sel = mt_mode_sel;
|
|
if (mt_mode_sel > 0) {
|
|
/* clear rise power flag */
|
|
phy_rise_pwr_flag_set(false);
|
|
|
|
/* info phy the test mode */
|
|
phy_work_mode_set(PHY_MODE_TEST);
|
|
}
|
|
cur_cert_mode = mac_get_cert_test_mode();
|
|
cert_uart = iot_board_get_cert_test_uart();
|
|
/*mission mode switch to cert test mode */
|
|
mm_to_cert_switch(cur_cert_mode);
|
|
mac_rx_set_pbnum_from_phy(0); //0:PBNUM from fc
|
|
switch(cur_cert_mode){
|
|
case CERT_TEST_CMD_ENTER_APP_T_T:
|
|
case CERT_TEST_CMD_ENTER_APP_T_R:
|
|
{
|
|
iot_printf("The cmd is not use\n");
|
|
break;
|
|
}
|
|
case CERT_TEST_CMD_ENTER_PHY_T:
|
|
{
|
|
/* enable swagc when phy TT */
|
|
/* NOTE: mendong cert test,
|
|
* high rssi need use hwagc.
|
|
* but other place(like gansu) cert test,
|
|
* high rssi need use swagc.
|
|
*/
|
|
if (phy_cert_is_hw_agc()) {
|
|
phy_swagc_set(false);
|
|
} else {
|
|
phy_swagc_set(true);
|
|
}
|
|
|
|
if (mac_vdev_cfg_get_node_role(vdev) == PLC_DEV_ROLE_CCO) {
|
|
phy_rx_phase_force_set(0, 0);
|
|
}
|
|
|
|
/* detecting the spike periodically */
|
|
g_mt_ctxt->spike_pd_detect_en = 1;
|
|
g_mt_ctxt->spike_pd_detect_first = 1;
|
|
|
|
/* config uart2, share app layer uart */
|
|
g_mt_ctxt->mt_uart_h =
|
|
iot_uart_taken(cert_uart, (iot_uart_recv_func_t)mac_cert_uart_recv,
|
|
1024, NULL);
|
|
iot_uart_set_config_taken(g_mt_ctxt->mt_uart_h, 115200, 0, 8, 1);
|
|
/*mount mpdu callback*/
|
|
rx_buf_ring_set_callback(&g_mac_pdev[0]->ring_hdl, \
|
|
mac_cert_test_handle);
|
|
g_mt_ctxt->mt_msdu_tx_funt = NULL;
|
|
g_mt_ctxt->data_pkt = \
|
|
iot_pkt_alloc(PLC_SG_MAX_MSDU_SIZE + HEAD_SIEZ_64, \
|
|
PLC_MAC_COMMON_MID);
|
|
IOT_ASSERT(g_mt_ctxt->data_pkt);
|
|
iot_pkt_reserve(g_mt_ctxt->data_pkt, PLC_FC_LEN);
|
|
iot_pkt_put(g_mt_ctxt->data_pkt, PLC_SG_MAX_MSDU_SIZE);
|
|
mac_rx_set_pb_hdr_to_buf_cfg(1);
|
|
|
|
g_mt_ctxt->cert_spur_war_en = 0;
|
|
g_mt_ctxt->cert_spike_war_en = 0;
|
|
user_type = iot_oem_get_user_type();
|
|
/* NOTE: war for jilin spur cert test
|
|
war for mengdong spike cert test.
|
|
*/
|
|
if (mac_vdev_cfg_get_node_role(vdev) != PLC_DEV_ROLE_CCO &&
|
|
(USER_TYPE_STATE_GRID_JL == user_type ||
|
|
USER_TYPE_STATE_GRID_MENGDONG == user_type)) {
|
|
if (USER_TYPE_STATE_GRID_JL == user_type) {
|
|
/* just jilin spur cert test */
|
|
g_mt_ctxt->cert_spur_war_en = 1;
|
|
} else if (USER_TYPE_STATE_GRID_MENGDONG == user_type) {
|
|
/* just war for kl1 spike cert test */
|
|
g_mt_ctxt->cert_spike_war_en = HPLC_CERT_WAR_SPIKE;
|
|
}
|
|
g_mt_ctxt->war_data = iot_pkt_alloc(MAC_CERT_WAR_TX_BUF_LEN,
|
|
PLC_MAC_COMMON_MID);
|
|
IOT_ASSERT(g_mt_ctxt->war_data);
|
|
g_mt_ctxt->cert_war_tmr = os_create_timer(PLC_MAC_COMMON_MID, true,
|
|
mac_cert_war_tx_msg, NULL);
|
|
IOT_ASSERT(g_mt_ctxt->cert_war_tmr);
|
|
iot_printf("%s cert_spur_war_en:%d, cert_spike_war_en:%d\n",
|
|
__FUNCTION__, g_mt_ctxt->cert_spur_war_en,
|
|
g_mt_ctxt->cert_spike_war_en);
|
|
}
|
|
break;
|
|
}
|
|
case CERT_TEST_CMD_ENTER_PHY_LP:
|
|
{
|
|
mac_set_lp_cal_ppm_hold(0);
|
|
mac_set_not_first_cal_lp_ppm(0);
|
|
|
|
if (mac_vdev_cfg_get_node_role(vdev) == PLC_DEV_ROLE_CCO) {
|
|
phy_rx_phase_force_set(0, 0);
|
|
} else {
|
|
#if SUPPORT_SOUTHERN_POWER_GRID
|
|
uint8_t user_type = iot_oem_get_user_type();
|
|
switch (phy_band_id_get()) {
|
|
case IOT_SUPPORT_TONE_100_230:
|
|
if (USER_TYPE_SOUTHEN_POWER_GRID_GUIZHOU == user_type) {
|
|
phy_amp_mask_set(229, 233);
|
|
}
|
|
break;
|
|
|
|
case IOT_SUPPORT_TONE_32_120:
|
|
/* reduce tone amp */
|
|
if (USER_TYPE_SOUTHEN_POWER_GRID_GUIZHOU == user_type) {
|
|
phy_tone_amp_reduce_set(60, 70, 2);
|
|
phy_tone_amp_reduce_set(71, 80, 4);
|
|
phy_tone_amp_reduce_set(81, 110, 6);
|
|
phy_tone_amp_reduce_set(111, 120, 8);
|
|
|
|
/* mask band2 tone 119~120 */
|
|
phy_amp_mask_set(119, 123);
|
|
} else if (USER_TYPE_SOUTHEN_POWER_GRID_GX_NW21 == user_type) {
|
|
/* mask band2 tone 119~120 */
|
|
phy_amp_mask_set(119, 123);
|
|
}
|
|
break;
|
|
|
|
default:
|
|
break;
|
|
}
|
|
#endif
|
|
}
|
|
/*mount mpdu callback*/
|
|
rx_buf_ring_set_callback(&g_mac_pdev[0]->ring_hdl, \
|
|
mac_cert_loopback_handle);
|
|
g_mt_ctxt->mt_msdu_tx_funt = NULL;
|
|
/* in spg, pb need reverse , so need recalculation crc */
|
|
if (PHY_PROTO_TYPE_GET() != PLC_PROTO_TYPE_SPG) {
|
|
phy_set_tx_pb_swcrc_cfg(true);
|
|
phy_set_tx_fc_swcrc_cfg(true);
|
|
}
|
|
mac_cert_desc_init();
|
|
mac_set_pdev_rx_cb(g_mac_pdev[0], mac_rx_hw_mpdu_internal);
|
|
mac_pdev_t *pdev_t = g_mac_pdev[0];
|
|
pdev_t->switch_ctxt_in_mac_isr = 1;
|
|
#if ENA_WAR_325
|
|
/* hw will rewrite frame len in rawdata mode
|
|
* so set to write fl by sw.
|
|
* and set loopback time = huawei loopback time
|
|
* huawei loopback time = 320us
|
|
*/
|
|
mac_set_fc_fl_cfg_status(1);
|
|
mac_tx_hw_set_delay(CIFS_DELAY_TMR);
|
|
mac_tx_cifs_tmr_set(100);
|
|
#endif
|
|
break;
|
|
}
|
|
case CERT_TEST_CMD_ENTER_MAC_T:
|
|
case CERT_TEST_CMD_ENTER_SEC:
|
|
{
|
|
/* config uart2, share app layer uart */
|
|
g_mt_ctxt->mt_uart_h =
|
|
iot_uart_taken(cert_uart, (iot_uart_recv_func_t)mac_cert_uart_recv,
|
|
1024, NULL);
|
|
/* in different cert protocols, we use different baud rates */
|
|
if (PHY_PROTO_TYPE_GET() == PLC_PROTO_TYPE_SG) {
|
|
iot_uart_set_config_taken(g_mt_ctxt->mt_uart_h, 115200, 0, 8, 1);
|
|
}
|
|
else if (PHY_PROTO_TYPE_GET() == PLC_PROTO_TYPE_SPG) {
|
|
cert_baud = iot_oem_get_cert_baund();
|
|
if ((cert_baud == 0) || (cert_baud == 0xFFFFFFFF)) {
|
|
if (iot_oem_get_module_type() == MODULE_TYPE_CCO) {
|
|
iot_uart_set_config_taken(g_mt_ctxt->mt_uart_h, 9600,
|
|
IOT_UART_PARITY_EVEN, 8, 1);
|
|
} else {
|
|
iot_uart_set_config_taken(g_mt_ctxt->mt_uart_h, 2400,
|
|
IOT_UART_PARITY_EVEN, 8, 1);
|
|
}
|
|
} else {
|
|
/* set to the specified cert baund */
|
|
iot_uart_set_config_taken(g_mt_ctxt->mt_uart_h,
|
|
cert_baud, iot_oem_get_cert_uart_parity(), 8, 1);
|
|
}
|
|
}
|
|
else {
|
|
IOT_ASSERT(0);
|
|
}
|
|
/* switch to msdu trans to uart, make sure pb cb close */
|
|
rx_buf_ring_set_callback(&g_mac_pdev[0]->ring_hdl, NULL);
|
|
/*mount msdu callback*/
|
|
if (CERT_TEST_CMD_ENTER_MAC_T == cur_cert_mode) {
|
|
g_mt_ctxt->mt_msdu_tx_funt = mac_cert_test_mac_trans;
|
|
} else if (CERT_TEST_CMD_ENTER_SEC == cur_cert_mode) {
|
|
g_mt_ctxt->mt_msdu_tx_funt = mac_cert_test_security_trans;
|
|
} else {
|
|
IOT_ASSERT(0);
|
|
}
|
|
break;
|
|
}
|
|
case CERT_TEST_CMD_ENTER_PHY_RF_LP:
|
|
{
|
|
mac_pdev_t *pdev_t = g_mac_pdev[0];
|
|
int8_t full_pwr;
|
|
/* mount mpdu callback */
|
|
rx_buf_ring_set_callback(&pdev_t->mac_rf_pdev->ring_hdl,
|
|
mac_rf_cert_loopback_handle);
|
|
g_mt_ctxt->mt_msdu_tx_funt = NULL;
|
|
mac_rf_cert_desc_init();
|
|
mac_set_rf_pdev_rx_cb(pdev_t->mac_rf_pdev, mac_rf_rx_hw_mpdu_internal);
|
|
pdev_t->switch_ctxt_in_mac_isr = 1;
|
|
if (iot_oem_get_user_type() == USER_TYPE_STATE_GRID_BJ) {
|
|
if (mac_vdev_cfg_get_node_role(vdev) != PLC_DEV_ROLE_CCO) {
|
|
phy_rf_get_power(NULL, NULL, NULL, &full_pwr);
|
|
mac_rf_set_tx_power_cap(rf_vdev, full_pwr, 0);
|
|
}
|
|
}
|
|
break;
|
|
}
|
|
case CERT_TEST_CMD_ENTER_PHY_RF_T:
|
|
{
|
|
/* config uart2, share app layer uart */
|
|
g_mt_ctxt->mt_uart_h =
|
|
iot_uart_taken(cert_uart, (iot_uart_recv_func_t)mac_cert_uart_recv,
|
|
1024, NULL);
|
|
iot_uart_set_config_taken(g_mt_ctxt->mt_uart_h, 115200, 0, 8, 1);
|
|
/* mount mpdu callback */
|
|
mac_pdev_t *pdev_t = g_mac_pdev[0];
|
|
rx_buf_ring_set_callback(&pdev_t->mac_rf_pdev->ring_hdl,
|
|
mac_rf_cert_test_handle);
|
|
g_mt_ctxt->mt_msdu_tx_funt = NULL;
|
|
g_mt_ctxt->data_pkt = iot_pkt_alloc(
|
|
PLC_SG_MAX_MSDU_SIZE + HEAD_SIEZ_64, PLC_MAC_COMMON_MID);
|
|
IOT_ASSERT(g_mt_ctxt->data_pkt);
|
|
iot_pkt_reserve(g_mt_ctxt->data_pkt, PLC_FC_LEN);
|
|
iot_pkt_put(g_mt_ctxt->data_pkt, PLC_SG_MAX_MSDU_SIZE);
|
|
mac_rf_cert_set_pb_hdr_to_buf(1);
|
|
break;
|
|
}
|
|
case CERT_TEST_CMD_ENTER_PHY_RF_AND_HPLC_LP:
|
|
{
|
|
mac_pdev_t *pdev_t = g_mac_pdev[0];
|
|
/* hplc lp config */
|
|
if (mac_vdev_cfg_get_node_role(vdev) == PLC_DEV_ROLE_CCO) {
|
|
phy_rx_phase_force_set(0, 0);
|
|
}
|
|
/* mount mpdu callback */
|
|
rx_buf_ring_set_callback(&pdev_t->ring_hdl,
|
|
mac_cert_loopback_handle);
|
|
g_mt_ctxt->mt_msdu_tx_funt = NULL;
|
|
/* in spg, pb need reverse , so need recalculation crc */
|
|
if (PHY_PROTO_TYPE_GET() != PLC_PROTO_TYPE_SPG) {
|
|
phy_set_tx_pb_swcrc_cfg(true);
|
|
phy_set_tx_fc_swcrc_cfg(true);
|
|
}
|
|
mac_cert_desc_init();
|
|
mac_set_pdev_rx_cb(pdev_t, mac_rx_hw_mpdu_internal);
|
|
pdev_t->switch_ctxt_in_mac_isr = 1;
|
|
|
|
/* rf lp config */
|
|
rx_buf_ring_set_callback(&pdev_t->mac_rf_pdev->ring_hdl,
|
|
mac_rf_cert_loopback_handle);
|
|
mac_rf_cert_desc_init();
|
|
mac_set_rf_pdev_rx_cb(pdev_t->mac_rf_pdev,
|
|
mac_rf_rx_hw_mpdu_internal);
|
|
/* fix beijing cert test bed rf loopback case, the success rate of
|
|
* rf back transmission is low when rf transmitting power is large
|
|
*/
|
|
if (iot_oem_get_user_type() == USER_TYPE_STATE_GRID_BJ) {
|
|
if (mac_vdev_cfg_get_node_role(vdev) == PLC_DEV_ROLE_CCO) {
|
|
mac_rf_set_tx_power_cap(rf_vdev, RF_TX_LOOPBACK_PWR_DBM, 0);
|
|
}
|
|
}
|
|
break;
|
|
}
|
|
case CERT_TEST_CMD_ENTER_PHY_HPLC2RF_LP:
|
|
{
|
|
mac_pdev_t *pdev_t = g_mac_pdev[0];
|
|
|
|
if (mac_vdev_cfg_get_node_role(vdev) == PLC_DEV_ROLE_CCO) {
|
|
phy_rx_phase_force_set(0, 0);
|
|
}
|
|
|
|
/* to avoid rf tx spectrum test case failure in xian test bed */
|
|
g_mt_ctxt->mt_uart_h =
|
|
iot_uart_taken(cert_uart, (iot_uart_recv_func_t)mac_cert_uart_recv,
|
|
1024, NULL);
|
|
iot_uart_set_config_taken(g_mt_ctxt->mt_uart_h, 115200, 0, 8, 1);
|
|
|
|
rx_buf_ring_set_callback(&pdev_t->ring_hdl,
|
|
mac_rf_cert_loopback_hplc2rf);
|
|
mac_set_pdev_rx_cb(pdev_t, mac_rx_hw_mpdu_internal);
|
|
|
|
g_mt_ctxt->mt_msdu_tx_funt = NULL;
|
|
g_mt_ctxt->hplc2rf_ing = 0;
|
|
mac_rf_cert_desc_init();
|
|
pdev_t->switch_ctxt_in_mac_isr = 1;
|
|
break;
|
|
}
|
|
default:
|
|
IOT_ASSERT(0);
|
|
}
|
|
#else
|
|
(void)mt_mode_sel;
|
|
#endif
|
|
return 0;
|
|
}
|
|
|
|
uint32_t mac_cert_test_band_cfg(uint8_t band_id)
|
|
{
|
|
/*the flag for cert mode*/
|
|
g_mt_ctxt->g_mt_mode_flag = 1;
|
|
/* set rf cert flag */
|
|
mac_rf_cert_flag_cfg();
|
|
|
|
/* TODO: maybe need support multi band.
|
|
* be careful band_id is proto band id or single band id.
|
|
*/
|
|
g_mt_ctxt->band_id = band_id; //0 1
|
|
|
|
/* info phy the test mode */
|
|
if (mac_get_cert_test_mode() == CERT_TEST_CMD_NOT_RX) {
|
|
phy_work_mode_set(PHY_MODE_TEST);
|
|
}
|
|
|
|
uint32_t cur_band_id = phy_band_id_get();
|
|
|
|
iot_printf("old band_id = %d, will to set bandid = %d\n", \
|
|
cur_band_id, band_id);
|
|
|
|
if(cur_band_id != band_id)
|
|
{
|
|
iot_printf("now set band-----\n");
|
|
phy_reinit(PHY_PROTO_TYPE_GET(), band_id, phy_mask_id_get(), true);
|
|
}
|
|
|
|
{
|
|
/* working on 3 phase */
|
|
//phy_rx_phase_force_set(1, 0);
|
|
|
|
/* cert mode set fixed rate */
|
|
vdev_set_fixed_rate(g_mac_pdev[0]->vdev[0], true);
|
|
|
|
/* cert mode rifs >= 900us, reinit the rifs config */
|
|
mac_cfg_rifs_tmr_init(CERT_SUPPORT, PHY_PROTO_TYPE_GET());
|
|
|
|
/* WAR for cert test on band 3,
|
|
* etmi4 can't bear with high snr,
|
|
* so use hwagc instead */
|
|
if (band_id == 3) {
|
|
phy_swagc_set(false);
|
|
}
|
|
|
|
/* cert mode, disable cco check check */
|
|
mac_pdev_t *pdev_t = get_pdev_ptr(PLC_PDEV_ID);
|
|
mac_check_spur_en(&pdev_t->mac_check_spur_ctxt, false);
|
|
}
|
|
|
|
/* disable bcast hwretry */
|
|
mac_set_bcast_hwretry_cfg(g_mac_pdev[0], 0);
|
|
|
|
/* info pm module that we need stay awake on cert test mode */
|
|
req_stay_awake(MAC_PM_CERT_TEST_MODULE_ID, true);
|
|
|
|
/* check phy pwr sts */
|
|
phy_pm_pwr_update(PHY_PM_PWR_STS_TXRX);
|
|
|
|
return 0;
|
|
}
|
|
|
|
uint32_t mac_cert_test_tonemast_cfg(uint8_t tonemask_id)
|
|
{
|
|
g_mt_ctxt->tonemask_id = tonemask_id;
|
|
|
|
uint32_t cur_mask_id = phy_mask_id_get();
|
|
uint8_t tobe_maskid = 0;
|
|
|
|
if(tonemask_id >= MAX_SG_BAND_ID)
|
|
{
|
|
iot_printf("receive error tonemaskid! please check!\n");
|
|
return 0;
|
|
}
|
|
|
|
tobe_maskid = (uint8_t)sg_tonemask_to_hw_tonemask(tonemask_id);
|
|
|
|
iot_printf("old mask_id = %d tobe_mask_id = %d\n",\
|
|
cur_mask_id, tobe_maskid);
|
|
|
|
if(tobe_maskid != cur_mask_id)
|
|
{
|
|
iot_printf("now set tonemask-----\n");
|
|
phy_reinit(PHY_PROTO_TYPE_GET(), phy_band_id_get(), tobe_maskid, true);
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
uint32_t mac_cert_test_sec_mode_set(uint8_t sec_mode)
|
|
{
|
|
iot_printf("set sec mode %d\n", sec_mode);
|
|
g_mt_ctxt->sec_mode = sec_mode;
|
|
|
|
return 0;
|
|
}
|
|
|
|
uint32_t mac_cert_test_mode_sel_ex(uint8_t mt_mode_sel)
|
|
{
|
|
uint32_t ret = 0;
|
|
mac_msg_t *msg = mac_alloc_msg();
|
|
|
|
if (msg == NULL) {
|
|
IOT_ASSERT(0);
|
|
ret = ERR_NOMEM;
|
|
goto out;
|
|
}
|
|
|
|
msg->type = MAC_MSG_TYPE_CVG;
|
|
msg->id = MAC_MSG_ID_CVG_CERT_MODE_SEL;
|
|
msg->data1 = mt_mode_sel;
|
|
mac_queue_msg(msg, MAC_MSG_QUEUE_HP);
|
|
out:
|
|
return ret;
|
|
}
|
|
|
|
uint32_t mac_cert_test_band_cfg_ex(uint8_t band_id)
|
|
{
|
|
uint32_t ret = 0;
|
|
mac_msg_t *msg = mac_alloc_msg();
|
|
|
|
if (msg == NULL) {
|
|
IOT_ASSERT(0);
|
|
ret = ERR_NOMEM;
|
|
goto out;
|
|
}
|
|
msg->type = MAC_MSG_TYPE_CVG;
|
|
msg->id = MAC_MSG_ID_CVG_CERT_BAND;
|
|
msg->data1 = band_id;
|
|
mac_queue_msg(msg, MAC_MSG_QUEUE_HP);
|
|
out:
|
|
return ret;
|
|
}
|
|
|
|
uint32_t mac_cert_test_tonemask_cfg_ex(uint8_t tonemask)
|
|
{
|
|
uint32_t ret = 0;
|
|
mac_msg_t *msg = mac_alloc_msg();
|
|
|
|
if (msg == NULL) {
|
|
IOT_ASSERT(0);
|
|
ret = ERR_NOMEM;
|
|
goto out;
|
|
}
|
|
msg->type = MAC_MSG_TYPE_CVG;
|
|
msg->id = MAC_MSG_ID_CVG_CERT_TONEMASK;
|
|
msg->data1 = tonemask;
|
|
mac_queue_msg(msg, MAC_MSG_QUEUE_HP);
|
|
out:
|
|
return ret;
|
|
}
|
|
|
|
uint8_t mac_get_cert_test_mode()
|
|
{
|
|
if (g_mt_ctxt) {
|
|
return g_mt_ctxt->g_mt_mode_sel;
|
|
}
|
|
return 0;
|
|
|
|
}
|
|
|
|
uint8_t mac_get_cert_test_flag()
|
|
{
|
|
if (g_mt_ctxt) {
|
|
return g_mt_ctxt->g_mt_mode_flag;
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
uint8_t mac_get_cert_war_flag()
|
|
{
|
|
if (g_mt_ctxt) {
|
|
return (uint8_t)g_mt_ctxt->cert_spur_war_en;
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
void mac_set_not_first_cal_lp_ppm(uint8_t is_not_first)
|
|
{
|
|
if (g_mt_ctxt) {
|
|
g_mt_ctxt->g_lp_not_first_cal_ppm = !!is_not_first;
|
|
}
|
|
}
|
|
|
|
uint8_t mac_get_is_not_first_cal_lp_ppm()
|
|
{
|
|
if (g_mt_ctxt) {
|
|
return g_mt_ctxt->g_lp_not_first_cal_ppm;
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
int8_t mac_get_rcd_lp_ppm()
|
|
{
|
|
if (g_mt_ctxt) {
|
|
return g_mt_ctxt->rcd_lp_ppm;
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
void mac_set_rcd_lp_ppm(int8_t lp_ppm)
|
|
{
|
|
if (g_mt_ctxt) {
|
|
g_mt_ctxt->rcd_lp_ppm = lp_ppm;
|
|
}
|
|
}
|
|
|
|
uint8_t mac_get_lp_cal_ppm_is_hold()
|
|
{
|
|
if (g_mt_ctxt) {
|
|
return g_mt_ctxt->g_lp_ppm_hold;
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
void mac_set_lp_cal_ppm_hold(uint8_t is_hold)
|
|
{
|
|
if (g_mt_ctxt) {
|
|
g_mt_ctxt->g_lp_ppm_hold = !!is_hold;
|
|
}
|
|
}
|
|
|
|
uint32_t mac_cert_test_hplc2rf_lp_cfg_ex(uint8_t phr_mcs,
|
|
uint8_t psdu_mcs, uint8_t pb_size)
|
|
{
|
|
uint32_t ret = 0;
|
|
mac_msg_t *msg = mac_alloc_msg();
|
|
|
|
if (msg == NULL) {
|
|
IOT_ASSERT(0);
|
|
ret = ERR_NOMEM;
|
|
goto out;
|
|
}
|
|
msg->type = MAC_MSG_TYPE_CVG;
|
|
msg->id = MAC_MSG_ID_CVG_CERT_HPLC2RF;
|
|
msg->data1 = phr_mcs << 16 | psdu_mcs << 8 | pb_size;
|
|
mac_queue_msg(msg, MAC_MSG_QUEUE_HP);
|
|
out:
|
|
return ret;
|
|
}
|
|
|
|
uint32_t mac_cert_test_sec_mode_sel_ex(uint8_t mode)
|
|
{
|
|
uint32_t ret = 0;
|
|
mac_msg_t *msg = mac_alloc_msg();
|
|
|
|
if (msg == NULL) {
|
|
IOT_ASSERT(0);
|
|
ret = ERR_NOMEM;
|
|
goto out;
|
|
}
|
|
msg->type = MAC_MSG_TYPE_CVG;
|
|
msg->id = MAC_MSG_ID_CVG_CERT_SEC_MODE;
|
|
msg->data1 = mode;
|
|
mac_queue_msg(msg, MAC_MSG_QUEUE_HP);
|
|
out:
|
|
return ret;
|
|
}
|
|
|
|
uint32_t mac_cert_test_rf_cfg_ex(uint8_t option, uint8_t channel)
|
|
{
|
|
uint32_t ret = 0;
|
|
mac_msg_t *msg = mac_alloc_msg();
|
|
|
|
if (msg == NULL) {
|
|
IOT_ASSERT(0);
|
|
ret = ERR_NOMEM;
|
|
goto out;
|
|
}
|
|
msg->type = MAC_MSG_TYPE_CVG;
|
|
msg->id = MAC_MSG_ID_CVG_CERT_RF_CFG;
|
|
msg->data1 = option << 8 | channel;
|
|
mac_queue_msg(msg, MAC_MSG_QUEUE_HP);
|
|
out:
|
|
return ret;
|
|
}
|
|
|
|
#else
|
|
|
|
uint32_t mac_cert_test_mode_sel_ex(uint8_t mt_mode_sel)
|
|
{
|
|
(void)mt_mode_sel;
|
|
return 0;
|
|
}
|
|
|
|
uint32_t mac_cert_test_band_cfg_ex(uint8_t band_id)
|
|
{
|
|
(void)band_id;
|
|
return 0;
|
|
}
|
|
|
|
uint32_t mac_cert_test_tonemask_cfg_ex(uint8_t tonemask)
|
|
{
|
|
(void)tonemask;
|
|
return 0;
|
|
}
|
|
|
|
|
|
uint32_t mac_cert_test_g_init()
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
uint32_t mac_cert_test_tonemast_cfg(uint8_t tonemask_id)
|
|
{
|
|
(void)tonemask_id;
|
|
return 0;
|
|
}
|
|
|
|
uint32_t mac_cert_test_band_cfg(uint8_t band_id)
|
|
{
|
|
(void)band_id;
|
|
return 0;
|
|
}
|
|
|
|
uint32_t mac_cert_test_sec_mode_set(uint8_t sec_mode)
|
|
{
|
|
(void)sec_mode;
|
|
return 0;
|
|
}
|
|
|
|
uint32_t mac_cert_test_g_set(uint8_t mt_mode_sel)
|
|
{
|
|
(void)mt_mode_sel;
|
|
return 0;
|
|
}
|
|
|
|
uint32_t mm_to_cert_switch(uint8_t cert_mode_type)
|
|
{
|
|
(void)cert_mode_type;
|
|
return 0;
|
|
}
|
|
|
|
uint32_t cert_to_mm_switch(uint8_t cert_mode_type)
|
|
{
|
|
(void)cert_mode_type;
|
|
return 0;
|
|
}
|
|
|
|
uint32_t cert_mode_stop()
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
uint8_t mac_get_cert_test_mode()
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
uint8_t mac_get_cert_test_flag()
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
uint8_t mac_get_cert_war_flag()
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
uint32_t mac_cert_test_hplc2rf_lp_cfg_ex(uint8_t phr_mcs,
|
|
uint8_t psdu_mcs, uint8_t pb_size)
|
|
{
|
|
(void)phr_mcs;
|
|
(void)psdu_mcs;
|
|
(void)pb_size;
|
|
return ERR_OK;
|
|
}
|
|
|
|
uint32_t mac_cert_test_sec_mode_sel_ex(uint8_t mode)
|
|
{
|
|
(void)mode;
|
|
return ERR_OK;
|
|
}
|
|
|
|
uint32_t mac_cert_test_rf_cfg_ex(uint8_t option, uint8_t channel)
|
|
{
|
|
(void)option;
|
|
(void)channel;
|
|
return ERR_OK;
|
|
}
|
|
|
|
void mac_set_not_first_cal_lp_ppm(uint8_t is_not_first)
|
|
{
|
|
(void)is_not_first;
|
|
}
|
|
|
|
uint8_t mac_get_is_not_first_cal_lp_ppm()
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
int8_t mac_get_rcd_lp_ppm()
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
void mac_set_rcd_lp_ppm(int8_t lp_ppm)
|
|
{
|
|
(void)lp_ppm;
|
|
}
|
|
|
|
uint8_t mac_get_lp_cal_ppm_is_hold()
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
void mac_set_lp_cal_ppm_hold(uint8_t is_hold)
|
|
{
|
|
(void)is_hold;
|
|
}
|
|
|
|
void mac_cert_tt_spike_war_check()
|
|
{
|
|
}
|
|
|
|
uint8_t mac_cert_is_nid_valid(nid_t nid)
|
|
{
|
|
(void)nid;
|
|
return 1;
|
|
}
|
|
|
|
void mac_cert_war_trans_handle()
|
|
{
|
|
}
|
|
|
|
uint8_t mac_cert_get_spike_pd_detect_en()
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
#endif
|