Files
kunlun/driver/src/hw2/sadc_pwm.c
2024-09-28 14:24:04 +08:00

97 lines
3.3 KiB
C
Executable File

/****************************************************************************
*
* Copyright(c) 2019 by Aerospace C.Power (Chongqing) Microelectronics. ALL RIGHTS RESERVED.
*
* This Information is proprietary to Aerospace C.Power (Chongqing) Microelectronics and MAY NOT
* be copied by any method or incorporated into another program without
* the express written consent of Aerospace C.Power. This Information or any portion
* thereof remains the property of Aerospace C.Power. The Information contained herein
* is believed to be accurate and Aerospace C.Power assumes no responsibility or
* liability for its use in any way and conveys no license or title under
* any patent or copyright and makes no representation or warranty that this
* Information is free from patent or copyright infringement.
*
* ****************************************************************************/
#include "pmu_rf.h"
#include "sadc_pwm_reg.h"
#include "sadc_pwm.h"
#include "os_types.h"
#include "sadc_pwm_reg.h"
#include "hw_reg_api.h"
void sadc_pwm_init(void)
{
uint32_t tmp;
/* sadc pwm disable */
tmp=PMU_RF_READ_REG(CFG_PMU_CLK_ENABLE_ADDR);
REG_FIELD_SET(SPWM_EB, tmp, 0);
PMU_RF_WRITE_REG(CFG_PMU_CLK_ENABLE_ADDR, tmp);
/* active softreset */
tmp=PMU_RF_READ_REG(CFG_PMU_SOFT_RESET_ADDR);
REG_FIELD_SET(SADC_PWM_SOFT_RST, tmp, 1);
PMU_RF_WRITE_REG(CFG_PMU_SOFT_RESET_ADDR, tmp);
/* cancel softreset */
tmp=PMU_RF_READ_REG(CFG_PMU_SOFT_RESET_ADDR);
REG_FIELD_SET(SADC_PWM_SOFT_RST, tmp, 0);
PMU_RF_WRITE_REG(CFG_PMU_SOFT_RESET_ADDR, tmp);
/* sadc pwm enable */
tmp=PMU_RF_READ_REG(CFG_PMU_CLK_ENABLE_ADDR);
REG_FIELD_SET(SPWM_EB, tmp, 1);
PMU_RF_WRITE_REG(CFG_PMU_CLK_ENABLE_ADDR, tmp);
/* 1M sel */
tmp=PMU_RF_READ_REG(CFG_PMU_CLOCK_CFG_ADDR);
REG_FIELD_SET(CLK_1M_SEL, tmp, 1);
REG_FIELD_SET(PMU_CLK_SEL, tmp, 2);
PMU_RF_WRITE_REG(CFG_PMU_CLOCK_CFG_ADDR, tmp);
}
void sadc_pwm_set_pulse_width(uint8_t pulse_width)
{
uint32_t tmp;
tmp=SADC_PWM_READ_REG(CFG_SADC_PULSE_WIDTH_ADDR);
/* pwm pulse width(unit is 1ms) */
REG_FIELD_SET(PWM_PULSE_WIDTH, tmp, pulse_width);
/* 1:self-frequency 8m div8, 0:reference 1m tick */
REG_FIELD_SET(TICK_1M_SEL, tmp, 0);
SADC_PWM_WRITE_REG(CFG_SADC_PULSE_WIDTH_ADDR, tmp);
}
void sadc_pwm_set_time_thrs(uint32_t time_thrs)
{
SADC_PWM_WRITE_REG(CFG_SADC_PWM_CFG0_ADDR, time_thrs);//count in 1ms
}
void sadc_pwm_set_sw_token(uint8_t sw_token)
{
uint32_t tmp;
/* set pwm token */
tmp=SADC_PWM_READ_REG(CFG_SADC_PWM_CFG1_ADDR);
REG_FIELD_SET(PWM_SW_TOKEN_INC, tmp, 1);
REG_FIELD_SET(PWM_SW_TOKEN, tmp, sw_token);
SADC_PWM_WRITE_REG(CFG_SADC_PWM_CFG1_ADDR, tmp);
REG_FIELD_SET(PWM_SW_TOKEN_INC, tmp, 0);
SADC_PWM_WRITE_REG(CFG_SADC_PWM_CFG1_ADDR, tmp);
}
void sadc_pwm_config(uint32_t period, uint8_t pulse_width, uint8_t sw_token)
{
IOT_ASSERT(period > 0);
IOT_ASSERT(pulse_width > 0);
IOT_ASSERT(sw_token > 0);
IOT_ASSERT((period/sw_token) > 0);
sadc_pwm_set_pulse_width(pulse_width);
sadc_pwm_set_sw_token(sw_token);
/* period = (pulse_width + time_thrs)*sw_token */
sadc_pwm_set_time_thrs((period / sw_token) - pulse_width);
}