15 lines
496 B
C
15 lines
496 B
C
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//-----------------------------------
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#define CFG_BB_FD_CORR_THR0_ADDR 0x0004
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#define SW_TURBO_DEC_SEL_OFFSET 8
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#define SW_TURBO_DEC_SEL_MASK 0x00000100
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#define SW_FD_CORR_THR0_OFFSET 0
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#define SW_FD_CORR_THR0_MASK 0x000000FF
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//-----------------------------------
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#define CFG_BB_FD_CORR_THR1_ADDR 0x1000
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//HW module read/write macro
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#define PHY_RX_FD_READ_REG(addr) SOC_READ_REG(PHY_RX_FD_BASEADDR + addr)
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#define PHY_RX_FD_WRITE_REG(addr,value) SOC_WRITE_REG(PHY_RX_FD_BASEADDR + addr,value)
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