kunlun/dtest/monitor_test/monitor_test.c

/****************************************************************************

Copyright(c) 2019 by Aerospace C.Power (Chongqing) Microelectronics. ALL RIGHTS RESERVED.

This Information is proprietary to Aerospace C.Power (Chongqing) Microelectronics and MAY NOT
be copied by any method or incorporated into another program without
the express written consent of Aerospace C.Power. This Information or any portion
thereof remains the property of Aerospace C.Power. The Information contained herein
is believed to be accurate and Aerospace C.Power assumes no responsibility or
liability for its use in any way and conveys no license or title under
any patent or copyright and makes no representation or warranty that this
Information is free from patent or copyright infringement.

****************************************************************************/
/* os shim includes */
#include "os_types.h"
#include "os_task.h"
#include "os_utils.h"

/* common includes */
#include "iot_io.h"
#include "dbg_io.h"
#include "iot_config.h"

/* driver includes */
#include "iot_uart.h"
#include "mon_hw.h"
#include "ahb_busmon.h"


#define MST_MON_M0  (1 << 0)
#define MST_MON_ALL (MST_MON_M0)
#define TEST_CASE_MST_MON   (MST_MON_ALL)

#define SLV_MON_IC0 (1 << 0)
#define SLV_MON_IC1 (1 << 1)
#define SLV_MON_DC  (1 << 2)
#define SLV_MON_RAM3 (1 << 3)
#define SLV_MON_RAM4 (1 << 4)
#define SLV_MON_ALL (SLV_MON_IC0 | SLV_MON_IC1 \
        | SLV_MON_DC | SLV_MON_RAM3 | SLV_MON_RAM4)
#define TEST_CASE_SLV_MON   (SLV_MON_ALL)

#define BUS_MON_ADDR (1 << 0)
#define TEST_CASE_BUS_MON   (BUS_MON_ADDR)

extern int platform_init();
#define REG32(a)    (*((volatile uint32_t *)(a)))
typedef void (*jump)(void);

#define ERR_ADDR    0x000ff700
#define ERR_ADDR_READ   0x000ff000
static void test_mon_master(uint8_t id, uint8_t rw, uint32_t addr)
{
    uint32_t tmp;
    iot_printf("[M%d %s] test write 0x%08x\n", id, (rw)?"WRITE":"READ", addr);
    tmp = ahb_mon_get_mst_rw();
    iot_printf("[M%d %s] get RW flag: %d\n", id, (rw)?"WRITE":"READ", tmp);
    if (tmp != rw) {
        iot_printf("[M%d %s] get RW flag failed\n", id, (rw)?"WRITE":"READ");
    } else {
        uint32_t err_addr = 0;
        err_addr = ahb_mon_get_mst_addr(id);
        iot_printf("[M%d %s] get error addr : 0x%08x\n",
                id, (rw)?"WRITE":"READ", err_addr);
        if (err_addr != addr) {
            iot_printf("[M%d %s] failed\n", id, (rw)?"WRITE":"READ");
        } else {
            iot_printf("[M%d %s] successful\n", id, (rw)?"WRITE":"READ");
        }
    }
}

static void test_mst_reg_dump()
{
    iot_printf("f0: 0x%08x 0x%08x 0x%08x\n",
        REG32(0x500000f4), REG32(0x500000f8), REG32(0x500000fc));
}

void master_monitor_test() {

    // test case
    volatile uint32_t *reg = (volatile uint32_t *) ERR_ADDR;

#if (TEST_CASE_MST_MON & MST_MON_M0)
    ahb_mon_mst_clr();
    *reg = 0xaabbccdd;
    for(volatile uint32_t i = 0; i < 1000; i++);
    test_mon_master(0, 1, ERR_ADDR);

    ahb_mon_mst_clr();
    reg = (volatile uint32_t *)ERR_ADDR_READ;
    iot_printf("reg: 0x%08x\n", *reg);
    for(volatile uint32_t i = 0; i < 1000; i++);
    test_mon_master(0, 0, ERR_ADDR_READ);

    test_mst_reg_dump();
    ahb_mon_mst_clr();
    test_mst_reg_dump();
#endif

}

#define SLV_ERR_ADDR 0x0fff8300
static void test_mon_slave(uint8_t id, uint8_t rw, uint32_t addr)
{
    uint32_t tmp;
    iot_printf("[S%d %s] test write 0x%08x\n", id, (rw)?"WRITE":"READ", addr);
    tmp = ahb_mon_get_slv_rw();
    iot_printf("[S%d %s] get RW flag: %d\n", id, (rw)?"WRITE":"READ", tmp);
    if (tmp != rw) {
        iot_printf("[S%d %s] get RW flag failed\n", id, (rw)?"WRITE":"READ");
    } else {
        uint32_t err_addr = 0;
        err_addr = ahb_mon_get_slv_addr(id);
        iot_printf("[S%d %s] get error addr : 0x%08x\n",
                id, (rw)?"WRITE":"READ", err_addr);
        if (err_addr != addr) {
            iot_printf("[S%d %s] failed\n", id, (rw)?"WRITE":"READ");
        } else {
            iot_printf("[S%d %s] successful\n", id, (rw)?"WRITE":"READ");
        }
    }
}
void slave_monitor_test()
{

    // test case
    volatile uint32_t *reg = (volatile uint32_t *) SLV_ERR_ADDR;

#if (TEST_CASE_SLV_MON & SLV_MON_IC0)
    ahb_mon_slv_ram3_ena(0x0fff8000, 0x0fff9000, 0x0fff8400, 0x0fff8c00);
    *reg = 0xaabbccdd;
    for(volatile uint32_t i = 0; i < 1000; i++);
    iot_printf("slv addr: 0x%08x\n", *reg);
    test_mon_slave(0, 1, SLV_ERR_ADDR);
#endif
}

#define BUS_ERR_IN_ADDR     0x0ffffa00
#define BUS_MON_LADDR       0x0ffff800
#define BUS_MON_HADDR       0x0ffffc00
static void test_bus_mon(uint8_t id, uint32_t addr)
{
    iot_printf("[B%d] test write 0x%08x\n", id, addr);

    uint32_t err_addr = 0;
    err_addr = ahb_busmon_cap_addr(id);
    iot_printf("[B%d] get error addr : 0x%08x\n", id, err_addr);
    if (err_addr != addr) {
        iot_printf("[B%d] failed\n", id);
    } else {
        iot_printf("[B%d] successful\n", id);
    }
}

void ahb_bus_monitor_test()
{
#if (TEST_CASE_BUS_MON == BUS_MON_ADDR)
    do {
        // ahb bus monitor config
        ahb_busmon_addr_t addr = {BUS_MON_LADDR, BUS_MON_HADDR, 0};
        ahb_busmon_cfg(0, AHB_BUSMON_OP_RW, &addr);
        ahb_busmon_int_clr(0);
        volatile uint32_t *reg = (volatile uint32_t *) (BUS_ERR_IN_ADDR);
        *reg = 0xaabbccdd;
        test_bus_mon(0, BUS_ERR_IN_ADDR);
    } while(0);
#endif

}

int main(void)
{
    //platform_init();
    dbg_uart_init();

    iot_printf("start to monitor test\n");

    do {
        master_monitor_test();
        //slave_monitor_test();   // not ready
        ahb_bus_monitor_test();

    } while(0);

    iot_printf("end of monitor test\n");

    return 0;
}