def get_value(b:bytearray): ret=0 for i,item in enumerate(b): ret|=item<<(8*i) return ret def set_value(b:bytearray,value:int): for i in range(len(b)): b[i]=(value>>(8*i))&0xff class cpu(object): def __init__(self,rom_addr:int,rom_size:int,mem_addr:int,mem_size:int) -> None: self.rom_addr=rom_addr self.rom=bytearray(rom_size) self.mem_addr=mem_addr self.mem=bytearray(mem_size) self.pc=self.mem_addr self.sp=self.mem_addr self.rp=self.pc self.fp=self.sp self.regs=[] for i in range(32): self.regs.append(0) def get_value(self,addr:int,size:int): if not (size in [1,2,4,8]): raise Exception(f"CPU 异常 因为地址未对齐 {size}") if(addr>=self.rom_addr) and (addr=self.rom_addr) and (addr None: pass def add(self,src1:int,src2:int,dst:int): return (0x81<<24)|(src1<<16)|(src2<<8)|(dst) def sub(self,src1:int,src2:int,dst:int): return (0x82<<24)|(src1<<16)|(src2<<8)|(dst) def mul(self,src1:int,src2:int,dst:int): return (0x83<<24)|(src1<<16)|(src2<<8)|(dst) def div(self,src1:int,src2:int,dst:int): return (0x84<<24)|(src1<<16)|(src2<<8)|(dst) def bitand(self,src1:int,src2:int,dst:int): return (0x85<<24)|(src1<<16)|(src2<<8)|(dst) def bitor(self,src1:int,src2:int,dst:int): return (0x86<<24)|(src1<<16)|(src2<<8)|(dst) def bitxor(self,src1:int,src2:int,dst:int): return (0x87<<24)|(src1<<16)|(src2<<8)|(dst) def mov(self,src:int,dst:int): return (0x88<<24)|(src<<8)|(dst) def lsh(self,shift_bit:int,src:int,dst:int): return (0x89<<24)|(shift_bit<<16)|(src<<8)|(dst) def rsh(self,shift_bit:int,src:int,dst:int): return (0x8a<<24)|(shift_bit<<16)|(src<<8)|(dst) def neg(self,src:int,dst:int): return (0x8b<<24)|(src<<8)|(dst) def load(self,reg:int,mem_addr_reg:int): return (0x91<<24)|(reg<<8)|(mem_addr_reg) def save(self,reg:int,mem_addr_reg:int): return (0x92<<24)|(reg<<8)|(mem_addr_reg) def jmp(self,addr_reg:int): return (0xa0<<24)|(addr_reg) def jmp_zero(self,juge_reg:int,reg:int): return (0xa1<<24)|(juge_reg<<8)|(reg) def jmp_no_zero(self,juge_reg:int,reg:int): return (0xa2<<24)|(juge_reg<<8)|(reg) def push_all(self): return (0xb0<<24) def pop_all(self): return (0xb1<<24) def sp_add(self,reg:int): return (0xb2<<24)|(reg) def sp_add_count(self,count_reg:int,data_addr_reg:int): return (0xb3<<24)|(count_reg<<8)|(data_addr_reg) def sp_sub(self,count_reg:int): return (0xb4<<24)|(count_reg)