2025-06-27 00:32:57 +08:00
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#include "usart2.h"
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#include "stm32f4xx.h"
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#include "buff.h"
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2025-07-05 19:47:28 +08:00
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/*----------------------USART<52><54><EFBFBD>ú<EFBFBD> ------------------------*/
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2025-06-27 00:32:57 +08:00
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#define USART_BaudRate_ 115200
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#if 0
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#define USART_TX_PIN GPIO_Pin_9
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#define USART_TX_PORT GPIOA
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#define USART_TX_CLK RCC_AHB1Periph_GPIOA
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#define USART_TX_PinSource GPIO_PinSource9
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#define USART_RX_PIN GPIO_Pin_10
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#define USART_RX_PORT GPIOA
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#define USART_RX_CLK RCC_AHB1Periph_GPIOA
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#define USART_RX_PinSource GPIO_PinSource10
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#define GPIO_AF_USART GPIO_AF_USART1
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#define USART USART1
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#define USART_IRQn USART1_IRQn
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#define USART_CLK_ON() RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1, ENABLE)
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#define USART_CLK_OFF() RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1, DISABLE)
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#define USART_IRQHandler USART1_IRQHandler
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#else
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#define USART_TX_PIN GPIO_Pin_5
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#define USART_TX_PORT GPIOD
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#define USART_TX_CLK RCC_AHB1Periph_GPIOD
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#define USART_TX_PinSource GPIO_PinSource5
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#define USART_RX_PIN GPIO_Pin_6
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#define USART_RX_PORT GPIOD
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#define USART_RX_CLK RCC_AHB1Periph_GPIOD
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#define USART_RX_PinSource GPIO_PinSource6
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#define GPIO_AF_USART GPIO_AF_USART2
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#define USART USART2
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#define USART_IRQn USART2_IRQn
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#define USART_CLK_ON() RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE)
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#define USART_CLK_OFF() RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, DISABLE)
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#define USART_IRQHandler USART2_IRQHandler
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#endif
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static data_buff g_recv;
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static void (*g_recv_cb)(uint8_t d);
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2025-07-05 19:47:28 +08:00
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// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>usart IO<49>ڳ<EFBFBD>ʼ<EFBFBD><CABC>
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2025-06-27 00:32:57 +08:00
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//
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static void USART_GPIO_Config (void)
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{
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GPIO_InitTypeDef GPIO_InitStructure;
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2025-07-05 19:47:28 +08:00
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RCC_AHB1PeriphClockCmd ( USART_TX_CLK|USART_RX_CLK, ENABLE); //IO<49><4F>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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2025-06-27 00:32:57 +08:00
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2025-07-05 19:47:28 +08:00
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//IO<49><4F><EFBFBD><EFBFBD>
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF; //<2F><><EFBFBD><EFBFBD>ģʽ
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GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; //<2F><><EFBFBD><EFBFBD>
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GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP; //<2F><><EFBFBD><EFBFBD>
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GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz; //<2F>ٶȵȼ<C8B5>
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2025-06-27 00:32:57 +08:00
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2025-07-05 19:47:28 +08:00
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//<2F><>ʼ<EFBFBD><CABC> TX <09><><EFBFBD><EFBFBD>
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2025-06-27 00:32:57 +08:00
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GPIO_InitStructure.GPIO_Pin = USART_TX_PIN;
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GPIO_Init(USART_TX_PORT, &GPIO_InitStructure);
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2025-07-05 19:47:28 +08:00
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//<2F><>ʼ<EFBFBD><CABC> RX <20><><EFBFBD><EFBFBD>
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2025-06-27 00:32:57 +08:00
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GPIO_InitStructure.GPIO_Pin = USART_RX_PIN;
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GPIO_Init(USART_RX_PORT, &GPIO_InitStructure);
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2025-07-05 19:47:28 +08:00
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//IO<49><4F><EFBFBD>ã<EFBFBD><C3A3><EFBFBD><EFBFBD>õ<EFBFBD>USART
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2025-06-27 00:32:57 +08:00
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GPIO_PinAFConfig(USART_TX_PORT,USART_TX_PinSource,GPIO_AF_USART);
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GPIO_PinAFConfig(USART_RX_PORT,USART_RX_PinSource,GPIO_AF_USART);
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}
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2025-07-05 19:47:28 +08:00
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// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>USART <20>ڳ<EFBFBD>ʼ<EFBFBD><CABC>
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2025-06-27 00:32:57 +08:00
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//
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void usart2_init(void)
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{
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USART_InitTypeDef USART_InitStructure;
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USART_CLK_ON();
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2025-07-05 19:47:28 +08:00
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// IO<49>ڳ<EFBFBD>ʼ<EFBFBD><CABC>
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2025-06-27 00:32:57 +08:00
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USART_GPIO_Config();
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2025-07-05 19:47:28 +08:00
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// <20><><EFBFBD>ô<EFBFBD><C3B4>ڸ<EFBFBD><DAB8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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USART_InitStructure.USART_BaudRate = USART_BaudRate_; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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USART_InitStructure.USART_WordLength = USART_WordLength_8b; //<2F><><EFBFBD><EFBFBD>λ8λ
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USART_InitStructure.USART_StopBits = USART_StopBits_1; //ֹͣλ1λ
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USART_InitStructure.USART_Parity = USART_Parity_No ; //<2F><>У<EFBFBD><D0A3>
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USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx; //<2F><><EFBFBD>ͺͽ<CDBA><CDBD><EFBFBD>ģʽ
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USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None; // <20><>ʹ<EFBFBD><CAB9>Ӳ<EFBFBD><D3B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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2025-06-27 00:32:57 +08:00
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2025-07-05 19:47:28 +08:00
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USART_Init(USART,&USART_InitStructure); //<2F><>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>1
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USART_Cmd(USART,ENABLE); //ʹ<>ܴ<EFBFBD><DCB4><EFBFBD>1
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2025-06-27 00:32:57 +08:00
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buff_init(&g_recv,1024,1,0xff,0xfc);
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2025-07-05 19:47:28 +08:00
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/* <20><EFBFBD><F2BFAABD><EFBFBD><EFBFBD>ж<EFBFBD> */
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2025-06-27 00:32:57 +08:00
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USART_ITConfig(USART,USART_IT_RXNE,ENABLE);
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NVIC_InitTypeDef NVIC_InitStructure;
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2025-07-05 19:47:28 +08:00
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NVIC_InitStructure.NVIC_IRQChannel=USART_IRQn; //<2F><>ʱ<EFBFBD><CAB1><EFBFBD>ж<EFBFBD>
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NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority=0x00; //<2F><>ռ<EFBFBD><D5BC><EFBFBD>ȼ<EFBFBD>1
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NVIC_InitStructure.NVIC_IRQChannelSubPriority=0x01; //<2F><><EFBFBD><EFBFBD><EFBFBD>ȼ<EFBFBD>3
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2025-06-27 00:32:57 +08:00
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NVIC_InitStructure.NVIC_IRQChannelCmd=ENABLE;
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NVIC_Init(&NVIC_InitStructure);
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}
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void usart2_deinit(void)
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{
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NVIC_InitTypeDef NVIC_InitStructure;
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2025-07-05 19:47:28 +08:00
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NVIC_InitStructure.NVIC_IRQChannel=USART_IRQn; //<2F><>ʱ<EFBFBD><CAB1><EFBFBD>ж<EFBFBD>
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NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority=0x00; //<2F><>ռ<EFBFBD><D5BC><EFBFBD>ȼ<EFBFBD>1
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NVIC_InitStructure.NVIC_IRQChannelSubPriority=0x01; //<2F><><EFBFBD><EFBFBD><EFBFBD>ȼ<EFBFBD>3
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2025-06-27 00:32:57 +08:00
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NVIC_InitStructure.NVIC_IRQChannelCmd=DISABLE;
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NVIC_Init(&NVIC_InitStructure);
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USART_DeInit(USART);
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buff_deinit(&g_recv);
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}
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void usart2_set_cbcall(void (*cb)(uint8_t))
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{
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g_recv_cb=cb;
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}
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int usart2_get_byte(uint8_t *data)
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{
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return buff_read_byte(&g_recv,data);
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}
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int usart2_put_byte(uint8_t data)
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{
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USART_SendData(USART, data);
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while (USART_GetFlagStatus(USART, USART_FLAG_TXE) == RESET);
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return 0;
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}
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int usart2_clear(void)
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{
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return buff_clear(&g_recv);
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}
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void USART_IRQHandler (void)
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{
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uint8_t t=0;
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if(USART->SR&USART_FLAG_RXNE)
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{
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t=USART->DR;
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buff_save_byte(&g_recv,t);
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if(g_recv_cb) g_recv_cb(t);
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}
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else
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{
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t=USART->SR;
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t=USART->DR;
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}
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}
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