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# ifndef __24L01_H
# define __24L01_H
# include "stm32f4xx.h"
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//NRF24L01<30> Ĵ<EFBFBD> <C4B4> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD>
# define NRF_READ_REG 0x00 //<2F> <> <EFBFBD> <EFBFBD> <EFBFBD> üĴ<C3BC> <C4B4> <EFBFBD> ,<2C> <> 5λΪ<CEBB> Ĵ<EFBFBD> <C4B4> <EFBFBD> <EFBFBD> <EFBFBD> ַ
# define NRF_WRITE_REG 0x20 //д<> <D0B4> <EFBFBD> üĴ<C3BC> <C4B4> <EFBFBD> ,<2C> <> 5λΪ<CEBB> Ĵ<EFBFBD> <C4B4> <EFBFBD> <EFBFBD> <EFBFBD> ַ
# define RD_RX_PLOAD 0x61 //<2F> <> RX<52> <58> Ч<EFBFBD> <D0A7> <EFBFBD> <EFBFBD> ,1~32<33> ֽ<EFBFBD>
# define WR_TX_PLOAD 0xA0 //дTX<54> <58> Ч<EFBFBD> <D0A7> <EFBFBD> <EFBFBD> ,1~32<33> ֽ<EFBFBD>
# define FLUSH_TX 0xE1 //<2F> <> <EFBFBD> <EFBFBD> TX FIFO<46> Ĵ<EFBFBD> <C4B4> <EFBFBD> .<2E> <> <EFBFBD> <EFBFBD> ģʽ <C4A3> <CABD> <EFBFBD> <EFBFBD>
# define FLUSH_RX 0xE2 //<2F> <> <EFBFBD> <EFBFBD> RX FIFO<46> Ĵ<EFBFBD> <C4B4> <EFBFBD> .<2E> <> <EFBFBD> <EFBFBD> ģʽ <C4A3> <CABD> <EFBFBD> <EFBFBD>
# define REUSE_TX_PL 0xE3 //<2F> <> <EFBFBD> <EFBFBD> ʹ <EFBFBD> <CAB9> <EFBFBD> <EFBFBD> һ <EFBFBD> <D2BB> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> ,CEΪ<45> <CEAA> ,<2C> <> <EFBFBD> ݰ<EFBFBD> <DDB0> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> Ϸ<EFBFBD> <CFB7> <EFBFBD> .
# define NOP 0xFF //<2F> ղ<EFBFBD> <D5B2> <EFBFBD> ,<2C> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> ״̬<D7B4> Ĵ<EFBFBD> <C4B4> <EFBFBD>
//SPI(NRF24L01)<29> Ĵ<EFBFBD> <C4B4> <EFBFBD> <EFBFBD> <EFBFBD> ַ
# define CONFIG 0x00 //<2F> <> <EFBFBD> üĴ<C3BC> <C4B4> <EFBFBD> <EFBFBD> <EFBFBD> ַ;bit0:1<> <31> <EFBFBD> <EFBFBD> ģʽ ,0<> <30> <EFBFBD> <EFBFBD> ģʽ ;bit1:<3A> <> ѡ <EFBFBD> <D1A1> ;bit2:CRCģʽ ;bit3:CRCʹ <43> <CAB9> ;
//bit4:<3A> ж<EFBFBD> MAX_RT(<28> ﵽ<EFBFBD> <EFB5BD> <EFBFBD> <EFBFBD> <EFBFBD> ط<EFBFBD> <D8B7> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> ж<EFBFBD> )ʹ <> <CAB9> ;bit5:<3A> ж<EFBFBD> TX_DSʹ <53> <CAB9> ;bit6:<3A> ж<EFBFBD> RX_DRʹ <52> <CAB9>
# define EN_AA 0x01 //ʹ <> <CAB9> <EFBFBD> Զ<EFBFBD> Ӧ<EFBFBD> <D3A6> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> bit0~5,<2C> <> Ӧͨ<D3A6> <CDA8> 0~5
# define EN_RXADDR 0x02 //<2F> <> <EFBFBD> յ<EFBFBD> ַ<EFBFBD> <D6B7> <EFBFBD> <EFBFBD> ,bit0~5,<2C> <> Ӧͨ<D3A6> <CDA8> 0~5
# define SETUP_AW 0x03 //<2F> <> <EFBFBD> õ<EFBFBD> ַ<EFBFBD> <D6B7> <EFBFBD> <EFBFBD> (<28> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> ͨ<EFBFBD> <CDA8> ):bit1,0:00,3<> ֽ<EFBFBD> ;01,4<> ֽ<EFBFBD> ;02,5<> ֽ<EFBFBD> ;
# define SETUP_RETR 0x04 //<2F> <> <EFBFBD> <EFBFBD> <EFBFBD> Զ<EFBFBD> <D4B6> ط<EFBFBD> ;bit3:0,<2C> Զ<EFBFBD> <D4B6> ط<EFBFBD> <D8B7> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> ;bit7:4,<2C> Զ<EFBFBD> <D4B6> ط<EFBFBD> <D8B7> <EFBFBD> ʱ 250*x+86us
# define RF_CH 0x05 //RFͨ<46> <CDA8> ,bit6:0,<2C> <> <EFBFBD> <EFBFBD> ͨ<EFBFBD> <CDA8> Ƶ<EFBFBD> <C6B5> ;
# define RF_SETUP 0x06 //RF<52> Ĵ<EFBFBD> <C4B4> <EFBFBD> ;bit3:<3A> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> (0:1Mbps,1:2Mbps);bit2:1,<2C> <> <EFBFBD> 书<EFBFBD> <E4B9A6> ;bit0:<3A> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> Ŵ<EFBFBD> <C5B4> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD>
# define STATUS 0x07 //״̬<D7B4> Ĵ<EFBFBD> <C4B4> <EFBFBD> ;bit0:TX FIFO<46> <4F> <EFBFBD> <EFBFBD> ־;bit3:1,<2C> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> ͨ<EFBFBD> <CDA8> <EFBFBD> <EFBFBD> (<28> <> <EFBFBD> <EFBFBD> :6);bit4,<2C> ﵽ<EFBFBD> <EFB5BD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> ط<EFBFBD>
//bit5:<3A> <> <EFBFBD> ݷ<EFBFBD> <DDB7> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> ж<EFBFBD> ;bit6:<3A> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> ж<EFBFBD> ;
# define MAX_TX 0x10 //<2F> ﵽ<EFBFBD> <EFB5BD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> ʹ <EFBFBD> <CDB4> <EFBFBD> <EFBFBD> ж<EFBFBD>
# define TX_OK 0x20 //TX<54> <58> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> ж<EFBFBD>
# define RX_OK 0x40 //<2F> <> <EFBFBD> յ<EFBFBD> <D5B5> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> ж<EFBFBD>
# define OBSERVE_TX 0x08 //<2F> <> <EFBFBD> ͼ<EFBFBD> <CDBC> <EFBFBD> <EFBFBD> Ĵ<EFBFBD> <C4B4> <EFBFBD> ,bit7:4,<2C> <> <EFBFBD> ݰ<EFBFBD> <DDB0> <EFBFBD> ʧ<EFBFBD> <CAA7> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> ;bit3:0,<2C> ط<EFBFBD> <D8B7> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD>
# define CD 0x09 //<2F> ز<EFBFBD> <D8B2> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> Ĵ<EFBFBD> <C4B4> <EFBFBD> ,bit0,<2C> ز<EFBFBD> <D8B2> <EFBFBD> <EFBFBD> <EFBFBD> ;
# define RX_ADDR_P0 0x0A //<2F> <> <EFBFBD> <EFBFBD> ͨ<EFBFBD> <CDA8> 0<EFBFBD> <30> <EFBFBD> յ<EFBFBD> ַ,<2C> <> <EFBFBD> <EFBFBD> 5<EFBFBD> <35> <EFBFBD> ֽ<EFBFBD> ,<2C> <> <EFBFBD> ֽ<EFBFBD> <D6BD> <EFBFBD> ǰ
# define RX_ADDR_P1 0x0B //<2F> <> <EFBFBD> <EFBFBD> ͨ<EFBFBD> <CDA8> 1<EFBFBD> <31> <EFBFBD> յ<EFBFBD> ַ,<2C> <> <EFBFBD> <EFBFBD> 5<EFBFBD> <35> <EFBFBD> ֽ<EFBFBD> ,<2C> <> <EFBFBD> ֽ<EFBFBD> <D6BD> <EFBFBD> ǰ
# define RX_ADDR_P2 0x0C //<2F> <> <EFBFBD> <EFBFBD> ͨ<EFBFBD> <CDA8> 2<EFBFBD> <32> <EFBFBD> յ<EFBFBD> ַ,<2C> <> <EFBFBD> <EFBFBD> <EFBFBD> ֽڿ<D6BD> <DABF> <EFBFBD> <EFBFBD> <EFBFBD> ,<2C> <> <EFBFBD> ֽ<EFBFBD> ,<2C> <> <EFBFBD> <EFBFBD> ͬRX_ADDR_P1[39:8]<5D> <> <EFBFBD> <EFBFBD> ;
# define RX_ADDR_P3 0x0D //<2F> <> <EFBFBD> <EFBFBD> ͨ<EFBFBD> <CDA8> 3<EFBFBD> <33> <EFBFBD> յ<EFBFBD> ַ,<2C> <> <EFBFBD> <EFBFBD> <EFBFBD> ֽڿ<D6BD> <DABF> <EFBFBD> <EFBFBD> <EFBFBD> ,<2C> <> <EFBFBD> ֽ<EFBFBD> ,<2C> <> <EFBFBD> <EFBFBD> ͬRX_ADDR_P1[39:8]<5D> <> <EFBFBD> <EFBFBD> ;
# define RX_ADDR_P4 0x0E //<2F> <> <EFBFBD> <EFBFBD> ͨ<EFBFBD> <CDA8> 4<EFBFBD> <34> <EFBFBD> յ<EFBFBD> ַ,<2C> <> <EFBFBD> <EFBFBD> <EFBFBD> ֽڿ<D6BD> <DABF> <EFBFBD> <EFBFBD> <EFBFBD> ,<2C> <> <EFBFBD> ֽ<EFBFBD> ,<2C> <> <EFBFBD> <EFBFBD> ͬRX_ADDR_P1[39:8]<5D> <> <EFBFBD> <EFBFBD> ;
# define RX_ADDR_P5 0x0F //<2F> <> <EFBFBD> <EFBFBD> ͨ<EFBFBD> <CDA8> 5<EFBFBD> <35> <EFBFBD> յ<EFBFBD> ַ,<2C> <> <EFBFBD> <EFBFBD> <EFBFBD> ֽڿ<D6BD> <DABF> <EFBFBD> <EFBFBD> <EFBFBD> ,<2C> <> <EFBFBD> ֽ<EFBFBD> ,<2C> <> <EFBFBD> <EFBFBD> ͬRX_ADDR_P1[39:8]<5D> <> <EFBFBD> <EFBFBD> ;
# define TX_ADDR 0x10 //<2F> <> <EFBFBD> ͵<EFBFBD> ַ(<28> <> <EFBFBD> ֽ<EFBFBD> <D6BD> <EFBFBD> ǰ),ShockBurstTMģʽ <C4A3> <CABD> ,RX_ADDR_P0<50> <30> <EFBFBD> ˵<EFBFBD> ַ<EFBFBD> <D6B7> <EFBFBD> <EFBFBD>
# define RX_PW_P0 0x11 //<2F> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> ͨ<EFBFBD> <CDA8> 0<EFBFBD> <30> Ч<EFBFBD> <D0A7> <EFBFBD> ݿ<EFBFBD> <DDBF> <EFBFBD> (1~32<33> ֽ<EFBFBD> ),<2C> <> <EFBFBD> <EFBFBD> Ϊ0<CEAA> <30> <EFBFBD> Ƿ<EFBFBD>
# define RX_PW_P1 0x12 //<2F> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> ͨ<EFBFBD> <CDA8> 1<EFBFBD> <31> Ч<EFBFBD> <D0A7> <EFBFBD> ݿ<EFBFBD> <DDBF> <EFBFBD> (1~32<33> ֽ<EFBFBD> ),<2C> <> <EFBFBD> <EFBFBD> Ϊ0<CEAA> <30> <EFBFBD> Ƿ<EFBFBD>
# define RX_PW_P2 0x13 //<2F> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> ͨ<EFBFBD> <CDA8> 2<EFBFBD> <32> Ч<EFBFBD> <D0A7> <EFBFBD> ݿ<EFBFBD> <DDBF> <EFBFBD> (1~32<33> ֽ<EFBFBD> ),<2C> <> <EFBFBD> <EFBFBD> Ϊ0<CEAA> <30> <EFBFBD> Ƿ<EFBFBD>
# define RX_PW_P3 0x14 //<2F> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> ͨ<EFBFBD> <CDA8> 3<EFBFBD> <33> Ч<EFBFBD> <D0A7> <EFBFBD> ݿ<EFBFBD> <DDBF> <EFBFBD> (1~32<33> ֽ<EFBFBD> ),<2C> <> <EFBFBD> <EFBFBD> Ϊ0<CEAA> <30> <EFBFBD> Ƿ<EFBFBD>
# define RX_PW_P4 0x15 //<2F> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> ͨ<EFBFBD> <CDA8> 4<EFBFBD> <34> Ч<EFBFBD> <D0A7> <EFBFBD> ݿ<EFBFBD> <DDBF> <EFBFBD> (1~32<33> ֽ<EFBFBD> ),<2C> <> <EFBFBD> <EFBFBD> Ϊ0<CEAA> <30> <EFBFBD> Ƿ<EFBFBD>
# define RX_PW_P5 0x16 //<2F> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> ͨ<EFBFBD> <CDA8> 5<EFBFBD> <35> Ч<EFBFBD> <D0A7> <EFBFBD> ݿ<EFBFBD> <DDBF> <EFBFBD> (1~32<33> ֽ<EFBFBD> ),<2C> <> <EFBFBD> <EFBFBD> Ϊ0<CEAA> <30> <EFBFBD> Ƿ<EFBFBD>
# define NRF_FIFO_STATUS 0x17 //FIFO״̬<D7B4> Ĵ<EFBFBD> <C4B4> <EFBFBD> ;bit0,RX FIFO<46> Ĵ<EFBFBD> <C4B4> <EFBFBD> <EFBFBD> ձ<EFBFBD> ־;bit1,RX FIFO<46> <4F> <EFBFBD> <EFBFBD> ־;bit2,3,<2C> <> <EFBFBD> <EFBFBD>
//bit4,TX FIFO<46> ձ<EFBFBD> ־;bit5,TX FIFO<46> <4F> <EFBFBD> <EFBFBD> ־;bit6,1,ѭ<> <D1AD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> һ <EFBFBD> <D2BB> <EFBFBD> ݰ<EFBFBD> .0,<2C> <> ѭ<EFBFBD> <D1AD> ;
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//////////////////////////////////////////////////////////////////////////////////////////////////////////
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//24L01<30> <31> <EFBFBD> ͽ<EFBFBD> <CDBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> ݿ<EFBFBD> <DDBF> ȶ<EFBFBD> <C8B6> <EFBFBD>
# define TX_ADR_WIDTH 5 //5<> ֽڵĵ<DAB5> ַ<EFBFBD> <D6B7> <EFBFBD> <EFBFBD>
# define RX_ADR_WIDTH 5 //5<> ֽڵĵ<DAB5> ַ<EFBFBD> <D6B7> <EFBFBD> <EFBFBD>
# define TX_PLOAD_WIDTH 32 //5<> ֽڵ<D6BD> <DAB5> û<EFBFBD> <C3BB> <EFBFBD> <EFBFBD> ݿ<EFBFBD> <DDBF> <EFBFBD>
# define RX_PLOAD_WIDTH 32 //5<> ֽڵ<D6BD> <DAB5> û<EFBFBD> <C3BB> <EFBFBD> <EFBFBD> ݿ<EFBFBD> <DDBF> <EFBFBD>
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// <20> <> ʼ <EFBFBD> <CABC>
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void nrf24l01_init ( void ) ;
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// ȥ<> <C8A5> ʼ <EFBFBD> <CABC>
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void nrf24l01_deinit ( void ) ;
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// nrf<72> <66> <EFBFBD> жϷ<D0B6> <CFB7> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD>
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void nrf24l01_irq ( void ) ;
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// <20> <> <EFBFBD> ý<EFBFBD> <C3BD> յ<EFBFBD> <D5B5> <EFBFBD> <EFBFBD> ݵĻص<C4BB> <D8B5> <EFBFBD> <EFBFBD> <EFBFBD>
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void nrf24l01_set_recv_cb ( void ( * fun ) ( void * t ) , void * t ) ;
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// <20> <> <EFBFBD> ÷<EFBFBD> <C3B7> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> ɵĻص<C4BB> <D8B5> <EFBFBD> <EFBFBD> <EFBFBD>
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void nrf24l01_set_send_cb ( void ( * fun ) ( void * t ) , void * t ) ;
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// <20> <> <EFBFBD> ò<EFBFBD> <C3B2> <EFBFBD> <EFBFBD> ж<EFBFBD> ʱ<EFBFBD> Ļص<C4BB> <D8B5> <EFBFBD> <EFBFBD> <EFBFBD>
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void nrf24l01_set_irq_cb ( void ( * fun ) ( void ) ) ;
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// <20> <> ȡ<EFBFBD> <C8A1> <EFBFBD> ݣ<EFBFBD> <DDA3> <EFBFBD> <EFBFBD> ȹ̶<C8B9> Ϊ RX_PLOAD_WIDTH
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int nrf24l01_read ( void * buf ) ;
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// <20> <> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> <EFBFBD> ݣ<EFBFBD> <DDA3> <EFBFBD> <EFBFBD> ȹ̶<C8B9> Ϊ TX_PLOAD_WIDTH
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int nrf24l01_send ( void * data ) ;
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// <20> <> <EFBFBD> õ<EFBFBD> ַ<EFBFBD> <D6B7> <EFBFBD> ҵģ<D2B5> <C4A3> Է<EFBFBD> <D4B7> <EFBFBD>
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void nrf24l01_set_addr ( u8 my [ 5 ] , u8 dst [ 5 ] ) ;
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// <20> <> <EFBFBD> <EFBFBD> ͨ<EFBFBD> <CDA8> <EFBFBD> ŵ<EFBFBD>
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void nrf24l01_set_chan ( u8 chan ) ;
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//<2F> <> <EFBFBD> <EFBFBD> 24L01<30> Ƿ<EFBFBD> <C7B7> <EFBFBD> <EFBFBD> <EFBFBD>
//<2F> <> <EFBFBD> <EFBFBD> ֵ:0<> <30> <EFBFBD> ɹ<EFBFBD> ;1<> <31> ʧ<EFBFBD> <CAA7>
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u8 nrf24l01_check ( void ) ;
# endif