player/Project/Src/NES/6502mac_gcc.S

.include "6502def.s"


// <EFBFBD><EFBFBD> 6502 PC <EFBFBD><EFBFBD>ַת<EFBFBD><EFBFBD>Ϊ ROM ƫ<EFBFBD>Ƶ<EFBFBD>ַ
.macro encodePC
    and r1, m6502_pc, #0xE000       // r9 & 0xE000
    ldr r2, =memmap_tbl
    add r2, globalptr               // <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ڴ<EFBFBD>ӳ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ<EFBFBD><EFBFBD> r2
    lsr r0, r1, #11                 // >>11λ
    ldr r0, [r2, r0]                // <EFBFBD><EFBFBD> r2 + r0 <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݵ<EFBFBD> r0
    str r0, [globalptr,#lastbank]         // <EFBFBD><EFBFBD><EFBFBD>浱ǰ bank ƫ<EFBFBD><EFBFBD>
    add m6502_pc, m6502_pc, r0      // m6502_pc += r0
.endm

// <EFBFBD><EFBFBD><EFBFBD><EFBFBD> 6502 <EFBFBD><EFBFBD>־<EFBFBD><EFBFBD> r0
.macro encodeP extra
    and r0, cycles, #CYC_V+CYC_D+CYC_I+CYC_C       // CYC_V+CYC_D+CYC_I+CYC_C
    tst m6502_nz, #0x80000000     // PSR_N
    IT NE
    orrne r0, r0, #N        // <EFBFBD><EFBFBD><EFBFBD><EFBFBD> N <EFBFBD><EFBFBD>־

    tst m6502_nz, #0xFF           // Z <EFBFBD><EFBFBD>־
    IT EQ
    orreq r0, r0, #Z        // <EFBFBD><EFBFBD><EFBFBD><EFBFBD> Z <EFBFBD><EFBFBD>־
    orr r0, r0, #\extra     // <EFBFBD><EFBFBD><EFBFBD>Ӷ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־ (B/R)
.endm

// <EFBFBD><EFBFBD><EFBFBD><EFBFBD> r0 <EFBFBD>е<EFBFBD> 6502 <EFBFBD><EFBFBD>־
.macro decodeP
    bic cycles,cycles,#CYC_V+CYC_D+CYC_I+CYC_C       // <EFBFBD><EFBFBD><EFBFBD><EFBFBD> CYC_V+CYC_D+CYC_I+CYC_C
    and r1, r0, #V+D+I+C    // <EFBFBD><EFBFBD>ȡ V/D/I/C <EFBFBD><EFBFBD>־
    orr cycles,cycles,r1          // д<EFBFBD><EFBFBD> cycles
    bic m6502_nz, r0, #0xFD       // r0 is signed
    eor m6502_nz, m6502_nz, #Z          // <EFBFBD><EFBFBD>ת Z λ
.endm

// <EFBFBD><EFBFBD>ȡ<EFBFBD><EFBFBD>һ<EFBFBD><EFBFBD>ָ<EFBFBD>ִ<EFBFBD><EFBFBD>
.macro fetch count
    ldr r0, [r10,#clocksh]
    add r0, r0, \count
    str r0, [globalptr,#clocksh]

    ldr r1, [globalptr,#opz]
    subs cycles, cycles, \count*256

    ITT PL
    ldrbpl r0, [m6502_pc], #1
    ldrpl pc, [r1, r0, lsl #2]

    ldr pc, [globalptr,#nexttimeout]
.endm

// ͬ<EFBFBD>ϣ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> Carry λ
.macro fetch_c count
    ldr r0, [globalptr,#clocksh]
    add r0, r0, \count
    str r0, [globalptr,#clocksh]

    ldr r1, [globalptr,#opz]
    sbcs cycles, cycles, \count*256

    ITT PL
    ldrbpl r0, [m6502_pc], #1
    ldrpl pc, [r1, r0, lsl #2]

    ldr pc, [globalptr,#nexttimeout]
.endm

// <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ڱ<EFBFBD>־
.macro clearcycles
    and cycles,cycles,#CYC_MASK       // CYC_MASK
.endm

// <EFBFBD><EFBFBD><EFBFBD>Ե<EFBFBD>ַ<EFBFBD><EFBFBD>ȡ
.macro readmemabs
    and r1, addy, #0xE000
    adr lr, 0f
    lsr r1, r1, #11
    ldr pc, [m6502_rmem, r1]
0:
.endm

// <EFBFBD><EFBFBD>ҳ<EFBFBD><EFBFBD>ȡ
.macro readmemzp
    ldrb r0, [cpu_zpage, addy]
.endm

// <EFBFBD><EFBFBD>ҳ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ<EFBFBD><EFBFBD>
.macro readmemzpi
    lsr r0, addy, #24
    ldrb r0, [cpu_zpage, r0]
.endm

// RAM <EFBFBD><EFBFBD>ȡ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> NZ
.macro readmemzps
    ldrsb m6502_nz, [cpu_zpage,addy]
.endm

// <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ
.macro readmemimm
    ldrb r0, [m6502_pc], #1
.endm

// <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> NZ
.macro readmemimms
    ldrsb m6502_nz, [m6502_pc], #1
.endm

// <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ѡ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ<EFBFBD><EFBFBD>ʽ
.macro readmem
    .if _type == _ABS
        readmemabs
    .elseif _type == _ZP
        readmemzp
    .elseif _type == _ZPI
        readmemzpi
    .elseif _type == _IMM
        readmemimm
    .endif
.endm

// <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>չ<EFBFBD>Ķ<EFBFBD>ȡ
.macro readmems
    .if _type == _ABS
        readmemabs
        orr m6502_nz, r0, r0, lsl #24
    .elseif _type == _ZP
        readmemzps
    .elseif _type == _IMM
        readmemimms
    .endif
.endm

// <EFBFBD><EFBFBD><EFBFBD>Ե<EFBFBD>ַд<EFBFBD><EFBFBD>
.macro writememabs
    and r1, addy, #0xE000
    @ ldr r2, =writemem_tbl
    @ add r2, globalptr
    add r2, globalptr,#writemem_tbl
    adr lr, 0f

    lsr r1, r1, #11
    ldr pc, [r2, r1]
0:
.endm

// <EFBFBD><EFBFBD>ҳд<EFBFBD><EFBFBD>
.macro writememzp
    strb r0, [cpu_zpage,addy]
.endm

// <EFBFBD><EFBFBD>ҳ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>д<EFBFBD><EFBFBD>
.macro writememzpi
    lsr r1, addy, #24
    strb r0, [cpu_zpage, r1]
.endm

// <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ѡ<EFBFBD><EFBFBD>д<EFBFBD>뷽ʽ
.macro writemem
    .if _type == _ABS
        writememabs
    .elseif _type == _ZP
        writememzp
    .elseif _type == _ZPI
        writememzpi
    .endif
.endm

// 16λѹջ
.macro push16
    mov r1, r0, lsr #8
    ldr r2, [globalptr,#m6502_s]
    strb r1, [r2], #-1
    orr r2, r2, #0x100
    strb r0, [r2], #-1
    strb r2, [globalptr,#m6502_s]
.endm

// 8λѹջ
.macro push8 x
    ldr r2, [globalptr,#m6502_s]
    strb \x, [r2], #-1
    strb r2, [globalptr,#m6502_s]
.endm

// 16λ<EFBFBD><EFBFBD>ջ
.macro pop16
    ldrb r2, [globalptr,#m6502_s]
    add r2, r2, #2
    strb r2, [globalptr,#m6502_s]
    ldr r2, [globalptr,#m6502_s]
    ldrb r0, [r2], #-1
    orr r2, r2, #0x100
    ldrb m6502_pc, [r2]
    orr m6502_pc, m6502_pc, r0, lsl #8
.endm

// 8λ<EFBFBD><EFBFBD>ջ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>չ<EFBFBD><EFBFBD>
.macro pop8 x
    ldrb r2, [globalptr,#m6502_s]
    add r2, r2, #1
    strb r2, [globalptr,#m6502_s]
    orr r2, r2, #0x100
    ldrsb \x, [cpu_zpage, r2]
.endm

// <EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ѱַģʽ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
.equ _IMM, 1
.equ _ZP,  2
.equ _ZPI, 3
.equ _ABS, 4

// <EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ѱַ
.macro doABS
.set _type, _ABS
    ldrb addy, [m6502_pc], #1
    ldrb r0, [m6502_pc], #1
    orr addy, addy, r0, lsl #8
.endm

// X<EFBFBD>Ĵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
.macro doAIX
.set _type, _ABS
    ldrb addy, [m6502_pc], #1
    ldrb r0, [m6502_pc], #1
    orr addy, addy, r0, lsl #8
    add addy, addy, m6502_x, lsr #24
.endm

// Y<EFBFBD>Ĵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
.macro doAIY
.set _type, _ABS
    ldrb addy, [m6502_pc], #1
    ldrb r0, [m6502_pc], #1
    orr addy, addy, r0, lsl #8
    add addy, addy, m6502_y, lsr #24
.endm

// <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ѱַ
.macro doIMM
.set _type, _IMM
.endm

// X<EFBFBD>Ĵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ѱַ
.macro doIIX
.set _type, _ABS
    ldrb r0, [m6502_pc], #1
    add r0, m6502_x, r0, lsl #24
    lsr addy, r0, #24
    ldrb addy, [cpu_zpage, addy]
    add r0, r0, #0x01000000
    lsr r1, r0, #24
    ldrb r1, [cpu_zpage, r1]
    orr addy, addy, r1, lsl #8
.endm

// Y<EFBFBD>Ĵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ѱַ
.macro doIIY
.set _type, _ABS
    ldrb r0, [m6502_pc], #1
    ldrb addy, [r0,cpu_zpage]
    add r0, r0, cpu_zpage
    ldrb r1, [r0, #1]
    orr addy, addy, r1, lsl #8
    add addy, addy, m6502_y, lsr #24
.endm

// <EFBFBD><EFBFBD>ҳ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ѱַ
.macro doZPI
.set _type, _ABS
    ldrb r0, [m6502_pc], #1
    ldrb addy, [r0,cpu_zpage]
    add r0, r0, cpu_zpage
    ldrb r1, [r0, #1]
    orr addy, addy, r1, lsl #8
.endm

// <EFBFBD><EFBFBD>ҳѰַ
.macro doZ
.set _type, _ZP
    ldrb addy, [m6502_pc], #1
.endm

// <EFBFBD><EFBFBD>ҳ˫<EFBFBD>ֽ<EFBFBD>Ѱַ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> bbr/bbs<EFBFBD><EFBFBD>
.macro doZ2
.set _type, _ZP
    ldrb addy, [m6502_pc], #2
.endm

// <EFBFBD><EFBFBD>ҳX<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
.macro doZIX
.set _type, _ZP
    ldrb addy, [m6502_pc], #1
    add addy, addy, m6502_x, lsr #24
    and addy, addy, #0xff
.endm

// <EFBFBD><EFBFBD>ҳX<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƣ<EFBFBD>
.macro doZIXf
.set _type, _ZPI
    ldrb addy, [m6502_pc], #1
    add addy, m6502_x, addy, lsl #24
.endm

// <EFBFBD><EFBFBD>ҳY<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
.macro doZIY
.set _type, _ZP
    ldrb addy, [m6502_pc], #1
    add addy, addy, m6502_y, lsr #24
    and addy, addy, #0xff
.endm

// <EFBFBD><EFBFBD>ҳY<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƣ<EFBFBD>
.macro doZIYf
.set _type, _ZPI
    ldrb addy, [m6502_pc], #1
    add addy, m6502_y, addy, lsl #24
.endm

// ADC <EFBFBD><EFBFBD><EFBFBD><EFBFBD>
.macro opADC
    readmem
    movs r1, cycles, lsr #1

    IT CS
    subcs r0, r0, #0x00000100
    adcs m6502_a, m6502_a, r0, ror #8

    mov m6502_nz, m6502_a, asr #24
    orr cycles, cycles, #CYC_C+CYC_V

    IT VC
    bicvc cycles, cycles, #CYC_V
.endm

// AND <EFBFBD><EFBFBD><EFBFBD><EFBFBD>
.macro opAND
    readmem
    and m6502_a, m6502_a, r0, lsl #24
    mov m6502_nz, m6502_a, asr #24
.endm

// ASL <EFBFBD><EFBFBD><EFBFBD><EFBFBD>
.macro opASL
    readmem
    add r0, r0, r0
    orrs m6502_nz, r0, r0, lsl #24
    orr cycles, cycles, #CYC_C
    writemem
.endm

// BIT <EFBFBD><EFBFBD><EFBFBD><EFBFBD>
.macro opBIT
    readmem
    bic cycles, cycles, #CYC_V
    tst r0, #V

    IT NE
    orrne cycles, cycles, #CYC_V

    and m6502_nz, r0, m6502_a, lsr #24
    orr m6502_nz, m6502_nz, r0, lsl #24
.endm

// <EFBFBD>Ƚϲ<EFBFBD><EFBFBD><EFBFBD>
.macro opCOMP x
    readmem
    subs m6502_nz, \x, r0, lsl #24
    mov m6502_nz, m6502_nz, asr #24
    orr cycles, cycles, #CYC_C
.endm

// <EFBFBD><EFBFBD>һ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
.macro opDEC
    readmem
    sub r0, r0, #1
    orr m6502_nz, r0, r0, lsl #24
    writemem
.endm

// <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
.macro opEOR
    readmem
    eor m6502_a, m6502_a, r0, lsl #24
    mov m6502_nz, m6502_a, asr #24
.endm

// <EFBFBD><EFBFBD>һ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
.macro opINC
    readmem
    add r0, r0, #1
    orr m6502_nz, r0, r0, lsl #24
    writemem
.endm

// <EFBFBD><EFBFBD><EFBFBD>ز<EFBFBD><EFBFBD><EFBFBD>
.macro opLOAD x
    readmems
    mov \x, m6502_nz, lsl #24
.endm

// <EFBFBD>߼<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
.macro opLSR
    .if _type == _ABS
        readmemabs
        movs r0, r0, lsr #1
        orr cycles, cycles, #CYC_C
        mov m6502_nz, r0
        writememabs
    .elseif _type == _ZP
        ldrb m6502_nz, [cpu_zpage, addy]
        movs m6502_nz, m6502_nz, lsr #1
        orr cycles, cycles, #CYC_C
        strb m6502_nz, [cpu_zpage, addy]
    .elseif _type == _ZPI
        lsr m6502_nz, addy, #24
        ldrb m6502_nz, [cpu_zpage, m6502_nz]
        movs m6502_nz, m6502_nz, lsr #1
        orr cycles, cycles, #CYC_C
        lsr r1, addy, #24
        strb m6502_nz, [cpu_zpage, r1]
    .endif
.endm

// OR <EFBFBD><EFBFBD><EFBFBD><EFBFBD>
.macro opORA
    readmem
    orr m6502_a, m6502_a, r0, lsl #24
    mov m6502_nz, m6502_a, asr #24
.endm

// ѭ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
.macro opROL
    readmem
    movs cycles, cycles, lsr #1
    adc r0, r0, r0
    orrs m6502_nz, r0, r0, lsl #24
    adc cycles, cycles, cycles
    writemem
.endm

// ѭ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
.macro opROR
    readmem
    movs cycles, cycles, lsr #1

    IT CS
    orrcs r0, r0, #0x100

    movs r0, r0, lsr #1
    orr m6502_nz, r0, r0, lsl #24
    adc cycles, cycles, cycles
    writemem
.endm

// <EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
.macro opSBC
    readmem
    movs r1, cycles, lsr #1
    sbcs m6502_a, m6502_a, r0, lsl #24
    and m6502_a, m6502_a, #0xff000000
    mov m6502_nz, m6502_a, asr #24
    orr cycles, cycles, #CYC_C+CYC_V

    IT VC
    bicvc cycles, cycles, #CYC_V
.endm


.macro opSTORE x
    mov r0, \x, lsr #24
    writemem
.endm

@ .global main
@ .type main, %function
@ mian:
@     encodePC
@     encodeP (B+R)
@     encodeP (R)
@     decodeP
@     fetch 10
@     fetch_c 10

@     clearcycles
@     readmemabs
@     readmemzp
@     readmemzpi
@     readmemzps
@     readmemimm
@     readmemimms
@     readmem
@     readmems
@     writememabs
@     writememzp
@     writememzpi
@     writemem
@     push16
@     push8 r0
@     pop16
@     pop8 r0
@     doABS
@     doAIX
@     doAIY
@     doIMM
@     doIIX
@     doIIY
@     doZPI
@     doZ
@     doZ2
@     doZIX
@     doZIXf
@     doZIY
@     doZIYf
@     opADC
@     opAND
@     opASL
@     opBIT
@     opCOMP r5
@     opDEC
@     opEOR
@     opINC
@     opLOAD r5
@     opLSR
@     opORA
@     opROL
@     opROR
@     opSBC
@     opSTORE r5