player/Project/Src/Drive/Source/24l01.c

#include "24l01.h"
#include "stdio.h"
#include "stdlib.h"
#include "stm32f4xx.h"
#include "string.h"

#ifndef BOOTLOADER
#include "rthw.h"
#define IRQ_DISABLE() rt_enter_critical()
#define IRQ_ENABLE() rt_exit_critical()
#else
#define IRQ_DISABLE()
#define IRQ_ENABLE()
#endif

/*

+--------------------------+
|GND  |3V3  |              |
|-----------|              |
|CE   |CS   |              |
|-----------|              |
|SCK  |MOSI |              |
|-----------|              |
|MISO |INT  |              |
+--------------------------+


+--------------------------+
|GND  |3V3  |              |
|-----------|              |
|PE3  |PE4  |              |
|-----------|              |
|PE2  |PE6  |              |
|-----------|              |
|PE5  |PB6  |              |
+--------------------------+

*/

// <20>ӿں<D3BF><DABA><EFBFBD>
static void nrf24l01_dalay_us(int us) {
#ifndef BOOTLOADER
  rt_hw_us_delay(us);
#else
  for (int i = 0; i < 30; i++)
    ;
#endif
}

static uint32_t nrf24l01_det_random(void) {
  static int d = 0;
  d++;
  return d;
}

// 24L01Ƭѡ<C6AC>ź<EFBFBD> PE3
#define NRF24L01_CE(s) GPIO_WriteBit(GPIOE, GPIO_Pin_3, (BitAction)s)

// SPIƬѡ<C6AC>ź<EFBFBD>	PE4
#define NRF24L01_CSN(s) GPIO_WriteBit(GPIOE, GPIO_Pin_4, (BitAction)s)

// IRQ<52><51><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>    PB6
#define NRF24L01_IRQ() GPIO_ReadInputDataBit(GPIOB, GPIO_Pin_6)

typedef struct {
  // <20><><EFBFBD>жϷ<D0B6><CFB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
  void (*irq)(void);

  // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɻص<C9BB>
  void (*send_end_cb)(void *);
  void *send_end_cb_par;

  // <20><><EFBFBD>յ<EFBFBD><D5B5><EFBFBD><EFBFBD>ݻص<DDBB>
  void (*recved_cb)(void *);
  void *recved_cb_par;

} nrf_struct;

static nrf_struct g_nrf = {0};

static const uint8_t TX_ADDRESS[TX_ADR_WIDTH] = {
    0x34, 0x43, 0x10, 0x10, 0x01
}; // <20><><EFBFBD>͵<EFBFBD>ַ
static const uint8_t RX_ADDRESS[RX_ADR_WIDTH] = {
    0x34, 0x43, 0x10, 0x10, 0x01
}; // <20><><EFBFBD>͵<EFBFBD>ַ

void nrf24l01_spi_init(void) {
  GPIO_InitTypeDef GPIO_InitStructure;
  SPI_InitTypeDef SPI_InitStructure;
  RCC_APB2PeriphClockCmd(RCC_APB2Periph_SPI4, ENABLE);

  RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOE, ENABLE);

  GPIO_PinAFConfig(GPIOE, GPIO_PinSource2, GPIO_AF_SPI4);
  GPIO_PinAFConfig(GPIOE, GPIO_PinSource5, GPIO_AF_SPI4);
  GPIO_PinAFConfig(GPIOE, GPIO_PinSource6, GPIO_AF_SPI4);

  GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
  GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
  GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
  GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_DOWN;

  /*!< SPI SCK pin configuration */
  GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2;
  GPIO_Init(GPIOE, &GPIO_InitStructure);

  /*!< SPI MOSI pin configuration */
  GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5;
  GPIO_Init(GPIOE, &GPIO_InitStructure);

  /*!< SPI MISO pin configuration */
  GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6;
  GPIO_Init(GPIOE, &GPIO_InitStructure);

  /*!< Configure sFLASH Card CS pin in output pushpull mode
   * ********************/
  GPIO_InitStructure.GPIO_Pin = GPIO_Pin_4;
  GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT;
  GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
  GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
  GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
  GPIO_Init(GPIOE, &GPIO_InitStructure);

  // ʧ<><CAA7>SPI<50><49><EFBFBD><EFBFBD>
  SPI_Cmd(SPI4, DISABLE);

  // <20><><EFBFBD><EFBFBD>SPI<50><49><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˫<EFBFBD><CBAB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ:SPI<50><49><EFBFBD><EFBFBD>Ϊ˫<CEAA><CBAB>˫<EFBFBD><CBAB>ȫ˫<C8AB><CBAB>
  SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex;

  // <20><><EFBFBD><EFBFBD>SPI<50><49><EFBFBD><EFBFBD>ģʽ:<3A><><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA>SPI
  SPI_InitStructure.SPI_Mode = SPI_Mode_Master;

  // <20><><EFBFBD><EFBFBD>SPI<50><49><EFBFBD><EFBFBD><EFBFBD>ݴ<EFBFBD>С:SPI<50><49><EFBFBD>ͽ<EFBFBD><CDBD><EFBFBD>8λ֡<CEBB>ṹ
  SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b;

  // <20><><EFBFBD><EFBFBD>ͬ<EFBFBD><CDAC>ʱ<EFBFBD>ӵĿ<D3B5><C4BF><EFBFBD>״̬Ϊ<CCAC>͵<EFBFBD>ƽ
  SPI_InitStructure.SPI_CPOL = SPI_CPOL_Low;

  // <20><><EFBFBD><EFBFBD>ͬ<EFBFBD><CDAC>ʱ<EFBFBD>ӵĵ<D3B5>1<EFBFBD><31><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>أ<EFBFBD><D8A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>½<EFBFBD><C2BD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD><EFBFBD><EFBFBD>
  SPI_InitStructure.SPI_CPHA = SPI_CPHA_1Edge;

  // NSS<53>ź<EFBFBD><C5BA><EFBFBD>Ӳ<EFBFBD><D3B2><EFBFBD><EFBFBD>NSS<53>ܽţ<DCBD><C5A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>SSIλ<49><CEBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:<3A>ڲ<EFBFBD>NSS<53>ź<EFBFBD><C5BA><EFBFBD>SSIλ<49><CEBB><EFBFBD><EFBFBD>
  SPI_InitStructure.SPI_NSS = SPI_NSS_Soft;

  // <20><><EFBFBD>岨<EFBFBD><E5B2A8><EFBFBD><EFBFBD>Ԥ<EFBFBD><D4A4>Ƶ<EFBFBD><C6B5>ֵ:<3A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ԥ<EFBFBD><D4A4>ƵֵΪ256
  SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_16;

  // ָ<><D6B8><EFBFBD><EFBFBD><EFBFBD>ݴ<EFBFBD><DDB4><EFBFBD><EFBFBD><EFBFBD>MSBλ<42><CEBB><EFBFBD><EFBFBD>LSBλ<42><CEBB>ʼ:<3A><><EFBFBD>ݴ<EFBFBD><DDB4><EFBFBD><EFBFBD><EFBFBD>MSBλ<42><CEBB>ʼ
  SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;

  // CRCֵ<43><D6B5><EFBFBD><EFBFBD><EFBFBD>Ķ<EFBFBD><C4B6><EFBFBD>ʽ
  SPI_InitStructure.SPI_CRCPolynomial = 7;

  // <20><><EFBFBD><EFBFBD>SPI_InitStruct<63><74>ָ<EFBFBD><D6B8><EFBFBD>IJ<EFBFBD><C4B2><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>SPIx<49>Ĵ<EFBFBD><C4B4><EFBFBD>
  SPI_Init(SPI4, &SPI_InitStructure);

  // ʹ<><CAB9>SPI<50><49><EFBFBD><EFBFBD>
  SPI_Cmd(SPI4, ENABLE);
}

// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD>Ĭ<EFBFBD>Ͻ<EFBFBD><CFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ
void nrf24l01_sort_init(void);

// <20><>ʼ<EFBFBD><CABC>24L01<30><31>IO<49><4F>
void nrf24l01_init(void) {
  GPIO_InitTypeDef GPIO_InitStructure;

  RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOB | RCC_AHB1Periph_GPIOE,
                         ENABLE); // ʹ<><CAB9>GPIOB,Gʱ<47><CAB1>
  RCC_APB2PeriphClockCmd(RCC_APB2Periph_EXTIT, ENABLE);
  RCC_APB2PeriphClockCmd(RCC_APB2Periph_SYSCFG, ENABLE); // ʹ<><CAB9>SYSCFGʱ<47><CAB1>
  // GE3 Ƭѡ<C6AC><D1A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
  GPIO_InitStructure.GPIO_Pin = GPIO_Pin_3;
  GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT;      // <20><>ͨ<EFBFBD><CDA8><EFBFBD><EFBFBD>ģʽ
  GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;     // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
  GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz; // 100MHz
  GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;       // <20><><EFBFBD><EFBFBD>
  GPIO_Init(GPIOE, &GPIO_InitStructure);

  // GB6 <20>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD>
  GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6;
  GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN; // <20><><EFBFBD><EFBFBD>
  GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP; // <20><><EFBFBD><EFBFBD>
  GPIO_Init(GPIOB, &GPIO_InitStructure);

  EXTI_InitTypeDef EXTI_InitStruct = {0};

  SYSCFG_EXTILineConfig(EXTI_PortSourceGPIOB, EXTI_PinSource6);

  EXTI_InitStruct.EXTI_Line = EXTI_Line6;
  EXTI_InitStruct.EXTI_Mode = EXTI_Mode_Interrupt;
  EXTI_InitStruct.EXTI_Trigger = EXTI_Trigger_Falling;
  EXTI_InitStruct.EXTI_LineCmd = ENABLE;
  EXTI_Init(&EXTI_InitStruct);

  NVIC_InitTypeDef NVIC_InitStructure;
  NVIC_InitStructure.NVIC_IRQChannel = EXTI9_5_IRQn;
  NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 3;
  NVIC_InitStructure.NVIC_IRQChannelSubPriority = 3;
  NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
  NVIC_Init(&NVIC_InitStructure);

  // <20><><EFBFBD><EFBFBD>NRF<52><46><EFBFBD>ص<EFBFBD><D8B5><EFBFBD>ʼ<EFBFBD><CABC>SPI<50><49><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
  nrf24l01_spi_init();

  NRF24L01_CE(0);  // ʹ<><CAB9>24L01
  NRF24L01_CSN(1); // SPIƬѡȡ<D1A1><C8A1>

  nrf24l01_sort_init();
}

// ȥ<><C8A5>ʼ<EFBFBD><CABC>
void nrf24l01_deinit(void) {

  EXTI_InitTypeDef EXTI_InitStruct = {0};
  EXTI_InitStruct.EXTI_Line = EXTI_Line6;
  EXTI_InitStruct.EXTI_Mode = EXTI_Mode_Interrupt;
  EXTI_InitStruct.EXTI_Trigger = EXTI_Trigger_Falling;
  EXTI_InitStruct.EXTI_LineCmd = DISABLE;
  EXTI_Init(&EXTI_InitStruct);

  NRF24L01_CE(0);
}

void EXTI9_5_IRQHandler(void) {
  if (EXTI_GetITStatus(EXTI_Line6) == SET) {
    EXTI_ClearITPendingBit(EXTI_Line6);
    if (g_nrf.irq)
      g_nrf.irq();
  }
}

uint8_t spi_read_write_byte(uint8_t txdata) {
  // <20>ȴ<EFBFBD><C8B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
  while (SPI_I2S_GetFlagStatus(SPI4, SPI_I2S_FLAG_TXE) == RESET) {
  }

  // ͨ<><CDA8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>SPIx<49><78><EFBFBD><EFBFBD>һ<EFBFBD><D2BB>byte  <20><><EFBFBD><EFBFBD>
  SPI_I2S_SendData(SPI4, txdata);

  // <20>ȴ<EFBFBD><C8B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><D2BB>byte
  while (SPI_I2S_GetFlagStatus(SPI4, SPI_I2S_FLAG_RXNE) == RESET) {
  }

  // <20><><EFBFBD><EFBFBD>ͨ<EFBFBD><CDA8>SPIx<49><78><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>յ<EFBFBD><D5B5><EFBFBD><EFBFBD><EFBFBD>
  return SPI_I2S_ReceiveData(SPI4);
}

// SPIд<49>Ĵ<EFBFBD><C4B4><EFBFBD>
// reg:ָ<><D6B8><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD>ַ
// value:д<><D0B4><EFBFBD><EFBFBD>ֵ
uint8_t nrf24l01_write_reg(uint8_t reg, uint8_t value) {
  uint8_t status;
  NRF24L01_CSN(0);                   // ʹ<><CAB9>SPI<50><49><EFBFBD><EFBFBD>
  status = spi_read_write_byte(reg); // <20><><EFBFBD>ͼĴ<CDBC><C4B4><EFBFBD><EFBFBD><EFBFBD>
  spi_read_write_byte(value);        // д<><D0B4><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD>ֵ
  NRF24L01_CSN(1);                   // <20><>ֹSPI<50><49><EFBFBD><EFBFBD>
  return (status);                   // <20><><EFBFBD><EFBFBD>״ֵ̬
}

// <20><>ȡSPI<50>Ĵ<EFBFBD><C4B4><EFBFBD>ֵ
// reg:Ҫ<><D2AA><EFBFBD>ļĴ<C4BC><C4B4><EFBFBD>
uint8_t nrf24l01_read_reg(uint8_t reg) {
  uint8_t reg_val;
  NRF24L01_CSN(0);                     // ʹ<><CAB9>SPI<50><49><EFBFBD><EFBFBD>
  spi_read_write_byte(reg);            // <20><><EFBFBD>ͼĴ<CDBC><C4B4><EFBFBD><EFBFBD><EFBFBD>
  reg_val = spi_read_write_byte(0XFF); // <20><>ȡ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
  NRF24L01_CSN(1);                     // <20><>ֹSPI<50><49><EFBFBD><EFBFBD>
  return (reg_val);                    // <20><><EFBFBD><EFBFBD>״ֵ̬
}

// <20><>ָ<EFBFBD><D6B8>λ<EFBFBD>ö<EFBFBD><C3B6><EFBFBD>ָ<EFBFBD><D6B8><EFBFBD><EFBFBD><EFBFBD>ȵ<EFBFBD><C8B5><EFBFBD><EFBFBD><EFBFBD>
// reg:<3A>Ĵ<EFBFBD><C4B4><EFBFBD>(λ<><CEBB>)
//*pBuf:<3A><><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>
// len:<3A><><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
// <20><><EFBFBD><EFBFBD>ֵ,<2C>˴ζ<CBB4><CEB6><EFBFBD><EFBFBD><EFBFBD>״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD>ֵ
uint8_t nrf24l01_read_buf(uint8_t reg, uint8_t *pBuf, uint8_t len) {
  uint8_t status, u8_ctr;
  NRF24L01_CSN(0);                   // ʹ<><CAB9>SPI<50><49><EFBFBD><EFBFBD>
  status = spi_read_write_byte(reg); // <20><><EFBFBD>ͼĴ<CDBC><C4B4><EFBFBD>ֵ(λ<><CEBB>),<2C><><EFBFBD><EFBFBD>ȡ״ֵ̬
  for (u8_ctr = 0; u8_ctr < len; u8_ctr++)
    pBuf[u8_ctr] = spi_read_write_byte(0XFF); // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
  NRF24L01_CSN(1);                            // <20>ر<EFBFBD>SPI<50><49><EFBFBD><EFBFBD>
  return status;                              // <20><><EFBFBD>ض<EFBFBD><D8B6><EFBFBD><EFBFBD><EFBFBD>״ֵ̬
}

// <20><>ָ<EFBFBD><D6B8>λ<EFBFBD><CEBB>дָ<D0B4><D6B8><EFBFBD><EFBFBD><EFBFBD>ȵ<EFBFBD><C8B5><EFBFBD><EFBFBD><EFBFBD>
// reg:<3A>Ĵ<EFBFBD><C4B4><EFBFBD>(λ<><CEBB>)
//*pBuf:<3A><><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>
// len:<3A><><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
// <20><><EFBFBD><EFBFBD>ֵ,<2C>˴ζ<CBB4><CEB6><EFBFBD><EFBFBD><EFBFBD>״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD>ֵ
uint8_t nrf24l01_write_buf(uint8_t reg, uint8_t *pBuf, uint8_t len) {
  uint8_t status, u8_ctr;
  NRF24L01_CSN(0);                   // ʹ<><CAB9>SPI<50><49><EFBFBD><EFBFBD>
  status = spi_read_write_byte(reg); // <20><><EFBFBD>ͼĴ<CDBC><C4B4><EFBFBD>ֵ(λ<><CEBB>),<2C><><EFBFBD><EFBFBD>ȡ״ֵ̬
  for (u8_ctr = 0; u8_ctr < len; u8_ctr++)
    spi_read_write_byte(*pBuf++); // д<><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
  NRF24L01_CSN(1);                // <20>ر<EFBFBD>SPI<50><49><EFBFBD><EFBFBD>
  return status;                  // <20><><EFBFBD>ض<EFBFBD><D8B6><EFBFBD><EFBFBD><EFBFBD>״ֵ̬
}

// <20><><EFBFBD><EFBFBD>24L01<30>Ƿ<EFBFBD><C7B7><EFBFBD><EFBFBD><EFBFBD>
// <20><><EFBFBD><EFBFBD>ֵ:0<><30><EFBFBD>ɹ<EFBFBD>;1<><31>ʧ<EFBFBD><CAA7>
uint8_t nrf24l01_check(void) {
  uint8_t i;
  uint8_t old[5];
  nrf24l01_read_buf(TX_ADDR, old, 5);

  uint8_t buf[5] = {0XA5, 0XA5, 0XA5, 0XA5, 0XA5};
  nrf24l01_write_buf(NRF_WRITE_REG + TX_ADDR, buf, 5); // д<><D0B4>5<EFBFBD><35><EFBFBD>ֽڵĵ<DAB5>ַ.
  nrf24l01_read_buf(TX_ADDR, buf, 5);                  // <20><><EFBFBD><EFBFBD>д<EFBFBD><D0B4><EFBFBD>ĵ<EFBFBD>ַ
  for (i = 0; i < 5; i++)
    if (buf[i] != 0XA5)
      break;
  if (i != 5)
    return 1; // <20><><EFBFBD><EFBFBD>24L01<30><31><EFBFBD><EFBFBD>

  nrf24l01_write_buf(NRF_WRITE_REG + TX_ADDR, old, 5); // д<><D0B4>5<EFBFBD><35><EFBFBD>ֽڵĵ<DAB5>ַ.
  return 0;                                            // <20><><EFBFBD>⵽24L01
}

// <20><><EFBFBD>õ<EFBFBD>ַ<EFBFBD><D6B7><EFBFBD>ҵģ<D2B5><C4A3>Է<EFBFBD><D4B7><EFBFBD>
void nrf24l01_set_addr(uint8_t my[5], uint8_t dst[5]) {
  // дTX<54>ڵ<EFBFBD><DAB5><EFBFBD>ַ
  nrf24l01_write_buf(NRF_WRITE_REG + TX_ADDR, (uint8_t *)dst, TX_ADR_WIDTH);

  // <20><><EFBFBD><EFBFBD>RX<52>ڵ<EFBFBD><DAB5><EFBFBD>ַ,<2C><>ҪΪ<D2AA><CEAA>ʹ<EFBFBD><CAB9>ACK
  nrf24l01_write_buf(NRF_WRITE_REG + RX_ADDR_P0, (uint8_t *)my, RX_ADR_WIDTH);
}

// <20><><EFBFBD><EFBFBD>ͨ<EFBFBD><CDA8><EFBFBD>ŵ<EFBFBD>
void nrf24l01_set_chan(uint8_t chan) {
  // <20><><EFBFBD><EFBFBD>RFͨ<46><CDA8>Ϊchan
  nrf24l01_write_reg(NRF_WRITE_REG + RF_CH, chan & 0x3f);
}

// <20><><EFBFBD>ý<EFBFBD><C3BD>յ<EFBFBD><D5B5><EFBFBD><EFBFBD>ݵĻص<C4BB><D8B5><EFBFBD><EFBFBD><EFBFBD>
void nrf24l01_set_recv_cb(void (*fun)(void *t), void *t) {
  g_nrf.recved_cb = fun;
  g_nrf.recved_cb_par = t;
}

// <20><><EFBFBD>÷<EFBFBD><C3B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɵĻص<C4BB><D8B5><EFBFBD><EFBFBD><EFBFBD>
void nrf24l01_set_send_cb(void (*fun)(void *t), void *t) {
  g_nrf.send_end_cb = fun;
  g_nrf.send_end_cb_par = t;
}

// <20><><EFBFBD>ò<EFBFBD><C3B2><EFBFBD><EFBFBD>ж<EFBFBD>ʱ<EFBFBD>Ļص<C4BB><D8B5><EFBFBD><EFBFBD><EFBFBD>
void nrf24l01_set_irq_cb(void (*fun)(void)) { g_nrf.irq = fun; }

// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD>Ĭ<EFBFBD>Ͻ<EFBFBD><CFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ
void nrf24l01_sort_init(void) {

  g_nrf.irq = nrf24l01_irq;

  NRF24L01_CE(0);

  // дTX<54>ڵ<EFBFBD><DAB5><EFBFBD>ַ
  nrf24l01_write_buf(NRF_WRITE_REG + TX_ADDR, (uint8_t *)TX_ADDRESS,
                     TX_ADR_WIDTH);

  // <20><><EFBFBD><EFBFBD>RX<52>ڵ<EFBFBD><DAB5><EFBFBD>ַ,<2C><>ҪΪ<D2AA><CEAA>ʹ<EFBFBD><CAB9>ACK
  nrf24l01_write_buf(NRF_WRITE_REG + RX_ADDR_P0, (uint8_t *)RX_ADDRESS,
                     RX_ADR_WIDTH);

  // <20><>ֹ<EFBFBD>Զ<EFBFBD>Ӧ<EFBFBD><D3A6>
  nrf24l01_write_reg(NRF_WRITE_REG + EN_AA, 0x00);

  // ʹ<><CAB9>ͨ<EFBFBD><CDA8>0<EFBFBD>Ľ<EFBFBD><C4BD>յ<EFBFBD>ַ
  nrf24l01_write_reg(NRF_WRITE_REG + EN_RXADDR, 0x01);

  // ѡ<><D1A1>ͨ<EFBFBD><CDA8>0<EFBFBD><30><EFBFBD><EFBFBD>Ч<EFBFBD><D0A7><EFBFBD>ݿ<EFBFBD><DDBF><EFBFBD>
  nrf24l01_write_reg(NRF_WRITE_REG + RX_PW_P0, RX_PLOAD_WIDTH);

  // <20><>ֹ<EFBFBD>Զ<EFBFBD><D4B6>ط<EFBFBD>
  nrf24l01_write_reg(NRF_WRITE_REG + SETUP_RETR, 0x0);

  // <20><><EFBFBD><EFBFBD>RFͨ<46><CDA8>Ϊ40
  nrf24l01_write_reg(NRF_WRITE_REG + RF_CH, 40);

  // <20><><EFBFBD><EFBFBD>TX<54><58><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>,0db<64><62><EFBFBD><EFBFBD>,2Mbps,<2C><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>濪<EFBFBD><E6BFAA>
  nrf24l01_write_reg(NRF_WRITE_REG + RF_SETUP, 0x0f);

  // <20><><EFBFBD><EFBFBD>ģʽ<C4A3><CABD>0xf;<3B><><EFBFBD><EFBFBD>ģʽ0xe<78><65><EFBFBD><EFBFBD><EFBFBD><EFBFBD>crc16
  nrf24l01_write_reg(NRF_WRITE_REG + CONFIG, 0x0f);

  uint8_t sta = 0;
  sta = nrf24l01_read_reg(STATUS);

  // <20><><EFBFBD><EFBFBD>TX_DS<44><53>MAX_RT<52>жϱ<D0B6>־
  nrf24l01_write_reg(NRF_WRITE_REG + STATUS, sta);

  // <20><><EFBFBD><EFBFBD>rxfifo<66><6F><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݣ<EFBFBD><DDA3>򲻻<EFBFBD><F2B2BBBB>ٲ<EFBFBD><D9B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>жϣ<D0B6><CFA3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>RX FIFO<46>Ĵ<EFBFBD><C4B4><EFBFBD>
  nrf24l01_write_reg(FLUSH_RX, 0xff);

  // CEΪ<45><CEAA>
  NRF24L01_CE(1);
}

// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
// data<74><61>Ҫ<EFBFBD><D2AA><EFBFBD>͵<EFBFBD><CDB5><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>
// len<65><6E><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3>ȣ<EFBFBD><C8A3><EFBFBD><EFBFBD>ܳ<EFBFBD><DCB3><EFBFBD>32<33>ֽ<EFBFBD>
int nrf24l01_send(void *data) {

  NRF24L01_CE(0);
  // <20><><EFBFBD><EFBFBD>ģʽ<C4A3><CABD>0xf;<3B><><EFBFBD><EFBFBD>ģʽ0xe<78><65><EFBFBD><EFBFBD><EFBFBD><EFBFBD>crc16
  nrf24l01_write_reg(NRF_WRITE_REG + CONFIG, 0x0e);
  // д<><D0B4><EFBFBD>ݵ<EFBFBD>TX BUF  32<33><32><EFBFBD>ֽ<EFBFBD>
  nrf24l01_write_buf(WR_TX_PLOAD, data, TX_PLOAD_WIDTH);

  NRF24L01_CE(1);
  return 0;
}

// <20><>ȡ<EFBFBD><C8A1><EFBFBD>յ<EFBFBD><D5B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> ,<2C><><EFBFBD><EFBFBD>0<EFBFBD>ɹ<EFBFBD>
// buf<75><66><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݻ<EFBFBD><DDBB><EFBFBD>
int nrf24l01_read(void *buf) {
  nrf24l01_read_buf(RD_RX_PLOAD, buf, RX_PLOAD_WIDTH); // <20><>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD>
  return 0;
}

// nrf<72><66><EFBFBD>жϷ<D0B6><CFB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
void nrf24l01_irq(void) {
  uint8_t sta = 0;
  sta = nrf24l01_read_reg(STATUS); // <20><>ȡ״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD>ֵ
  nrf24l01_write_reg(NRF_WRITE_REG + STATUS, sta); // <20><><EFBFBD><EFBFBD>TX_DS<44><53>MAX_RT<52>жϱ<D0B6>־
  if (sta & TX_OK) // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
  {
    // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>֮<EFBFBD><D6AE><EFBFBD>Զ<EFBFBD><D4B6>л<EFBFBD>Ϊ<EFBFBD><CEAA><EFBFBD><EFBFBD>ģʽ
    NRF24L01_CE(0);
    nrf24l01_write_reg(NRF_WRITE_REG + CONFIG, 0x0f);
    NRF24L01_CE(1);
    if (g_nrf.send_end_cb)
      g_nrf.send_end_cb(g_nrf.send_end_cb_par);
  } else if (sta & RX_OK) {
    if (g_nrf.recved_cb)
      g_nrf.recved_cb(g_nrf.recved_cb_par);
    // <20><>ȡ֮<C8A1><D6AE><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>RX FIFO<46>Ĵ<EFBFBD><C4B4><EFBFBD>
    nrf24l01_write_reg(FLUSH_RX, 0xff);
  }
}