96 lines
2.1 KiB
ArmAsm
96 lines
2.1 KiB
ArmAsm
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/*
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* Copyright (c) 2006-2018, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2006-09-06 XuXinming first version
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*/
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/*!
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* \addtogroup S3C24X0
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*/
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/*@{*/
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#define NOINT 0xc0
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/*
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* rt_base_t rt_hw_interrupt_disable();
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*/
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.globl rt_hw_interrupt_disable
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rt_hw_interrupt_disable:
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mrs r0, cpsr
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orr r1, r0, #NOINT
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msr cpsr_c, r1
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mov pc, lr
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/*
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* void rt_hw_interrupt_enable(rt_base_t level);
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*/
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.globl rt_hw_interrupt_enable
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rt_hw_interrupt_enable:
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msr cpsr, r0
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mov pc, lr
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/*
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* void rt_hw_context_switch(rt_uint32 from, rt_uint32 to);
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* r0 --> from
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* r1 --> to
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*/
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.globl rt_hw_context_switch
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rt_hw_context_switch:
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stmfd sp!, {lr} @ push pc (lr should be pushed in place of PC)
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stmfd sp!, {r0-r12, lr} @ push lr & register file
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mrs r4, cpsr
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stmfd sp!, {r4} @ push cpsr
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mrs r4, spsr
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stmfd sp!, {r4} @ push spsr
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str sp, [r0] @ store sp in preempted tasks TCB
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ldr sp, [r1] @ get new task stack pointer
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ldmfd sp!, {r4} @ pop new task spsr
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msr spsr_cxsf, r4
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ldmfd sp!, {r4} @ pop new task cpsr
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msr spsr_cxsf, r4
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ldmfd sp!, {r0-r12, lr, pc}^ @ pop new task r0-r12, lr & pc
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/*
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* void rt_hw_context_switch_to(rt_uint32 to);
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* r0 --> to
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*/
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.globl rt_hw_context_switch_to
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rt_hw_context_switch_to:
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ldr sp, [r0] @ get new task stack pointer
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ldmfd sp!, {r4} @ pop new task spsr
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msr spsr_cxsf, r4
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ldmfd sp!, {r4} @ pop new task cpsr
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msr cpsr_cxsf, r4
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ldmfd sp!, {r0-r12, lr, pc} @ pop new task r0-r12, lr & pc
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/*
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* void rt_hw_context_switch_interrupt(rt_uint32 from, rt_uint32 to);
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*/
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.globl rt_thread_switch_interrupt_flag
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.globl rt_interrupt_from_thread
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.globl rt_interrupt_to_thread
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.globl rt_hw_context_switch_interrupt
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rt_hw_context_switch_interrupt:
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ldr r2, =rt_thread_switch_interrupt_flag
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ldr r3, [r2]
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cmp r3, #1
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beq _reswitch
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mov r3, #1 @ set rt_thread_switch_interrupt_flag to 1
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str r3, [r2]
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ldr r2, =rt_interrupt_from_thread @ set rt_interrupt_from_thread
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str r0, [r2]
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_reswitch:
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ldr r2, =rt_interrupt_to_thread @ set rt_interrupt_to_thread
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str r1, [r2]
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mov pc, lr
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