2025-06-27 00:32:57 +08:00
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#include "24l01.h"
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#include "string.h"
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#include "stdlib.h"
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#include "stdio.h"
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#ifndef BOOTLOADER
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#include "rthw.h"
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#define IRQ_DISABLE() rt_enter_critical()
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#define IRQ_ENABLE() rt_exit_critical()
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#else
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#define IRQ_DISABLE() { }
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#define IRQ_ENABLE() { }
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#endif
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/*
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+--------------------------+
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|GND |3V3 | |
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|-----------| |
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|CE |CS | |
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|-----------| |
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|SCK |MOSI | |
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|-----------| |
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|MISO |INT | |
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+--------------------------+
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+--------------------------+
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|GND |3V3 | |
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|-----------| |
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|PE3 |PE4 | |
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|-----------| |
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|PE2 |PE6 | |
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|-----------| |
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|PE5 |PB6 | |
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+--------------------------+
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*/
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2025-07-05 19:47:28 +08:00
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// <20>ӿں<D3BF><DABA><EFBFBD>
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2025-06-27 00:32:57 +08:00
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static void nrf24l01_dalay_us(int us)
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{
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#ifndef BOOTLOADER
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rt_hw_us_delay(us);
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#else
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for(int i=0;i<30;i++);
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#endif
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}
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static u32 nrf24l01_det_random(void)
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{
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static int d=0;
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d++;
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return d;
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}
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2025-07-05 19:47:28 +08:00
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// 24L01Ƭѡ<C6AC>ź<EFBFBD> PE3
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2025-06-27 00:32:57 +08:00
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#define NRF24L01_CE(s) GPIO_WriteBit(GPIOE,GPIO_Pin_3,(BitAction)s)
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2025-07-05 19:47:28 +08:00
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// SPIƬѡ<C6AC>ź<EFBFBD> PE4
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2025-06-27 00:32:57 +08:00
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#define NRF24L01_CSN(s) GPIO_WriteBit(GPIOE,GPIO_Pin_4,(BitAction)s)
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2025-07-05 19:47:28 +08:00
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// IRQ<52><51><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> PB6
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2025-06-27 00:32:57 +08:00
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#define NRF24L01_IRQ() GPIO_ReadInputDataBit(GPIOB,GPIO_Pin_6)
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typedef struct
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{
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2025-07-05 19:47:28 +08:00
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// <20><><EFBFBD>жϷ<D0B6><CFB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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2025-06-27 00:32:57 +08:00
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void (*irq)(void);
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2025-07-05 19:47:28 +08:00
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// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɻص<C9BB>
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2025-06-27 00:32:57 +08:00
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void (*send_end_cb)(void *);
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void *send_end_cb_par;
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2025-07-05 19:47:28 +08:00
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// <20><><EFBFBD>յ<EFBFBD><D5B5><EFBFBD><EFBFBD>ݻص<DDBB>
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2025-06-27 00:32:57 +08:00
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void (*recved_cb)(void *);
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void *recved_cb_par;
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}nrf_struct;
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static nrf_struct g_nrf={0};
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2025-07-05 19:47:28 +08:00
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static const u8 TX_ADDRESS[TX_ADR_WIDTH]={0x34,0x43,0x10,0x10,0x01}; //<2F><><EFBFBD>͵<EFBFBD>ַ
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static const u8 RX_ADDRESS[RX_ADR_WIDTH]={0x34,0x43,0x10,0x10,0x01}; //<2F><><EFBFBD>͵<EFBFBD>ַ
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2025-06-27 00:32:57 +08:00
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void nrf24l01_spi_init(void)
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{
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GPIO_InitTypeDef GPIO_InitStructure;
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SPI_InitTypeDef SPI_InitStructure;
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RCC_APB2PeriphClockCmd(RCC_APB2Periph_SPI4,ENABLE);
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RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOE,ENABLE);
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GPIO_PinAFConfig(GPIOE, GPIO_PinSource2, GPIO_AF_SPI4);
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GPIO_PinAFConfig(GPIOE, GPIO_PinSource5, GPIO_AF_SPI4);
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GPIO_PinAFConfig(GPIOE, GPIO_PinSource6, GPIO_AF_SPI4);
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
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GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
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GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
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GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_DOWN;
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/*!< SPI SCK pin configuration */
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2;
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GPIO_Init(GPIOE, &GPIO_InitStructure);
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/*!< SPI MOSI pin configuration */
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5;
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GPIO_Init(GPIOE, &GPIO_InitStructure);
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/*!< SPI MISO pin configuration */
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6;
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GPIO_Init(GPIOE, &GPIO_InitStructure);
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/*!< Configure sFLASH Card CS pin in output pushpull mode ********************/
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_4;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT;
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GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
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GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
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GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
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GPIO_Init(GPIOE, &GPIO_InitStructure);
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2025-07-05 19:47:28 +08:00
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//ʧ<><CAA7>SPI<50><49><EFBFBD><EFBFBD>
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2025-06-27 00:32:57 +08:00
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SPI_Cmd(SPI4, DISABLE);
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2025-07-05 19:47:28 +08:00
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//<2F><><EFBFBD><EFBFBD>SPI<50><49><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˫<EFBFBD><CBAB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ:SPI<50><49><EFBFBD><EFBFBD>Ϊ˫<CEAA><CBAB>˫<EFBFBD><CBAB>ȫ˫<C8AB><CBAB>
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2025-06-27 00:32:57 +08:00
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SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex;
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2025-07-05 19:47:28 +08:00
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//<2F><><EFBFBD><EFBFBD>SPI<50><49><EFBFBD><EFBFBD>ģʽ:<3A><><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA>SPI
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2025-06-27 00:32:57 +08:00
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SPI_InitStructure.SPI_Mode = SPI_Mode_Master;
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2025-07-05 19:47:28 +08:00
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//<2F><><EFBFBD><EFBFBD>SPI<50><49><EFBFBD><EFBFBD><EFBFBD>ݴ<EFBFBD>С:SPI<50><49><EFBFBD>ͽ<EFBFBD><CDBD><EFBFBD>8λ֡<CEBB>ṹ
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2025-06-27 00:32:57 +08:00
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SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b;
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2025-07-05 19:47:28 +08:00
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//<2F><><EFBFBD><EFBFBD>ͬ<EFBFBD><CDAC>ʱ<EFBFBD>ӵĿ<D3B5><C4BF><EFBFBD>״̬Ϊ<CCAC>͵<EFBFBD>ƽ
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2025-06-27 00:32:57 +08:00
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SPI_InitStructure.SPI_CPOL = SPI_CPOL_Low;
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2025-07-05 19:47:28 +08:00
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//<2F><><EFBFBD><EFBFBD>ͬ<EFBFBD><CDAC>ʱ<EFBFBD>ӵĵ<D3B5>1<EFBFBD><31><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>أ<EFBFBD><D8A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>½<EFBFBD><C2BD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD><EFBFBD><EFBFBD>
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2025-06-27 00:32:57 +08:00
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SPI_InitStructure.SPI_CPHA = SPI_CPHA_1Edge;
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2025-07-05 19:47:28 +08:00
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//NSS<53>ź<EFBFBD><C5BA><EFBFBD>Ӳ<EFBFBD><D3B2><EFBFBD><EFBFBD>NSS<53>ܽţ<DCBD><C5A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>SSIλ<49><CEBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:<3A>ڲ<EFBFBD>NSS<53>ź<EFBFBD><C5BA><EFBFBD>SSIλ<49><CEBB><EFBFBD><EFBFBD>
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2025-06-27 00:32:57 +08:00
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SPI_InitStructure.SPI_NSS = SPI_NSS_Soft;
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2025-07-05 19:47:28 +08:00
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//<2F><><EFBFBD>岨<EFBFBD><E5B2A8><EFBFBD><EFBFBD>Ԥ<EFBFBD><D4A4>Ƶ<EFBFBD><C6B5>ֵ:<3A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ԥ<EFBFBD><D4A4>ƵֵΪ256
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2025-06-27 00:32:57 +08:00
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SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_16;
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2025-07-05 19:47:28 +08:00
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//ָ<><D6B8><EFBFBD><EFBFBD><EFBFBD>ݴ<EFBFBD><DDB4><EFBFBD><EFBFBD><EFBFBD>MSBλ<42><CEBB><EFBFBD><EFBFBD>LSBλ<42><CEBB>ʼ:<3A><><EFBFBD>ݴ<EFBFBD><DDB4><EFBFBD><EFBFBD><EFBFBD>MSBλ<42><CEBB>ʼ
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2025-06-27 00:32:57 +08:00
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SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;
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2025-07-05 19:47:28 +08:00
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//CRCֵ<43><D6B5><EFBFBD><EFBFBD><EFBFBD>Ķ<EFBFBD><C4B6><EFBFBD>ʽ
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2025-06-27 00:32:57 +08:00
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SPI_InitStructure.SPI_CRCPolynomial = 7;
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2025-07-05 19:47:28 +08:00
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//<2F><><EFBFBD><EFBFBD>SPI_InitStruct<63><74>ָ<EFBFBD><D6B8><EFBFBD>IJ<EFBFBD><C4B2><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>SPIx<49>Ĵ<EFBFBD><C4B4><EFBFBD>
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2025-06-27 00:32:57 +08:00
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SPI_Init(SPI4, &SPI_InitStructure);
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2025-07-05 19:47:28 +08:00
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//ʹ<><CAB9>SPI<50><49><EFBFBD><EFBFBD>
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2025-06-27 00:32:57 +08:00
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SPI_Cmd(SPI4, ENABLE);
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}
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2025-07-05 19:47:28 +08:00
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// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD>Ĭ<EFBFBD>Ͻ<EFBFBD><CFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ
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2025-06-27 00:32:57 +08:00
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void nrf24l01_sort_init(void);
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2025-07-05 19:47:28 +08:00
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//<2F><>ʼ<EFBFBD><CABC>24L01<30><31>IO<49><4F>
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2025-06-27 00:32:57 +08:00
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void nrf24l01_init(void)
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{
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GPIO_InitTypeDef GPIO_InitStructure;
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2025-07-05 19:47:28 +08:00
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RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOB|RCC_AHB1Periph_GPIOE, ENABLE);//ʹ<><CAB9>GPIOB,Gʱ<47><CAB1>
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2025-06-27 00:32:57 +08:00
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RCC_APB2PeriphClockCmd(RCC_APB2Periph_EXTIT,ENABLE);
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2025-07-05 19:47:28 +08:00
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RCC_APB2PeriphClockCmd(RCC_APB2Periph_SYSCFG, ENABLE);//ʹ<><CAB9>SYSCFGʱ<47><CAB1>
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// GE3 Ƭѡ<C6AC><D1A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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2025-06-27 00:32:57 +08:00
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_3;
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2025-07-05 19:47:28 +08:00
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT; //<2F><>ͨ<EFBFBD><CDA8><EFBFBD><EFBFBD>ģʽ
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GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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2025-06-27 00:32:57 +08:00
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GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz; //100MHz
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2025-07-05 19:47:28 +08:00
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GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP; //<2F><><EFBFBD><EFBFBD>
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2025-06-27 00:32:57 +08:00
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GPIO_Init(GPIOE, &GPIO_InitStructure);
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2025-07-05 19:47:28 +08:00
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// GB6 <20>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD>
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2025-06-27 00:32:57 +08:00
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6;
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2025-07-05 19:47:28 +08:00
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN; //<2F><><EFBFBD><EFBFBD>
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GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP; //<2F><><EFBFBD><EFBFBD>
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2025-06-27 00:32:57 +08:00
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GPIO_Init(GPIOB, &GPIO_InitStructure);
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EXTI_InitTypeDef EXTI_InitStruct={0};
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SYSCFG_EXTILineConfig(EXTI_PortSourceGPIOB,EXTI_PinSource6);
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EXTI_InitStruct.EXTI_Line= EXTI_Line6;
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EXTI_InitStruct.EXTI_Mode= EXTI_Mode_Interrupt;
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EXTI_InitStruct.EXTI_Trigger= EXTI_Trigger_Falling;
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EXTI_InitStruct.EXTI_LineCmd= ENABLE;
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EXTI_Init(&EXTI_InitStruct);
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NVIC_InitTypeDef NVIC_InitStructure;
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NVIC_InitStructure.NVIC_IRQChannel = EXTI9_5_IRQn;
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NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority=3;
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NVIC_InitStructure.NVIC_IRQChannelSubPriority =3;
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NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
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NVIC_Init(&NVIC_InitStructure);
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2025-07-05 19:47:28 +08:00
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// <20><><EFBFBD><EFBFBD>NRF<52><46><EFBFBD>ص<EFBFBD><D8B5><EFBFBD>ʼ<EFBFBD><CABC>SPI<50><49><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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2025-06-27 00:32:57 +08:00
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nrf24l01_spi_init();
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2025-07-05 19:47:28 +08:00
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NRF24L01_CE(0); //ʹ<><CAB9>24L01
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NRF24L01_CSN(1); //SPIƬѡȡ<D1A1><C8A1>
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2025-06-27 00:32:57 +08:00
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nrf24l01_sort_init();
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}
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2025-07-05 19:47:28 +08:00
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// ȥ<><C8A5>ʼ<EFBFBD><CABC>
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2025-06-27 00:32:57 +08:00
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void nrf24l01_deinit(void)
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{
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EXTI_InitTypeDef EXTI_InitStruct={0};
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EXTI_InitStruct.EXTI_Line= EXTI_Line6;
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EXTI_InitStruct.EXTI_Mode= EXTI_Mode_Interrupt;
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EXTI_InitStruct.EXTI_Trigger= EXTI_Trigger_Falling;
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EXTI_InitStruct.EXTI_LineCmd= DISABLE;
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EXTI_Init(&EXTI_InitStruct);
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NRF24L01_CE(0);
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}
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void EXTI9_5_IRQHandler(void)
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{
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if(EXTI_GetITStatus(EXTI_Line6)==SET)
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{
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EXTI_ClearITPendingBit(EXTI_Line6);
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if(g_nrf.irq) g_nrf.irq();
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}
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}
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u8 spi_read_write_byte(u8 txdata)
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{
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2025-07-05 19:47:28 +08:00
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// <20>ȴ<EFBFBD><C8B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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2025-06-27 00:32:57 +08:00
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while (SPI_I2S_GetFlagStatus(SPI4, SPI_I2S_FLAG_TXE) == RESET){}
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2025-07-05 19:47:28 +08:00
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// ͨ<><CDA8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>SPIx<49><78><EFBFBD><EFBFBD>һ<EFBFBD><D2BB>byte <20><><EFBFBD><EFBFBD>
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2025-06-27 00:32:57 +08:00
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SPI_I2S_SendData(SPI4, txdata);
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2025-07-05 19:47:28 +08:00
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// <20>ȴ<EFBFBD><C8B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><D2BB>byte
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2025-06-27 00:32:57 +08:00
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while (SPI_I2S_GetFlagStatus(SPI4, SPI_I2S_FLAG_RXNE) == RESET){}
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2025-07-05 19:47:28 +08:00
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// <20><><EFBFBD><EFBFBD>ͨ<EFBFBD><CDA8>SPIx<49><78><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>յ<EFBFBD><D5B5><EFBFBD><EFBFBD><EFBFBD>
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2025-06-27 00:32:57 +08:00
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return SPI_I2S_ReceiveData(SPI4);
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}
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2025-07-05 19:47:28 +08:00
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//SPIд<49>Ĵ<EFBFBD><C4B4><EFBFBD>
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//reg:ָ<><D6B8><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD>ַ
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//value:д<><D0B4><EFBFBD><EFBFBD>ֵ
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2025-06-27 00:32:57 +08:00
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u8 nrf24l01_write_reg(u8 reg,u8 value)
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{
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u8 status;
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2025-07-05 19:47:28 +08:00
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NRF24L01_CSN(0); //ʹ<><CAB9>SPI<50><49><EFBFBD><EFBFBD>
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status =spi_read_write_byte(reg);//<2F><><EFBFBD>ͼĴ<CDBC><C4B4><EFBFBD><EFBFBD><EFBFBD>
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spi_read_write_byte(value); //д<><D0B4><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD>ֵ
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NRF24L01_CSN(1); //<2F><>ֹSPI<50><49><EFBFBD><EFBFBD>
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return(status); //<2F><><EFBFBD><EFBFBD>״ֵ̬
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2025-06-27 00:32:57 +08:00
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}
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2025-07-05 19:47:28 +08:00
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//<2F><>ȡSPI<50>Ĵ<EFBFBD><C4B4><EFBFBD>ֵ
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//reg:Ҫ<><D2AA><EFBFBD>ļĴ<C4BC><C4B4><EFBFBD>
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2025-06-27 00:32:57 +08:00
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u8 nrf24l01_read_reg(u8 reg)
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{
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u8 reg_val;
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2025-07-05 19:47:28 +08:00
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NRF24L01_CSN(0); //ʹ<><CAB9>SPI<50><49><EFBFBD><EFBFBD>
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spi_read_write_byte(reg); //<2F><><EFBFBD>ͼĴ<CDBC><C4B4><EFBFBD><EFBFBD><EFBFBD>
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reg_val=spi_read_write_byte(0XFF);//<2F><>ȡ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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NRF24L01_CSN(1); //<2F><>ֹSPI<50><49><EFBFBD><EFBFBD>
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return(reg_val); //<2F><><EFBFBD><EFBFBD>״ֵ̬
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2025-06-27 00:32:57 +08:00
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}
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2025-07-05 19:47:28 +08:00
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//<2F><>ָ<EFBFBD><D6B8>λ<EFBFBD>ö<EFBFBD><C3B6><EFBFBD>ָ<EFBFBD><D6B8><EFBFBD><EFBFBD><EFBFBD>ȵ<EFBFBD><C8B5><EFBFBD><EFBFBD><EFBFBD>
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//reg:<3A>Ĵ<EFBFBD><C4B4><EFBFBD>(λ<><CEBB>)
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//*pBuf:<3A><><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>
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//len:<3A><><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
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//<2F><><EFBFBD><EFBFBD>ֵ,<2C>˴ζ<CBB4><CEB6><EFBFBD><EFBFBD><EFBFBD>״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD>ֵ
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2025-06-27 00:32:57 +08:00
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u8 nrf24l01_read_buf(u8 reg,u8 *pBuf,u8 len)
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{
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u8 status,u8_ctr;
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2025-07-05 19:47:28 +08:00
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NRF24L01_CSN(0); //ʹ<><CAB9>SPI<50><49><EFBFBD><EFBFBD>
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status=spi_read_write_byte(reg);//<2F><><EFBFBD>ͼĴ<CDBC><C4B4><EFBFBD>ֵ(λ<><CEBB>),<2C><><EFBFBD><EFBFBD>ȡ״ֵ̬
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for(u8_ctr=0;u8_ctr<len;u8_ctr++)pBuf[u8_ctr]=spi_read_write_byte(0XFF);//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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NRF24L01_CSN(1); //<2F>ر<EFBFBD>SPI<50><49><EFBFBD><EFBFBD>
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return status; //<2F><><EFBFBD>ض<EFBFBD><D8B6><EFBFBD><EFBFBD><EFBFBD>״ֵ̬
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2025-06-27 00:32:57 +08:00
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}
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2025-07-05 19:47:28 +08:00
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//<2F><>ָ<EFBFBD><D6B8>λ<EFBFBD><CEBB>дָ<D0B4><D6B8><EFBFBD><EFBFBD><EFBFBD>ȵ<EFBFBD><C8B5><EFBFBD><EFBFBD><EFBFBD>
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//reg:<3A>Ĵ<EFBFBD><C4B4><EFBFBD>(λ<><CEBB>)
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//*pBuf:<3A><><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>
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//len:<3A><><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
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//<2F><><EFBFBD><EFBFBD>ֵ,<2C>˴ζ<CBB4><CEB6><EFBFBD><EFBFBD><EFBFBD>״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD>ֵ
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2025-06-27 00:32:57 +08:00
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u8 nrf24l01_write_buf(u8 reg, u8 *pBuf, u8 len)
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{
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u8 status,u8_ctr;
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2025-07-05 19:47:28 +08:00
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NRF24L01_CSN(0); //ʹ<><CAB9>SPI<50><49><EFBFBD><EFBFBD>
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status = spi_read_write_byte(reg);//<2F><><EFBFBD>ͼĴ<CDBC><C4B4><EFBFBD>ֵ(λ<><CEBB>),<2C><><EFBFBD><EFBFBD>ȡ״ֵ̬
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for(u8_ctr=0; u8_ctr<len; u8_ctr++)spi_read_write_byte(*pBuf++); //д<><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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NRF24L01_CSN(1); //<2F>ر<EFBFBD>SPI<50><49><EFBFBD><EFBFBD>
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return status; //<2F><><EFBFBD>ض<EFBFBD><D8B6><EFBFBD><EFBFBD><EFBFBD>״ֵ̬
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2025-06-27 00:32:57 +08:00
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}
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2025-07-05 19:47:28 +08:00
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//<2F><><EFBFBD><EFBFBD>24L01<30>Ƿ<EFBFBD><C7B7><EFBFBD><EFBFBD><EFBFBD>
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//<2F><><EFBFBD><EFBFBD>ֵ:0<><30><EFBFBD>ɹ<EFBFBD>;1<><31>ʧ<EFBFBD><CAA7>
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2025-06-27 00:32:57 +08:00
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u8 nrf24l01_check(void)
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{
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u8 i;
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u8 old[5];
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nrf24l01_read_buf(TX_ADDR,old,5);
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u8 buf[5]={0XA5,0XA5,0XA5,0XA5,0XA5};
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2025-07-05 19:47:28 +08:00
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nrf24l01_write_buf(NRF_WRITE_REG+TX_ADDR,buf,5);//д<><D0B4>5<EFBFBD><35><EFBFBD>ֽڵĵ<DAB5>ַ.
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nrf24l01_read_buf(TX_ADDR,buf,5); //<2F><><EFBFBD><EFBFBD>д<EFBFBD><D0B4><EFBFBD>ĵ<EFBFBD>ַ
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2025-06-27 00:32:57 +08:00
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for(i=0;i<5;i++)if(buf[i]!=0XA5)break;
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2025-07-05 19:47:28 +08:00
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if(i!=5)return 1;//<2F><><EFBFBD><EFBFBD>24L01<30><31><EFBFBD><EFBFBD>
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2025-06-27 00:32:57 +08:00
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2025-07-05 19:47:28 +08:00
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nrf24l01_write_buf(NRF_WRITE_REG+TX_ADDR,old,5);//д<><D0B4>5<EFBFBD><35><EFBFBD>ֽڵĵ<DAB5>ַ.
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return 0; //<2F><><EFBFBD>24L01
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2025-06-27 00:32:57 +08:00
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}
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2025-07-05 19:47:28 +08:00
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// <20><><EFBFBD>õ<EFBFBD>ַ<EFBFBD><D6B7><EFBFBD>ҵģ<D2B5><C4A3>Է<EFBFBD><D4B7><EFBFBD>
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2025-06-27 00:32:57 +08:00
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void nrf24l01_set_addr(u8 my[5],u8 dst[5])
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{
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2025-07-05 19:47:28 +08:00
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//дTX<54>ڵ<EFBFBD><DAB5><EFBFBD>ַ
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2025-06-27 00:32:57 +08:00
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nrf24l01_write_buf(NRF_WRITE_REG+TX_ADDR,(u8*)dst,TX_ADR_WIDTH);
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2025-07-05 19:47:28 +08:00
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//<2F><><EFBFBD><EFBFBD>RX<52>ڵ<EFBFBD><DAB5><EFBFBD>ַ,<2C><>ҪΪ<D2AA><CEAA>ʹ<EFBFBD><CAB9>ACK
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2025-06-27 00:32:57 +08:00
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nrf24l01_write_buf(NRF_WRITE_REG+RX_ADDR_P0,(u8*)my,RX_ADR_WIDTH);
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}
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2025-07-05 19:47:28 +08:00
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// <20><><EFBFBD><EFBFBD>ͨ<EFBFBD><CDA8><EFBFBD>ŵ<EFBFBD>
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2025-06-27 00:32:57 +08:00
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void nrf24l01_set_chan(u8 chan)
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{
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2025-07-05 19:47:28 +08:00
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//<2F><><EFBFBD><EFBFBD>RFͨ<46><CDA8>Ϊchan
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2025-06-27 00:32:57 +08:00
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nrf24l01_write_reg(NRF_WRITE_REG+RF_CH,chan&0x3f);
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}
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2025-07-05 19:47:28 +08:00
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// <20><><EFBFBD>ý<EFBFBD><C3BD>յ<EFBFBD><D5B5><EFBFBD><EFBFBD>ݵĻص<C4BB><D8B5><EFBFBD><EFBFBD><EFBFBD>
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2025-06-27 00:32:57 +08:00
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void nrf24l01_set_recv_cb(void(*fun)(void *t),void *t)
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{
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g_nrf.recved_cb=fun;
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g_nrf.recved_cb_par=t;
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}
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2025-07-05 19:47:28 +08:00
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// <20><><EFBFBD>÷<EFBFBD><C3B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɵĻص<C4BB><D8B5><EFBFBD><EFBFBD><EFBFBD>
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2025-06-27 00:32:57 +08:00
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void nrf24l01_set_send_cb(void(*fun)(void *t),void *t)
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{
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g_nrf.send_end_cb=fun;
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g_nrf.send_end_cb_par=t;
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}
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2025-07-05 19:47:28 +08:00
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// <20><><EFBFBD>ò<EFBFBD><C3B2><EFBFBD><EFBFBD>ж<EFBFBD>ʱ<EFBFBD>Ļص<C4BB><D8B5><EFBFBD><EFBFBD><EFBFBD>
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2025-06-27 00:32:57 +08:00
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void nrf24l01_set_irq_cb(void(*fun)(void))
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{
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g_nrf.irq=fun;
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}
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2025-07-05 19:47:28 +08:00
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// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD>Ĭ<EFBFBD>Ͻ<EFBFBD><CFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ
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2025-06-27 00:32:57 +08:00
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void nrf24l01_sort_init(void)
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{
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g_nrf.irq=nrf24l01_irq;
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NRF24L01_CE(0);
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2025-07-05 19:47:28 +08:00
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//дTX<54>ڵ<EFBFBD><DAB5><EFBFBD>ַ
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2025-06-27 00:32:57 +08:00
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nrf24l01_write_buf(NRF_WRITE_REG+TX_ADDR,(u8*)TX_ADDRESS,TX_ADR_WIDTH);
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2025-07-05 19:47:28 +08:00
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//<2F><><EFBFBD><EFBFBD>RX<52>ڵ<EFBFBD><DAB5><EFBFBD>ַ,<2C><>ҪΪ<D2AA><CEAA>ʹ<EFBFBD><CAB9>ACK
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2025-06-27 00:32:57 +08:00
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nrf24l01_write_buf(NRF_WRITE_REG+RX_ADDR_P0,(u8*)RX_ADDRESS,RX_ADR_WIDTH);
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2025-07-05 19:47:28 +08:00
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//<2F><>ֹ<EFBFBD>Զ<EFBFBD>Ӧ<EFBFBD><D3A6>
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2025-06-27 00:32:57 +08:00
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nrf24l01_write_reg(NRF_WRITE_REG+EN_AA,0x00);
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2025-07-05 19:47:28 +08:00
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//ʹ<><CAB9>ͨ<EFBFBD><CDA8>0<EFBFBD>Ľ<EFBFBD><C4BD>յ<EFBFBD>ַ
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2025-06-27 00:32:57 +08:00
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nrf24l01_write_reg(NRF_WRITE_REG+EN_RXADDR,0x01);
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2025-07-05 19:47:28 +08:00
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//ѡ<><D1A1>ͨ<EFBFBD><CDA8>0<EFBFBD><30><EFBFBD><EFBFBD>Ч<EFBFBD><D0A7><EFBFBD>ݿ<EFBFBD><DDBF><EFBFBD>
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2025-06-27 00:32:57 +08:00
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nrf24l01_write_reg(NRF_WRITE_REG+RX_PW_P0,RX_PLOAD_WIDTH);
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2025-07-05 19:47:28 +08:00
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//<2F><>ֹ<EFBFBD>Զ<EFBFBD><D4B6>ط<EFBFBD>
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2025-06-27 00:32:57 +08:00
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nrf24l01_write_reg(NRF_WRITE_REG+SETUP_RETR,0x0);
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2025-07-05 19:47:28 +08:00
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//<2F><><EFBFBD><EFBFBD>RFͨ<46><CDA8>Ϊ40
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2025-06-27 00:32:57 +08:00
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nrf24l01_write_reg(NRF_WRITE_REG+RF_CH,40);
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2025-07-05 19:47:28 +08:00
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//<2F><><EFBFBD><EFBFBD>TX<54><58><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>,0db<64><62><EFBFBD><EFBFBD>,2Mbps,<2C><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>濪<EFBFBD><E6BFAA>
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2025-06-27 00:32:57 +08:00
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nrf24l01_write_reg(NRF_WRITE_REG+RF_SETUP,0x0f);
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2025-07-05 19:47:28 +08:00
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//<2F><><EFBFBD><EFBFBD>ģʽ<C4A3><CABD>0xf;<3B><><EFBFBD><EFBFBD>ģʽ0xe<78><65><EFBFBD><EFBFBD><EFBFBD><EFBFBD>crc16
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2025-06-27 00:32:57 +08:00
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nrf24l01_write_reg(NRF_WRITE_REG+CONFIG,0x0f);
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u8 sta=0;
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sta=nrf24l01_read_reg(STATUS);
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2025-07-05 19:47:28 +08:00
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// <20><><EFBFBD><EFBFBD>TX_DS<44><53>MAX_RT<52>жϱ<D0B6>־
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2025-06-27 00:32:57 +08:00
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nrf24l01_write_reg(NRF_WRITE_REG+STATUS,sta);
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2025-07-05 19:47:28 +08:00
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// <20><><EFBFBD><EFBFBD>rxfifo<66><6F><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݣ<EFBFBD><DDA3><EFBFBD><F2B2BBBB>ٲ<EFBFBD><D9B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>жϣ<D0B6><CFA3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>RX FIFO<46>Ĵ<EFBFBD><C4B4><EFBFBD>
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2025-06-27 00:32:57 +08:00
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nrf24l01_write_reg(FLUSH_RX,0xff);
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2025-07-05 19:47:28 +08:00
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//CEΪ<45><CEAA>
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2025-06-27 00:32:57 +08:00
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NRF24L01_CE(1);
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}
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2025-07-05 19:47:28 +08:00
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// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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// data<74><61>Ҫ<EFBFBD><D2AA><EFBFBD>͵<EFBFBD><CDB5><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>
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// len<65><6E><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3>ȣ<EFBFBD><C8A3><EFBFBD><EFBFBD>ܳ<EFBFBD><DCB3><EFBFBD>32<33>ֽ<EFBFBD>
|
2025-06-27 00:32:57 +08:00
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int nrf24l01_send(void *data)
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{
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NRF24L01_CE(0);
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2025-07-05 19:47:28 +08:00
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//<2F><><EFBFBD><EFBFBD>ģʽ<C4A3><CABD>0xf;<3B><><EFBFBD><EFBFBD>ģʽ0xe<78><65><EFBFBD><EFBFBD><EFBFBD><EFBFBD>crc16
|
2025-06-27 00:32:57 +08:00
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nrf24l01_write_reg(NRF_WRITE_REG+CONFIG,0x0e);
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2025-07-05 19:47:28 +08:00
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//д<><D0B4><EFBFBD>ݵ<EFBFBD>TX BUF 32<33><32><EFBFBD>ֽ<EFBFBD>
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2025-06-27 00:32:57 +08:00
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nrf24l01_write_buf(WR_TX_PLOAD,data,TX_PLOAD_WIDTH);
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NRF24L01_CE(1);
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return 0;
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}
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2025-07-05 19:47:28 +08:00
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// <20><>ȡ<EFBFBD><C8A1><EFBFBD>յ<EFBFBD><D5B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> ,<2C><><EFBFBD><EFBFBD>0<EFBFBD>ɹ<EFBFBD>
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// buf<75><66><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݻ<EFBFBD><DDBB><EFBFBD>
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2025-06-27 00:32:57 +08:00
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int nrf24l01_read(void *buf)
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|
{
|
2025-07-05 19:47:28 +08:00
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nrf24l01_read_buf(RD_RX_PLOAD,buf,RX_PLOAD_WIDTH);//<2F><>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD>
|
2025-06-27 00:32:57 +08:00
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return 0;
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}
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2025-07-05 19:47:28 +08:00
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// nrf<72><66><EFBFBD>жϷ<D0B6><CFB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
2025-06-27 00:32:57 +08:00
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|
void nrf24l01_irq(void)
|
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|
|
|
{
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|
u8 sta=0;
|
2025-07-05 19:47:28 +08:00
|
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|
sta=nrf24l01_read_reg(STATUS); //<2F><>ȡ״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD>ֵ
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|
nrf24l01_write_reg(NRF_WRITE_REG+STATUS,sta); //<2F><><EFBFBD><EFBFBD>TX_DS<44><53>MAX_RT<52>жϱ<D0B6>־
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|
|
|
|
if(sta&TX_OK)//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
2025-06-27 00:32:57 +08:00
|
|
|
|
{
|
2025-07-05 19:47:28 +08:00
|
|
|
|
//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>֮<EFBFBD><D6AE><EFBFBD>Զ<EFBFBD><D4B6>л<EFBFBD>Ϊ<EFBFBD><CEAA><EFBFBD><EFBFBD>ģʽ
|
2025-06-27 00:32:57 +08:00
|
|
|
|
NRF24L01_CE(0);
|
|
|
|
|
nrf24l01_write_reg(NRF_WRITE_REG+CONFIG,0x0f);
|
|
|
|
|
NRF24L01_CE(1);
|
|
|
|
|
if(g_nrf.send_end_cb)
|
|
|
|
|
g_nrf.send_end_cb(g_nrf.send_end_cb_par);
|
|
|
|
|
}
|
|
|
|
|
else if(sta&RX_OK)
|
|
|
|
|
{
|
|
|
|
|
if(g_nrf.recved_cb)
|
|
|
|
|
g_nrf.recved_cb(g_nrf.recved_cb_par);
|
2025-07-05 19:47:28 +08:00
|
|
|
|
// <20><>ȡ֮<C8A1><D6AE><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>RX FIFO<46>Ĵ<EFBFBD><C4B4><EFBFBD>
|
2025-06-27 00:32:57 +08:00
|
|
|
|
nrf24l01_write_reg(FLUSH_RX,0xff);
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
}
|
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