2025-06-27 00:32:57 +08:00
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/***
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************************************************************************************
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* @file spi_flash.c
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* @version V1.0.0
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2025-07-05 19:47:28 +08:00
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* @brief SPI Flash<EFBFBD><EFBFBD><EFBFBD>غ<EFBFBD><EFBFBD><EFBFBD>
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2025-06-27 00:32:57 +08:00
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************************************************************************************
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* @description
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*
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2025-07-05 19:47:28 +08:00
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* <EFBFBD><EFBFBD>ֲ<EFBFBD>ڹٷ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>̼<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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2025-06-27 00:32:57 +08:00
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*
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************************************************************************************
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***/
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#include "spi_flash.h"
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void sFLASH_LowLevel_DeInit(void);
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void sFLASH_LowLevel_Init(void);
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2025-07-05 19:47:28 +08:00
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//<2F><><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ȩ<EFBFBD><C8A8><EFBFBD><EFBFBD>֤FLASHֻ<48><D6BB>һ<EFBFBD><D2BB><EFBFBD>߳<EFBFBD>ʹ<EFBFBD><CAB9>
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2025-06-27 00:32:57 +08:00
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//static int g_used=0;
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2025-07-05 19:47:28 +08:00
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//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ⲿ<EFBFBD><E2B2BF><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>
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2025-06-27 00:32:57 +08:00
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//extern void my_delay_ms(u32 ms);
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2025-07-05 19:47:28 +08:00
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//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>벻<EFBFBD><EBB2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ĺ<EFBFBD>
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2025-06-27 00:32:57 +08:00
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//#define sFLASH_ENTER_USED() {while (g_used) {my_delay_ms(1);} g_used=1;}
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//#define sFLASH_EXIT_USED() {g_used=0;}
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#define sFLASH_ENTER_USED() { }
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#define sFLASH_EXIT_USED() { }
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/* Private functions ---------------------------------------------------------*/
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/**
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* @brief DeInitializes the peripherals used by the SPI FLASH driver.
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* @param None
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* @retval None
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*/
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void sFLASH_DeInit(void)
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{
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sFLASH_LowLevel_DeInit();
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}
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/**
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* @brief Initializes the peripherals used by the SPI FLASH driver.
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* @param None
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* @retval None
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*/
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void sFLASH_Init(void)
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{
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SPI_InitTypeDef SPI_InitStructure;
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sFLASH_LowLevel_Init();
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/*!< Deselect the FLASH: Chip Select high */
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sFLASH_CS_HIGH();
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/*!< SPI configuration */
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SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex;
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SPI_InitStructure.SPI_Mode = SPI_Mode_Master;
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SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b;
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SPI_InitStructure.SPI_CPOL = SPI_CPOL_High;
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SPI_InitStructure.SPI_CPHA = SPI_CPHA_2Edge;
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SPI_InitStructure.SPI_NSS = SPI_NSS_Soft;
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SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_2;
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SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;
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SPI_InitStructure.SPI_CRCPolynomial = 7;
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SPI_Init(sFLASH_SPI, &SPI_InitStructure);
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/*!< Enable the sFLASH_SPI */
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SPI_Cmd(sFLASH_SPI, ENABLE);
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}
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/**
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* @brief Erases the specified FLASH sector.
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* @param SectorAddr: address of the sector to erase.
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* @retval None
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*/
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void sFLASH_EraseSector(uint32_t SectorAddr)
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{
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sFLASH_ENTER_USED();
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/*!< Send write enable instruction */
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sFLASH_WriteEnable();
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/*!< Sector Erase */
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/*!< Select the FLASH: Chip Select low */
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sFLASH_CS_LOW();
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/*!< Send Sector Erase instruction */
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sFLASH_SendByte(sFLASH_CMD_SE);
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/*!< Send SectorAddr high nibble address byte */
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sFLASH_SendByte((SectorAddr & 0xFF0000) >> 16);
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/*!< Send SectorAddr medium nibble address byte */
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sFLASH_SendByte((SectorAddr & 0xFF00) >> 8);
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/*!< Send SectorAddr low nibble address byte */
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sFLASH_SendByte(SectorAddr & 0xFF);
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/*!< Deselect the FLASH: Chip Select high */
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sFLASH_CS_HIGH();
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/*!< Wait the end of Flash writing */
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sFLASH_WaitForWriteEnd();
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sFLASH_EXIT_USED()
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}
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/**
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* @brief Erases the entire FLASH.
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* @param None
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* @retval None
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*/
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void sFLASH_EraseBulk(void)
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{
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/*!< Send write enable instruction */
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sFLASH_WriteEnable();
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/*!< Bulk Erase */
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/*!< Select the FLASH: Chip Select low */
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sFLASH_CS_LOW();
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/*!< Send Bulk Erase instruction */
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//sFLASH_SendByte(sFLASH_CMD_BE);
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2025-07-05 19:47:28 +08:00
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sFLASH_SendByte(0xc7);//<2F><>ΪȫƬ<C8AB><C6AC><EFBFBD><EFBFBD>
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2025-06-27 00:32:57 +08:00
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/*!< Deselect the FLASH: Chip Select high */
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sFLASH_CS_HIGH();
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/*!< Wait the end of Flash writing */
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sFLASH_WaitForWriteEnd();
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}
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/**
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* @brief Writes more than one byte to the FLASH with a single WRITE cycle
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* (Page WRITE sequence).
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* @note The number of byte can't exceed the FLASH page size.
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* @param pBuffer: pointer to the buffer containing the data to be written
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* to the FLASH.
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* @param WriteAddr: FLASH's internal address to write to.
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* @param NumByteToWrite: number of bytes to write to the FLASH, must be equal
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* or less than "sFLASH_PAGESIZE" value.
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* @retval None
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*/
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void sFLASH_WritePage(uint8_t* pBuffer, uint32_t WriteAddr, uint16_t NumByteToWrite)
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{
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/*!< Enable the write access to the FLASH */
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sFLASH_WriteEnable();
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/*!< Select the FLASH: Chip Select low */
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sFLASH_CS_LOW();
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/*!< Send "Write to Memory " instruction */
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sFLASH_SendByte(sFLASH_CMD_WRITE);
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/*!< Send WriteAddr high nibble address byte to write to */
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sFLASH_SendByte((WriteAddr & 0xFF0000) >> 16);
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/*!< Send WriteAddr medium nibble address byte to write to */
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sFLASH_SendByte((WriteAddr & 0xFF00) >> 8);
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/*!< Send WriteAddr low nibble address byte to write to */
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sFLASH_SendByte(WriteAddr & 0xFF);
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/*!< while there is data to be written on the FLASH */
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while (NumByteToWrite--)
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{
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/*!< Send the current byte */
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sFLASH_SendByte(*pBuffer);
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/*!< Point on the next byte to be written */
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pBuffer++;
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}
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/*!< Deselect the FLASH: Chip Select high */
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sFLASH_CS_HIGH();
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/*!< Wait the end of Flash writing */
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sFLASH_WaitForWriteEnd();
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}
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/**
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* @brief Writes block of data to the FLASH. In this function, the number of
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* WRITE cycles are reduced, using Page WRITE sequence.
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* @param pBuffer: pointer to the buffer containing the data to be written
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* to the FLASH.
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* @param WriteAddr: FLASH's internal address to write to.
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* @param NumByteToWrite: number of bytes to write to the FLASH.
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* @retval None
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*/
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void sFLASH_WriteBuffer(uint8_t* pBuffer, uint32_t WriteAddr, uint32_t NumByteToWrite)
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{
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sFLASH_ENTER_USED();
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uint8_t NumOfPage = 0, NumOfSingle = 0, Addr = 0, count = 0, temp = 0;
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Addr = WriteAddr % sFLASH_SPI_PAGESIZE;
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count = sFLASH_SPI_PAGESIZE - Addr;
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NumOfPage = NumByteToWrite / sFLASH_SPI_PAGESIZE;
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NumOfSingle = NumByteToWrite % sFLASH_SPI_PAGESIZE;
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if (Addr == 0) /*!< WriteAddr is sFLASH_PAGESIZE aligned */
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{
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if (NumOfPage == 0) /*!< NumByteToWrite < sFLASH_PAGESIZE */
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{
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sFLASH_WritePage(pBuffer, WriteAddr, NumByteToWrite);
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}
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else /*!< NumByteToWrite > sFLASH_PAGESIZE */
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{
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while (NumOfPage--)
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{
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sFLASH_WritePage(pBuffer, WriteAddr, sFLASH_SPI_PAGESIZE);
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WriteAddr += sFLASH_SPI_PAGESIZE;
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pBuffer += sFLASH_SPI_PAGESIZE;
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}
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sFLASH_WritePage(pBuffer, WriteAddr, NumOfSingle);
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}
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}
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else /*!< WriteAddr is not sFLASH_PAGESIZE aligned */
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{
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if (NumOfPage == 0) /*!< NumByteToWrite < sFLASH_PAGESIZE */
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{
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if (NumOfSingle > count) /*!< (NumByteToWrite + WriteAddr) > sFLASH_PAGESIZE */
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{
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temp = NumOfSingle - count;
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sFLASH_WritePage(pBuffer, WriteAddr, count);
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WriteAddr += count;
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pBuffer += count;
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sFLASH_WritePage(pBuffer, WriteAddr, temp);
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}
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else
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{
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sFLASH_WritePage(pBuffer, WriteAddr, NumByteToWrite);
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}
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}
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else /*!< NumByteToWrite > sFLASH_PAGESIZE */
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{
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NumByteToWrite -= count;
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NumOfPage = NumByteToWrite / sFLASH_SPI_PAGESIZE;
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NumOfSingle = NumByteToWrite % sFLASH_SPI_PAGESIZE;
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sFLASH_WritePage(pBuffer, WriteAddr, count);
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WriteAddr += count;
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pBuffer += count;
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while (NumOfPage--)
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{
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sFLASH_WritePage(pBuffer, WriteAddr, sFLASH_SPI_PAGESIZE);
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WriteAddr += sFLASH_SPI_PAGESIZE;
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pBuffer += sFLASH_SPI_PAGESIZE;
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}
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if (NumOfSingle != 0)
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{
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sFLASH_WritePage(pBuffer, WriteAddr, NumOfSingle);
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}
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}
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}
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2025-07-05 19:47:28 +08:00
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//ʹ<><CAB9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֹ<EFBFBD><D6B9><EFBFBD><EFBFBD>
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2025-06-27 00:32:57 +08:00
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sFLASH_EXIT_USED();
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}
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/**
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* @brief Reads a block of data from the FLASH.
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* @param pBuffer: pointer to the buffer that receives the data read from the FLASH.
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* @param ReadAddr: FLASH's internal address to read from.
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* @param NumByteToRead: number of bytes to read from the FLASH.
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* @retval None
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*/
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void sFLASH_ReadBuffer(uint8_t* pBuffer, uint32_t ReadAddr, uint32_t NumByteToRead)
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{
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2025-07-05 19:47:28 +08:00
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//ʹ<><CAB9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֹ<EFBFBD><D6B9><EFBFBD><EFBFBD>
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2025-06-27 00:32:57 +08:00
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sFLASH_ENTER_USED();
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/*!< Select the FLASH: Chip Select low */
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sFLASH_CS_LOW();
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/*!< Send "Read from Memory " instruction */
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sFLASH_SendByte(sFLASH_CMD_READ);
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/*!< Send ReadAddr high nibble address byte to read from */
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sFLASH_SendByte((ReadAddr & 0xFF0000) >> 16);
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/*!< Send ReadAddr medium nibble address byte to read from */
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sFLASH_SendByte((ReadAddr& 0xFF00) >> 8);
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/*!< Send ReadAddr low nibble address byte to read from */
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sFLASH_SendByte(ReadAddr & 0xFF);
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while (NumByteToRead--) /*!< while there is data to be read */
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{
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/*!< Read a byte from the FLASH */
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*pBuffer = sFLASH_SendByte(sFLASH_DUMMY_BYTE);
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/*!< Point to the next location where the byte read will be saved */
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pBuffer++;
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}
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/*!< Deselect the FLASH: Chip Select high */
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sFLASH_CS_HIGH();
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2025-07-05 19:47:28 +08:00
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//ʹ<><CAB9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֹ<EFBFBD><D6B9><EFBFBD><EFBFBD>
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2025-06-27 00:32:57 +08:00
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sFLASH_EXIT_USED();
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}
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/**
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* @brief Reads FLASH identification.
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* @param None
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* @retval FLASH identification
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*/
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uint32_t sFLASH_ReadID(void)
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{
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uint32_t Temp = 0, Temp0 = 0, Temp1 = 0, Temp2 = 0;
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/*!< Select the FLASH: Chip Select low */
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sFLASH_CS_LOW();
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/*!< Send "RDID " instruction */
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sFLASH_SendByte(0x9F);
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/*!< Read a byte from the FLASH */
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Temp0 = sFLASH_SendByte(sFLASH_DUMMY_BYTE);
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/*!< Read a byte from the FLASH */
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Temp1 = sFLASH_SendByte(sFLASH_DUMMY_BYTE);
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/*!< Read a byte from the FLASH */
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Temp2 = sFLASH_SendByte(sFLASH_DUMMY_BYTE);
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/*!< Deselect the FLASH: Chip Select high */
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sFLASH_CS_HIGH();
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Temp = (Temp0 << 16) | (Temp1 << 8) | Temp2;
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return Temp;
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}
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/**
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* @brief Initiates a read data byte (READ) sequence from the Flash.
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* This is done by driving the /CS line low to select the device, then the READ
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* instruction is transmitted followed by 3 bytes address. This function exit
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* and keep the /CS line low, so the Flash still being selected. With this
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* technique the whole content of the Flash is read with a single READ instruction.
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* @param ReadAddr: FLASH's internal address to read from.
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* @retval None
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*/
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void sFLASH_StartReadSequence(uint32_t ReadAddr)
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{
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/*!< Select the FLASH: Chip Select low */
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sFLASH_CS_LOW();
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/*!< Send "Read from Memory " instruction */
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sFLASH_SendByte(sFLASH_CMD_READ);
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/*!< Send the 24-bit address of the address to read from -------------------*/
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/*!< Send ReadAddr high nibble address byte */
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sFLASH_SendByte((ReadAddr & 0xFF0000) >> 16);
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/*!< Send ReadAddr medium nibble address byte */
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sFLASH_SendByte((ReadAddr& 0xFF00) >> 8);
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/*!< Send ReadAddr low nibble address byte */
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sFLASH_SendByte(ReadAddr & 0xFF);
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}
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/**
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* @brief Reads a byte from the SPI Flash.
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* @note This function must be used only if the Start_Read_Sequence function
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* has been previously called.
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* @param None
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* @retval Byte Read from the SPI Flash.
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*/
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uint8_t sFLASH_ReadByte(void)
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{
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return (sFLASH_SendByte(sFLASH_DUMMY_BYTE));
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}
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/**
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* @brief Sends a byte through the SPI interface and return the byte received
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* from the SPI bus.
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* @param byte: byte to send.
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* @retval The value of the received byte.
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*/
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uint8_t sFLASH_SendByte(uint8_t byte)
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{
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/*!< Loop while DR register in not empty */
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while (SPI_I2S_GetFlagStatus(sFLASH_SPI, SPI_I2S_FLAG_TXE) == RESET);
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/*!< Send byte through the SPI1 peripheral */
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SPI_I2S_SendData(sFLASH_SPI, byte);
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/*!< Wait to receive a byte */
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while (SPI_I2S_GetFlagStatus(sFLASH_SPI, SPI_I2S_FLAG_RXNE) == RESET);
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/*!< Return the byte read from the SPI bus */
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return SPI_I2S_ReceiveData(sFLASH_SPI);
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}
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/**
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* @brief Sends a Half Word through the SPI interface and return the Half Word
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* received from the SPI bus.
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* @param HalfWord: Half Word to send.
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* @retval The value of the received Half Word.
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*/
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uint16_t sFLASH_SendHalfWord(uint16_t HalfWord)
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{
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/*!< Loop while DR register in not empty */
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while (SPI_I2S_GetFlagStatus(sFLASH_SPI, SPI_I2S_FLAG_TXE) == RESET);
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/*!< Send Half Word through the sFLASH peripheral */
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SPI_I2S_SendData(sFLASH_SPI, HalfWord);
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/*!< Wait to receive a Half Word */
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while (SPI_I2S_GetFlagStatus(sFLASH_SPI, SPI_I2S_FLAG_RXNE) == RESET);
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/*!< Return the Half Word read from the SPI bus */
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return SPI_I2S_ReceiveData(sFLASH_SPI);
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}
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/**
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* @brief Enables the write access to the FLASH.
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* @param None
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* @retval None
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*/
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void sFLASH_WriteEnable(void)
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{
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/*!< Select the FLASH: Chip Select low */
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sFLASH_CS_LOW();
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/*!< Send "Write Enable" instruction */
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sFLASH_SendByte(sFLASH_CMD_WREN);
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/*!< Deselect the FLASH: Chip Select high */
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sFLASH_CS_HIGH();
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}
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/**
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* @brief Polls the status of the Write In Progress (WIP) flag in the FLASH's
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* status register and loop until write operation has completed.
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* @param None
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* @retval None
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*/
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void sFLASH_WaitForWriteEnd(void)
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{
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uint8_t flashstatus = 0;
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/*!< Select the FLASH: Chip Select low */
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sFLASH_CS_LOW();
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/*!< Send "Read Status Register" instruction */
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sFLASH_SendByte(sFLASH_CMD_RDSR);
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/*!< Loop as long as the memory is busy with a write cycle */
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do
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{
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/*!< Send a dummy byte to generate the clock needed by the FLASH
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and put the value of the status register in FLASH_Status variable */
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flashstatus = sFLASH_SendByte(sFLASH_DUMMY_BYTE);
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}
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while ((flashstatus & sFLASH_WIP_FLAG) == SET); /* Write in progress */
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/*!< Deselect the FLASH: Chip Select high */
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sFLASH_CS_HIGH();
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}
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/**
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* @brief Initializes the peripherals used by the SPI FLASH driver.
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* @param None
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* @retval None
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*/
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void sFLASH_LowLevel_Init(void)
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{
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GPIO_InitTypeDef GPIO_InitStructure;
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/*!< Enable the SPI clock */
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sFLASH_SPI_CLK_INIT(sFLASH_SPI_CLK, ENABLE);
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/*!< Enable GPIO clocks */
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RCC_AHB1PeriphClockCmd(sFLASH_SPI_SCK_GPIO_CLK | sFLASH_SPI_MISO_GPIO_CLK |
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sFLASH_SPI_MOSI_GPIO_CLK | sFLASH_CS_GPIO_CLK, ENABLE);
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/*!< SPI pins configuration *************************************************/
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/*!< Connect SPI pins to AF5 */
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GPIO_PinAFConfig(sFLASH_SPI_SCK_GPIO_PORT, sFLASH_SPI_SCK_SOURCE, sFLASH_SPI_SCK_AF);
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GPIO_PinAFConfig(sFLASH_SPI_MISO_GPIO_PORT, sFLASH_SPI_MISO_SOURCE, sFLASH_SPI_MISO_AF);
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GPIO_PinAFConfig(sFLASH_SPI_MOSI_GPIO_PORT, sFLASH_SPI_MOSI_SOURCE, sFLASH_SPI_MOSI_AF);
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
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GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
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GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
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GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_DOWN;
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/*!< SPI SCK pin configuration */
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GPIO_InitStructure.GPIO_Pin = sFLASH_SPI_SCK_PIN;
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GPIO_Init(sFLASH_SPI_SCK_GPIO_PORT, &GPIO_InitStructure);
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/*!< SPI MOSI pin configuration */
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GPIO_InitStructure.GPIO_Pin = sFLASH_SPI_MOSI_PIN;
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GPIO_Init(sFLASH_SPI_MOSI_GPIO_PORT, &GPIO_InitStructure);
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/*!< SPI MISO pin configuration */
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GPIO_InitStructure.GPIO_Pin = sFLASH_SPI_MISO_PIN;
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GPIO_Init(sFLASH_SPI_MISO_GPIO_PORT, &GPIO_InitStructure);
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/*!< Configure sFLASH Card CS pin in output pushpull mode ********************/
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GPIO_InitStructure.GPIO_Pin = sFLASH_CS_PIN;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT;
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GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
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GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
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GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
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GPIO_Init(sFLASH_CS_GPIO_PORT, &GPIO_InitStructure);
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}
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/**
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* @brief DeInitializes the peripherals used by the SPI FLASH driver.
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* @param None
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* @retval None
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*/
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void sFLASH_LowLevel_DeInit(void)
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{
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GPIO_InitTypeDef GPIO_InitStructure;
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/*!< Disable the sFLASH_SPI ************************************************/
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SPI_Cmd(sFLASH_SPI, DISABLE);
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/*!< DeInitializes the sFLASH_SPI *******************************************/
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SPI_I2S_DeInit(sFLASH_SPI);
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/*!< sFLASH_SPI Periph clock disable ****************************************/
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sFLASH_SPI_CLK_INIT(sFLASH_SPI_CLK, DISABLE);
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/*!< Configure all pins used by the SPI as input floating *******************/
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN;
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GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
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GPIO_InitStructure.GPIO_Pin = sFLASH_SPI_SCK_PIN;
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GPIO_Init(sFLASH_SPI_SCK_GPIO_PORT, &GPIO_InitStructure);
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GPIO_InitStructure.GPIO_Pin = sFLASH_SPI_MISO_PIN;
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GPIO_Init(sFLASH_SPI_MISO_GPIO_PORT, &GPIO_InitStructure);
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GPIO_InitStructure.GPIO_Pin = sFLASH_SPI_MOSI_PIN;
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GPIO_Init(sFLASH_SPI_MOSI_GPIO_PORT, &GPIO_InitStructure);
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GPIO_InitStructure.GPIO_Pin = sFLASH_CS_PIN;
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GPIO_Init(sFLASH_CS_GPIO_PORT, &GPIO_InitStructure);
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}
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/**
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* @}
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*/
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/**
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* @}
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*/
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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