2025-06-27 00:32:57 +08:00
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#ifndef __NES_MAPPER_H
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#define __NES_MAPPER_H
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//////////////////////////////////////////////////////////////////////////////////
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2025-07-05 19:47:28 +08:00
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//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֲ<EFBFBD><D6B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ye781205<30><35>NESģ<53><C4A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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//ALIENTEK STM32F407<30><37><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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//NES MAP <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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//<2F><><EFBFBD><EFBFBD>ԭ<EFBFBD><D4AD>@ALIENTEK
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//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>̳:www.openedv.com
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//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:2014/7/1
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//<2F>汾<EFBFBD><E6B1BE>V1.0
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2025-06-27 00:32:57 +08:00
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//////////////////////////////////////////////////////////////////////////////////
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#ifndef uint16
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#define uint16 u16
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#define uint8 u8
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#define uint32 u32
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#endif
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#define num_8k_ROM_banks VROM_8K_SIZE
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#define num_1k_VROM_banks VROM_1K_SIZE
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//////////////////////////////////////////////////////////////////////////////////
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typedef struct
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{
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void (*Reset)();
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void (*Write)( uint16 addr,uint8 data);
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void (*Read)( uint8 data,uint16 addr);
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uint8 (*ReadLow)( uint16 addr);
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void (*WriteLow)(uint16 addr,uint8 data);
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void (*HSync)( int scanline);
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void (*VSync)(void);
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} MAPPER;
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///////////////////////////////////////////////////////////////
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typedef enum
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{
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MMC1_SMALL,
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MMC1_512K,
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MMC1_1024K
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}MMC1_Size_t;
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typedef struct
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{
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uint32 write_count;
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uint8 bits;
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uint8 regs[4];
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uint32 last_write_addr;
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MMC1_Size_t MMC1_Size;
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uint32 MMC1_256K_base;
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uint32 MMC1_swap;
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// these are the 4 ROM banks currently selected
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uint32 MMC1_bank1;
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uint32 MMC1_bank2;
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uint32 MMC1_bank3;
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uint32 MMC1_bank4;
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uint32 MMC1_HI1;
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uint32 MMC1_HI2;
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}Mapper1Res;
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2025-07-05 19:47:28 +08:00
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//ͨ<><CDA8>map<61><70><EFBFBD><EFBFBD><EFBFBD>ṹ<EFBFBD><E1B9B9>
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2025-06-27 00:32:57 +08:00
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typedef struct
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{
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uint8 patch;
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uint8 regs[11];
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uint32 prg0,prg1;
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uint32 chr01,chr23,chr4,chr5,chr6,chr7;
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uint8 irq_enabled; // IRQs enabled
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uint32 irq_counter; // IRQ scanline counter, decreasing
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uint32 irq_latch; // IRQ scanline counter latch
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}MapperCommRes;
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extern uint32 ROM_mask;
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extern uint32 VROM_mask;
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extern const int MapTab[];
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extern MAPPER *NES_Mapper;
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extern uint32 VROM_mask;
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extern Mapper1Res *MAP1;
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extern MapperCommRes *MAPx;
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//////////////////////////////////////////////////////////////////////////////////
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void Mapper_Init(void);
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void asm_Mapper_Write(uint8 byData,uint16 wAddr);
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void asm_Mapper_ReadLow( uint16 wAddr);
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void asm_Mapper_WriteLow( uint8 byData ,uint16 wAddr);
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void map67_(signed char page); //6502.s
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void map89_(signed char page);
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void mapAB_(signed char page);
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void mapCD_(signed char page);
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2025-07-05 19:47:28 +08:00
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void mapEF_(signed char page);//<2F>з<EFBFBD><D0B7><EFBFBD><EFBFBD>ַ<EFBFBD>
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2025-06-27 00:32:57 +08:00
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void set_CPU_bank3(signed char page );
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void set_CPU_bank4(signed char page );
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void set_CPU_bank5(signed char page );
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void set_CPU_bank6(signed char page );
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void set_CPU_bank7(signed char page );
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void set_CPU_banks(int bank0_num,int bank1_num,int bank2_num, int bank3_num);
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void set_PPU_banks( uint32 bank0_num, uint32 bank1_num,
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uint32 bank2_num, uint32 bank3_num,
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uint32 bank4_num, uint32 bank5_num,
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uint32 bank6_num, uint32 bank7_num);
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void set_PPU_bank0(uint32 bank_num);
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void set_PPU_bank1(uint32 bank_num);
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void set_PPU_bank2(uint32 bank_num);
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void set_PPU_bank3(uint32 bank_num);
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void set_PPU_bank4(uint32 bank_num);
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void set_PPU_bank5(uint32 bank_num);
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void set_PPU_bank6(uint32 bank_num);
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void set_PPU_bank7(uint32 bank_num);
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void set_PPU_bank8(uint32 bank_num);
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void set_PPU_bank9(uint32 bank_num);
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void set_PPU_bank10(uint32 bank_num);
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void set_PPU_bank11(uint32 bank_num);
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void set_VRAM_bank(uint8 bank, uint32 bank_num);
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#endif
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