394 lines
12 KiB
C
394 lines
12 KiB
C
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/*
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* Copyright (c) 2006-2018, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2011-12-16 aozima the first version
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* 2012-05-06 aozima can page write.
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* 2012-08-23 aozima add flash lock.
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* 2012-08-24 aozima fixed write status register BUG.
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*/
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#include <stdint.h>
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#include <rtdevice.h>
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#include "spi_flash.h"
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#include "spi_flash_w25qxx.h"
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#define FLASH_DEBUG
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#ifdef FLASH_DEBUG
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#define FLASH_TRACE rt_kprintf
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#else
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#define FLASH_TRACE(...)
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#endif /* #ifdef FLASH_DEBUG */
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#define PAGE_SIZE 4096
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/* JEDEC Manufacturer ID */
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#define MF_ID (0xEF)
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/* JEDEC Device ID: Memory type and Capacity */
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#define MTC_W25Q80_BV (0x4014) /* W25Q80BV */
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#define MTC_W25Q16_BV_CL_CV (0x4015) /* W25Q16BV W25Q16CL W25Q16CV */
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#define MTC_W25Q16_DW (0x6015) /* W25Q16DW */
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#define MTC_W25Q32_BV (0x4016) /* W25Q32BV */
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#define MTC_W25Q32_DW (0x6016) /* W25Q32DW */
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#define MTC_W25Q64_BV_CV (0x4017) /* W25Q64BV W25Q64CV */
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#define MTC_W25Q64_DW (0x4017) /* W25Q64DW */
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#define MTC_W25Q128_BV (0x4018) /* W25Q128BV */
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#define MTC_W25Q256_FV (TBD) /* W25Q256FV */
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/* command list */
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#define CMD_WRSR (0x01) /* Write Status Register */
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#define CMD_PP (0x02) /* Page Program */
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#define CMD_READ (0x03) /* Read Data */
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#define CMD_WRDI (0x04) /* Write Disable */
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#define CMD_RDSR1 (0x05) /* Read Status Register-1 */
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#define CMD_WREN (0x06) /* Write Enable */
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#define CMD_FAST_READ (0x0B) /* Fast Read */
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#define CMD_ERASE_4K (0x20) /* Sector Erase:4K */
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#define CMD_RDSR2 (0x35) /* Read Status Register-2 */
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#define CMD_ERASE_32K (0x52) /* 32KB Block Erase */
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#define CMD_JEDEC_ID (0x9F) /* Read JEDEC ID */
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#define CMD_ERASE_full (0xC7) /* Chip Erase */
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#define CMD_ERASE_64K (0xD8) /* 64KB Block Erase */
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#define DUMMY (0xFF)
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static struct spi_flash_device spi_flash_device;
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static void flash_lock(struct spi_flash_device * flash_device)
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{
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rt_mutex_take(&flash_device->lock, RT_WAITING_FOREVER);
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}
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static void flash_unlock(struct spi_flash_device * flash_device)
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{
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rt_mutex_release(&flash_device->lock);
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}
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static uint8_t w25qxx_read_status(void)
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{
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return rt_spi_sendrecv8(spi_flash_device.rt_spi_device, CMD_RDSR1);
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}
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static void w25qxx_wait_busy(void)
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{
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while( w25qxx_read_status() & (0x01));
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}
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/** \brief read [size] byte from [offset] to [buffer]
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*
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* \param offset uint32_t unit : byte
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* \param buffer uint8_t*
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* \param size uint32_t unit : byte
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* \return uint32_t byte for read
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*
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*/
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static uint32_t w25qxx_read(uint32_t offset, uint8_t * buffer, uint32_t size)
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{
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uint8_t send_buffer[4];
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send_buffer[0] = CMD_WRDI;
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rt_spi_send(spi_flash_device.rt_spi_device, send_buffer, 1);
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send_buffer[0] = CMD_READ;
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send_buffer[1] = (uint8_t)(offset>>16);
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send_buffer[2] = (uint8_t)(offset>>8);
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send_buffer[3] = (uint8_t)(offset);
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rt_spi_send_then_recv(spi_flash_device.rt_spi_device,
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send_buffer, 4,
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buffer, size);
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return size;
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}
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/** \brief write N page on [page]
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*
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* \param page_addr uint32_t unit : byte (4096 * N,1 page = 4096byte)
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* \param buffer const uint8_t*
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* \return uint32_t
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*
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*/
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uint32_t w25qxx_page_write(uint32_t page_addr, const uint8_t* buffer)
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{
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uint32_t index;
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uint8_t send_buffer[4];
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RT_ASSERT((page_addr&0xFF) == 0); /* page addr must align to 256byte. */
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send_buffer[0] = CMD_WREN;
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rt_spi_send(spi_flash_device.rt_spi_device, send_buffer, 1);
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send_buffer[0] = CMD_ERASE_4K;
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send_buffer[1] = (page_addr >> 16);
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send_buffer[2] = (page_addr >> 8);
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send_buffer[3] = (page_addr);
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rt_spi_send(spi_flash_device.rt_spi_device, send_buffer, 4);
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w25qxx_wait_busy(); // wait erase done.
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for(index=0; index < (PAGE_SIZE / 256); index++)
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{
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send_buffer[0] = CMD_WREN;
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rt_spi_send(spi_flash_device.rt_spi_device, send_buffer, 1);
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send_buffer[0] = CMD_PP;
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send_buffer[1] = (uint8_t)(page_addr >> 16);
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send_buffer[2] = (uint8_t)(page_addr >> 8);
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send_buffer[3] = (uint8_t)(page_addr);
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rt_spi_send_then_send(spi_flash_device.rt_spi_device,
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send_buffer,
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4,
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buffer,
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256);
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buffer += 256;
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page_addr += 256;
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w25qxx_wait_busy();
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}
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send_buffer[0] = CMD_WRDI;
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rt_spi_send(spi_flash_device.rt_spi_device, send_buffer, 1);
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return PAGE_SIZE;
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}
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/* RT-Thread device interface */
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static rt_err_t w25qxx_flash_init(rt_device_t dev)
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{
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return RT_EOK;
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}
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static rt_err_t w25qxx_flash_open(rt_device_t dev, rt_uint16_t oflag)
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{
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uint8_t send_buffer[3];
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flash_lock((struct spi_flash_device *)dev);
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send_buffer[0] = CMD_WREN;
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rt_spi_send(spi_flash_device.rt_spi_device, send_buffer, 1);
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send_buffer[0] = CMD_WRSR;
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send_buffer[1] = 0;
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send_buffer[2] = 0;
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rt_spi_send(spi_flash_device.rt_spi_device, send_buffer, 3);
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w25qxx_wait_busy();
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flash_unlock((struct spi_flash_device *)dev);
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return RT_EOK;
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}
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static rt_err_t w25qxx_flash_close(rt_device_t dev)
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{
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return RT_EOK;
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}
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static rt_err_t w25qxx_flash_control(rt_device_t dev, int cmd, void *args)
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{
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RT_ASSERT(dev != RT_NULL);
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if (cmd == RT_DEVICE_CTRL_BLK_GETGEOME)
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{
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struct rt_device_blk_geometry *geometry;
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geometry = (struct rt_device_blk_geometry *)args;
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if (geometry == RT_NULL) return -RT_ERROR;
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geometry->bytes_per_sector = spi_flash_device.geometry.bytes_per_sector;
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geometry->sector_count = spi_flash_device.geometry.sector_count;
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geometry->block_size = spi_flash_device.geometry.block_size;
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}
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return RT_EOK;
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}
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static rt_size_t w25qxx_flash_read(rt_device_t dev,
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rt_off_t pos,
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void* buffer,
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rt_size_t size)
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{
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flash_lock((struct spi_flash_device *)dev);
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w25qxx_read(pos*spi_flash_device.geometry.bytes_per_sector,
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buffer,
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size*spi_flash_device.geometry.bytes_per_sector);
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flash_unlock((struct spi_flash_device *)dev);
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return size;
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}
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static rt_size_t w25qxx_flash_write(rt_device_t dev,
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rt_off_t pos,
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const void* buffer,
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rt_size_t size)
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{
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rt_size_t i = 0;
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rt_size_t block = size;
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const uint8_t * ptr = buffer;
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flash_lock((struct spi_flash_device *)dev);
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while(block--)
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{
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w25qxx_page_write((pos + i)*spi_flash_device.geometry.bytes_per_sector,
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ptr);
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ptr += PAGE_SIZE;
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i++;
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}
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flash_unlock((struct spi_flash_device *)dev);
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return size;
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}
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#ifdef RT_USING_DEVICE_OPS
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const static struct rt_device_ops w25qxx_device_ops =
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{
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w25qxx_flash_init,
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w25qxx_flash_open,
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w25qxx_flash_close,
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w25qxx_flash_read,
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w25qxx_flash_write,
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w25qxx_flash_control
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};
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#endif
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rt_err_t w25qxx_init(const char * flash_device_name, const char * spi_device_name)
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{
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struct rt_spi_device * rt_spi_device;
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/* initialize mutex */
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if (rt_mutex_init(&spi_flash_device.lock, spi_device_name, RT_IPC_FLAG_FIFO) != RT_EOK)
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{
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rt_kprintf("init sd lock mutex failed\n");
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return -RT_ENOSYS;
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}
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rt_spi_device = (struct rt_spi_device *)rt_device_find(spi_device_name);
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if(rt_spi_device == RT_NULL)
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{
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FLASH_TRACE("spi device %s not found!\r\n", spi_device_name);
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return -RT_ENOSYS;
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}
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spi_flash_device.rt_spi_device = rt_spi_device;
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/* config spi */
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{
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struct rt_spi_configuration cfg;
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cfg.data_width = 8;
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cfg.mode = RT_SPI_MODE_0 | RT_SPI_MSB; /* SPI Compatible: Mode 0 and Mode 3 */
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cfg.max_hz = 50 * 1000 * 1000; /* 50M */
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rt_spi_configure(spi_flash_device.rt_spi_device, &cfg);
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}
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/* init flash */
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{
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rt_uint8_t cmd;
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rt_uint8_t id_recv[3];
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uint16_t memory_type_capacity;
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flash_lock(&spi_flash_device);
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cmd = 0xFF; /* reset SPI FLASH, cancel all cmd in processing. */
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rt_spi_send(spi_flash_device.rt_spi_device, &cmd, 1);
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cmd = CMD_WRDI;
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rt_spi_send(spi_flash_device.rt_spi_device, &cmd, 1);
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/* read flash id */
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cmd = CMD_JEDEC_ID;
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rt_spi_send_then_recv(spi_flash_device.rt_spi_device, &cmd, 1, id_recv, 3);
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flash_unlock(&spi_flash_device);
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if(id_recv[0] != MF_ID)
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{
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FLASH_TRACE("Manufacturers ID error!\r\n");
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FLASH_TRACE("JEDEC Read-ID Data : %02X %02X %02X\r\n", id_recv[0], id_recv[1], id_recv[2]);
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return -RT_ENOSYS;
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}
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spi_flash_device.geometry.bytes_per_sector = 4096;
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spi_flash_device.geometry.block_size = 4096; /* block erase: 4k */
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/* get memory type and capacity */
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memory_type_capacity = id_recv[1];
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memory_type_capacity = (memory_type_capacity << 8) | id_recv[2];
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if(memory_type_capacity == MTC_W25Q128_BV)
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{
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FLASH_TRACE("W25Q128BV detection\r\n");
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spi_flash_device.geometry.sector_count = 4096;
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}
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else if(memory_type_capacity == MTC_W25Q64_BV_CV)
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{
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FLASH_TRACE("W25Q64BV or W25Q64CV detection\r\n");
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spi_flash_device.geometry.sector_count = 2048;
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}
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else if(memory_type_capacity == MTC_W25Q64_DW)
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{
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FLASH_TRACE("W25Q64DW detection\r\n");
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spi_flash_device.geometry.sector_count = 2048;
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}
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else if(memory_type_capacity == MTC_W25Q32_BV)
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{
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FLASH_TRACE("W25Q32BV detection\r\n");
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spi_flash_device.geometry.sector_count = 1024;
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}
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else if(memory_type_capacity == MTC_W25Q32_DW)
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{
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FLASH_TRACE("W25Q32DW detection\r\n");
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spi_flash_device.geometry.sector_count = 1024;
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}
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else if(memory_type_capacity == MTC_W25Q16_BV_CL_CV)
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{
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FLASH_TRACE("W25Q16BV or W25Q16CL or W25Q16CV detection\r\n");
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spi_flash_device.geometry.sector_count = 512;
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}
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else if(memory_type_capacity == MTC_W25Q16_DW)
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|
|
{
|
||
|
|
FLASH_TRACE("W25Q16DW detection\r\n");
|
||
|
|
spi_flash_device.geometry.sector_count = 512;
|
||
|
|
}
|
||
|
|
else if(memory_type_capacity == MTC_W25Q80_BV)
|
||
|
|
{
|
||
|
|
FLASH_TRACE("W25Q80BV detection\r\n");
|
||
|
|
spi_flash_device.geometry.sector_count = 256;
|
||
|
|
}
|
||
|
|
else
|
||
|
|
{
|
||
|
|
FLASH_TRACE("Memory Capacity error!\r\n");
|
||
|
|
return -RT_ENOSYS;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
/* register device */
|
||
|
|
spi_flash_device.flash_device.type = RT_Device_Class_Block;
|
||
|
|
#ifdef RT_USING_DEVICE_OPS
|
||
|
|
spi_flash_device.flash_device.ops = &w25qxx_device_ops;
|
||
|
|
#else
|
||
|
|
spi_flash_device.flash_device.init = w25qxx_flash_init;
|
||
|
|
spi_flash_device.flash_device.open = w25qxx_flash_open;
|
||
|
|
spi_flash_device.flash_device.close = w25qxx_flash_close;
|
||
|
|
spi_flash_device.flash_device.read = w25qxx_flash_read;
|
||
|
|
spi_flash_device.flash_device.write = w25qxx_flash_write;
|
||
|
|
spi_flash_device.flash_device.control = w25qxx_flash_control;
|
||
|
|
#endif
|
||
|
|
/* no private */
|
||
|
|
spi_flash_device.flash_device.user_data = RT_NULL;
|
||
|
|
|
||
|
|
rt_device_register(&spi_flash_device.flash_device, flash_device_name,
|
||
|
|
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_STANDALONE);
|
||
|
|
|
||
|
|
return RT_EOK;
|
||
|
|
}
|