gcc版的nes汇编还是有问题

6502_a.s是armcc编译出来的,用于对比调试
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2025-07-09 00:14:03 +08:00
parent 9d0c9708f8
commit 403b03e115
2 changed files with 117 additions and 119 deletions

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Project/6502_a.s Normal file

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@@ -19,38 +19,37 @@
// <EFBFBD><EFBFBD><EFBFBD><EFBFBD> 6502 <EFBFBD><EFBFBD>־<EFBFBD><EFBFBD> r0 // <EFBFBD><EFBFBD><EFBFBD><EFBFBD> 6502 <EFBFBD><EFBFBD>־<EFBFBD><EFBFBD> r0
.macro encodeP extra .macro encodeP extra
and r0, r8, #0x4F // CYC_V+CYC_D+CYC_I+CYC_C and r0, cycles, #CYC_V+CYC_D+CYC_I+CYC_C // CYC_V+CYC_D+CYC_I+CYC_C
tst r3, #0x80000000 // PSR_N tst m6502_nz, #0x80000000 // PSR_N
IT NE IT NE
orrne r0, r0, #N // <EFBFBD><EFBFBD><EFBFBD><EFBFBD> N <EFBFBD><EFBFBD>־ orrne r0, r0, #N // <EFBFBD><EFBFBD><EFBFBD><EFBFBD> N <EFBFBD><EFBFBD>־
tst r3, #0xFF // Z <EFBFBD><EFBFBD>־
tst m6502_nz, #0xFF // Z <EFBFBD><EFBFBD>־
IT EQ IT EQ
orreq r0, r0, #Z // <EFBFBD><EFBFBD><EFBFBD><EFBFBD> Z <EFBFBD><EFBFBD>־ orreq r0, r0, #Z // <EFBFBD><EFBFBD><EFBFBD><EFBFBD> Z <EFBFBD><EFBFBD>־
orr r0, r0, \extra // <EFBFBD><EFBFBD><EFBFBD>Ӷ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־ (B/R) orr r0, r0, #\extra // <EFBFBD><EFBFBD><EFBFBD>Ӷ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־ (B/R)
.endm .endm
// <EFBFBD><EFBFBD><EFBFBD><EFBFBD> r0 <EFBFBD>е<EFBFBD> 6502 <EFBFBD><EFBFBD>־ // <EFBFBD><EFBFBD><EFBFBD><EFBFBD> r0 <EFBFBD>е<EFBFBD> 6502 <EFBFBD><EFBFBD>־
.macro decodeP .macro decodeP
bic r8, r8, #0x4F // <EFBFBD><EFBFBD><EFBFBD><EFBFBD> CYC_V+CYC_D+CYC_I+CYC_C bic cycles,cycles,#CYC_V+CYC_D+CYC_I+CYC_C // <EFBFBD><EFBFBD><EFBFBD><EFBFBD> CYC_V+CYC_D+CYC_I+CYC_C
and r1, r0, #V+D+I+C // <EFBFBD><EFBFBD>ȡ V/D/I/C <EFBFBD><EFBFBD>־ and r1, r0, #V+D+I+C // <EFBFBD><EFBFBD>ȡ V/D/I/C <EFBFBD><EFBFBD>־
orr r8, r8, r1 // д<EFBFBD><EFBFBD> cycles orr cycles,cycles,r1 // д<EFBFBD><EFBFBD> cycles
bic r3, r0, #0xFD // r0 is signed bic m6502_nz, r0, #0xFD // r0 is signed
eor r3, r3, #Z // <EFBFBD><EFBFBD>ת Z λ eor m6502_nz, m6502_nz, #Z // <EFBFBD><EFBFBD>ת Z λ
.endm .endm
// <EFBFBD><EFBFBD>ȡ<EFBFBD><EFBFBD>һ<EFBFBD><EFBFBD>ָ<EFBFBD>ִ<EFBFBD><EFBFBD> // <EFBFBD><EFBFBD>ȡ<EFBFBD><EFBFBD>һ<EFBFBD><EFBFBD>ָ<EFBFBD>ִ<EFBFBD><EFBFBD>
.macro fetch count .macro fetch count
ldr r0, [globalptr,#clocksh] ldr r0, [r10,#clocksh]
add r0, r0, \count add r0, r0, \count
str r0, [globalptr,#clocksh] str r0, [globalptr,#clocksh]
ldr r1, [globalptr,#opz] ldr r1, [globalptr,#opz]
subs r8, r8, \count * 256 subs cycles, cycles, \count*256
IT PL ITT PL
ldrbpl r0, [r9], #1 ldrbpl r0, [m6502_pc], #1
IT PL
ldrpl pc, [r1, r0, lsl #2] ldrpl pc, [r1, r0, lsl #2]
ldr pc, [globalptr,#nexttimeout] ldr pc, [globalptr,#nexttimeout]
@@ -63,12 +62,10 @@
str r0, [globalptr,#clocksh] str r0, [globalptr,#clocksh]
ldr r1, [globalptr,#opz] ldr r1, [globalptr,#opz]
sbcs r8, r8, \count * 256 sbcs cycles, cycles, \count*256
IT PL ITT PL
ldrbpl r0, [r9], #1 ldrbpl r0, [m6502_pc], #1
IT PL
ldrpl pc, [r1, r0, lsl #2] ldrpl pc, [r1, r0, lsl #2]
ldr pc, [globalptr,#nexttimeout] ldr pc, [globalptr,#nexttimeout]
@@ -76,42 +73,42 @@
// <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ڱ<EFBFBD>־ // <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ڱ<EFBFBD>־
.macro clearcycles .macro clearcycles
and r8, r8, #0xFF // CYC_MASK and cycles,cycles,#CYC_MASK // CYC_MASK
.endm .endm
// <EFBFBD><EFBFBD><EFBFBD>Ե<EFBFBD>ַ<EFBFBD><EFBFBD>ȡ // <EFBFBD><EFBFBD><EFBFBD>Ե<EFBFBD>ַ<EFBFBD><EFBFBD>ȡ
.macro readmemabs .macro readmemabs
and r1, r12, #0xE000 and r1, addy, #0xE000
adr lr, 0f adr lr, 0f
lsr r1, r1, #11 lsr r1, r1, #11
ldr pc, [r4, r1] ldr pc, [m6502_rmem, r1]
0: 0:
.endm .endm
// <EFBFBD><EFBFBD>ҳ<EFBFBD><EFBFBD>ȡ // <EFBFBD><EFBFBD>ҳ<EFBFBD><EFBFBD>ȡ
.macro readmemzp .macro readmemzp
ldrb r0, [r11, r12] ldrb r0, [cpu_zpage, addy]
.endm .endm
// <EFBFBD><EFBFBD>ҳ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ<EFBFBD><EFBFBD> // <EFBFBD><EFBFBD>ҳ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ<EFBFBD><EFBFBD>
.macro readmemzpi .macro readmemzpi
lsr r0, r12, #24 lsr r0, addy, #24
ldrb r0, [r11, r0] ldrb r0, [cpu_zpage, r0]
.endm .endm
// RAM <EFBFBD><EFBFBD>ȡ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> NZ // RAM <EFBFBD><EFBFBD>ȡ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> NZ
.macro readmemzps .macro readmemzps
ldrsb r3, [r11, r12] ldrsb m6502_nz, [cpu_zpage,addy]
.endm .endm
// <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ // <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ
.macro readmemimm .macro readmemimm
ldrb r0, [r9], #1 ldrb r0, [m6502_pc], #1
.endm .endm
// <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> NZ // <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> NZ
.macro readmemimms .macro readmemimms
ldrsb r3, [r9], #1 ldrsb m6502_nz, [m6502_pc], #1
.endm .endm
// <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ѡ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ<EFBFBD><EFBFBD>ʽ // <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ѡ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ<EFBFBD><EFBFBD>ʽ
@@ -131,7 +128,7 @@
.macro readmems .macro readmems
.if _type == _ABS .if _type == _ABS
readmemabs readmemabs
orr r3, r0, r0, lsl #24 orr m6502_nz, r0, r0, lsl #24
.elseif _type == _ZP .elseif _type == _ZP
readmemzps readmemzps
.elseif _type == _IMM .elseif _type == _IMM
@@ -141,10 +138,11 @@
// <EFBFBD><EFBFBD><EFBFBD>Ե<EFBFBD>ַд<EFBFBD><EFBFBD> // <EFBFBD><EFBFBD><EFBFBD>Ե<EFBFBD>ַд<EFBFBD><EFBFBD>
.macro writememabs .macro writememabs
and r1, r12, #0xE000 and r1, addy, #0xE000
// adr r2, writemem_tbl @ ldr r2, =writemem_tbl
ldr r2, =writemem_tbl @ add r2, globalptr
add r2, r10 add r2, globalptr,#writemem_tbl
adr lr, 0f
lsr r1, r1, #11 lsr r1, r1, #11
ldr pc, [r2, r1] ldr pc, [r2, r1]
@@ -153,13 +151,13 @@
// <EFBFBD><EFBFBD>ҳд<EFBFBD><EFBFBD> // <EFBFBD><EFBFBD>ҳд<EFBFBD><EFBFBD>
.macro writememzp .macro writememzp
strb r0, [r11, r12] strb r0, [cpu_zpage,addy]
.endm .endm
// <EFBFBD><EFBFBD>ҳ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>д<EFBFBD><EFBFBD> // <EFBFBD><EFBFBD>ҳ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>д<EFBFBD><EFBFBD>
.macro writememzpi .macro writememzpi
lsr r1, r12, #24 lsr r1, addy, #24
strb r0, [r11, r1] strb r0, [cpu_zpage, r1]
.endm .endm
// <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ѡ<EFBFBD><EFBFBD>д<EFBFBD>ʽ // <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ѡ<EFBFBD><EFBFBD>д<EFBFBD>ʽ
@@ -198,8 +196,8 @@
ldr r2, [globalptr,#m6502_s] ldr r2, [globalptr,#m6502_s]
ldrb r0, [r2], #-1 ldrb r0, [r2], #-1
orr r2, r2, #0x100 orr r2, r2, #0x100
ldrb r9, [r2] ldrb m6502_pc, [r2]
orr r9, r9, r0, lsl #8 orr m6502_pc, m6502_pc, r0, lsl #8
.endm .endm
// 8λ<EFBFBD><EFBFBD>ջ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>չ<EFBFBD><EFBFBD> // 8λ<EFBFBD><EFBFBD>ջ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>չ<EFBFBD><EFBFBD>
@@ -208,7 +206,7 @@
add r2, r2, #1 add r2, r2, #1
strb r2, [globalptr,#m6502_s] strb r2, [globalptr,#m6502_s]
orr r2, r2, #0x100 orr r2, r2, #0x100
ldrsb \x, [r11, r2] ldrsb \x, [cpu_zpage, r2]
.endm .endm
// <EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ѱַģʽ<EFBFBD><EFBFBD><EFBFBD><EFBFBD> // <EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ѱַģʽ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
@@ -220,27 +218,27 @@
// <EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ѱַ // <EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ѱַ
.macro doABS .macro doABS
.set _type, _ABS .set _type, _ABS
ldrb r12, [r9], #1 ldrb addy, [m6502_pc], #1
ldrb r0, [r9], #1 ldrb r0, [m6502_pc], #1
orr r12, r12, r0, lsl #8 orr addy, addy, r0, lsl #8
.endm .endm
// X<EFBFBD>Ĵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> // X<EFBFBD>Ĵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
.macro doAIX .macro doAIX
.set _type, _ABS .set _type, _ABS
ldrb r12, [r9], #1 ldrb addy, [m6502_pc], #1
ldrb r0, [r9], #1 ldrb r0, [m6502_pc], #1
orr r12, r12, r0, lsl #8 orr addy, addy, r0, lsl #8
add r12, r12, r6, lsr #24 add addy, addy, m6502_x, lsr #24
.endm .endm
// Y<EFBFBD>Ĵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> // Y<EFBFBD>Ĵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
.macro doAIY .macro doAIY
.set _type, _ABS .set _type, _ABS
ldrb r12, [r9], #1 ldrb addy, [m6502_pc], #1
ldrb r0, [r9], #1 ldrb r0, [m6502_pc], #1
orr r12, r12, r0, lsl #8 orr addy, addy, r0, lsl #8
add r12, r12, r7, lsr #24 add addy, addy, m6502_y, lsr #24
.endm .endm
// <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ѱַ // <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ѱַ
@@ -251,159 +249,159 @@
// X<EFBFBD>Ĵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ѱַ // X<EFBFBD>Ĵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ѱַ
.macro doIIX .macro doIIX
.set _type, _ABS .set _type, _ABS
ldrb r0, [r9], #1 ldrb r0, [m6502_pc], #1
add r0, r6, r0, lsl #24 add r0, m6502_x, r0, lsl #24
lsr r12, r0, #24 lsr addy, r0, #24
ldrb r12, [r11, r12] ldrb addy, [cpu_zpage, addy]
add r0, r0, #0x01000000 add r0, r0, #0x01000000
lsr r1, r0, #24 lsr r1, r0, #24
ldrb r1, [r11, r1] ldrb r1, [cpu_zpage, r1]
orr r12, r12, r1, lsl #8 orr addy, addy, r1, lsl #8
.endm .endm
// Y<EFBFBD>Ĵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ѱַ // Y<EFBFBD>Ĵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ѱַ
.macro doIIY .macro doIIY
.set _type, _ABS .set _type, _ABS
ldrb r0, [r9], #1 ldrb r0, [m6502_pc], #1
ldrb r12, [r11, r0] ldrb addy, [r0,cpu_zpage]
add r0, r0, r11 add r0, r0, cpu_zpage
ldrb r1, [r0, #1] ldrb r1, [r0, #1]
orr r12, r12, r1, lsl #8 orr addy, addy, r1, lsl #8
add r12, r12, r7, lsr #24 add addy, addy, m6502_y, lsr #24
.endm .endm
// <EFBFBD><EFBFBD>ҳ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ѱַ // <EFBFBD><EFBFBD>ҳ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ѱַ
.macro doZPI .macro doZPI
.set _type, _ABS .set _type, _ABS
ldrb r0, [r9], #1 ldrb r0, [m6502_pc], #1
ldrb r12, [r11, r0] ldrb addy, [r0,cpu_zpage]
add r0, r0, r11 add r0, r0, cpu_zpage
ldrb r1, [r0, #1] ldrb r1, [r0, #1]
orr r12, r12, r1, lsl #8 orr addy, addy, r1, lsl #8
.endm .endm
// <EFBFBD><EFBFBD>ҳѰַ // <EFBFBD><EFBFBD>ҳѰַ
.macro doZ .macro doZ
.set _type, _ZP .set _type, _ZP
ldrb r12, [r9], #1 ldrb addy, [m6502_pc], #1
.endm .endm
// <EFBFBD><EFBFBD>ҳ˫<EFBFBD>ֽ<EFBFBD>Ѱַ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> bbr/bbs<EFBFBD><EFBFBD> // <EFBFBD><EFBFBD>ҳ˫<EFBFBD>ֽ<EFBFBD>Ѱַ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> bbr/bbs<EFBFBD><EFBFBD>
.macro doZ2 .macro doZ2
.set _type, _ZP .set _type, _ZP
ldrb r12, [r9], #2 ldrb addy, [m6502_pc], #2
.endm .endm
// <EFBFBD><EFBFBD>ҳX<EFBFBD><EFBFBD><EFBFBD><EFBFBD> // <EFBFBD><EFBFBD>ҳX<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
.macro doZIX .macro doZIX
.set _type, _ZP .set _type, _ZP
ldrb r12, [r9], #1 ldrb addy, [m6502_pc], #1
add r12, r12, r6, lsr #24 add addy, addy, m6502_x, lsr #24
and r12, r12, #0xff and addy, addy, #0xff
.endm .endm
// <EFBFBD><EFBFBD>ҳX<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƣ<EFBFBD> // <EFBFBD><EFBFBD>ҳX<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƣ<EFBFBD>
.macro doZIXf .macro doZIXf
.set _type, _ZPI .set _type, _ZPI
ldrb r12, [r9], #1 ldrb addy, [m6502_pc], #1
add r12, r6, r12, lsl #24 add addy, m6502_x, addy, lsl #24
.endm .endm
// <EFBFBD><EFBFBD>ҳY<EFBFBD><EFBFBD><EFBFBD><EFBFBD> // <EFBFBD><EFBFBD>ҳY<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
.macro doZIY .macro doZIY
.set _type, _ZP .set _type, _ZP
ldrb r12, [r9], #1 ldrb addy, [m6502_pc], #1
add r12, r12, r7, lsr #24 add addy, addy, m6502_y, lsr #24
and r12, r12, #0xff and addy, addy, #0xff
.endm .endm
// <EFBFBD><EFBFBD>ҳY<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƣ<EFBFBD> // <EFBFBD><EFBFBD>ҳY<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƣ<EFBFBD>
.macro doZIYf .macro doZIYf
.set _type, _ZPI .set _type, _ZPI
ldrb r12, [r9], #1 ldrb addy, [m6502_pc], #1
add r12, r7, r12, lsl #24 add addy, m6502_y, addy, lsl #24
.endm .endm
// ADC <EFBFBD><EFBFBD><EFBFBD><EFBFBD> // ADC <EFBFBD><EFBFBD><EFBFBD><EFBFBD>
.macro opADC .macro opADC
readmem readmem
movs r1, r8, lsr #1 movs r1, cycles, lsr #1
IT CS IT CS
subcs r0, r0, #0x00000100 subcs r0, r0, #0x00000100
adcs r5, r5, r0, ror #8 adcs m6502_a, m6502_a, r0, ror #8
mov r3, r5, asr #24 mov m6502_nz, m6502_a, asr #24
orr r8, r8, #CYC_C+CYC_V orr cycles, cycles, #CYC_C+CYC_V
IT VC IT VC
bicvc r8, r8, #CYC_V bicvc cycles, cycles, #CYC_V
.endm .endm
// AND <EFBFBD><EFBFBD><EFBFBD><EFBFBD> // AND <EFBFBD><EFBFBD><EFBFBD><EFBFBD>
.macro opAND .macro opAND
readmem readmem
and r5, r5, r0, lsl #24 and m6502_a, m6502_a, r0, lsl #24
mov r3, r5, asr #24 mov m6502_nz, m6502_a, asr #24
.endm .endm
// ASL <EFBFBD><EFBFBD><EFBFBD><EFBFBD> // ASL <EFBFBD><EFBFBD><EFBFBD><EFBFBD>
.macro opASL .macro opASL
readmem readmem
add r0, r0, r0 add r0, r0, r0
orrs r3, r0, r0, lsl #24 orrs m6502_nz, r0, r0, lsl #24
orr r8, r8, #CYC_C orr cycles, cycles, #CYC_C
writemem writemem
.endm .endm
// BIT <EFBFBD><EFBFBD><EFBFBD><EFBFBD> // BIT <EFBFBD><EFBFBD><EFBFBD><EFBFBD>
.macro opBIT .macro opBIT
readmem readmem
bic r8, r8, #CYC_V bic cycles, cycles, #CYC_V
tst r0, #V tst r0, #V
IT NE IT NE
orrne r8, r8, #CYC_V orrne cycles, cycles, #CYC_V
and r3, r0, r5, lsr #24 and m6502_nz, r0, m6502_a, lsr #24
orr r3, r3, r0, lsl #24 orr m6502_nz, m6502_nz, r0, lsl #24
.endm .endm
// <EFBFBD>Ƚϲ<EFBFBD><EFBFBD><EFBFBD> // <EFBFBD>Ƚϲ<EFBFBD><EFBFBD><EFBFBD>
.macro opCOMP x .macro opCOMP x
readmem readmem
subs r3, \x, r0, lsl #24 subs m6502_nz, \x, r0, lsl #24
mov r3, r3, asr #24 mov m6502_nz, m6502_nz, asr #24
orr r8, r8, #CYC_C orr cycles, cycles, #CYC_C
.endm .endm
// <EFBFBD><EFBFBD>һ<EFBFBD><EFBFBD><EFBFBD><EFBFBD> // <EFBFBD><EFBFBD>һ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
.macro opDEC .macro opDEC
readmem readmem
sub r0, r0, #1 sub r0, r0, #1
orr r3, r0, r0, lsl #24 orr m6502_nz, r0, r0, lsl #24
writemem writemem
.endm .endm
// <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> // <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
.macro opEOR .macro opEOR
readmem readmem
eor r5, r5, r0, lsl #24 eor m6502_a, m6502_a, r0, lsl #24
mov r3, r5, asr #24 mov m6502_nz, m6502_a, asr #24
.endm .endm
// <EFBFBD><EFBFBD>һ<EFBFBD><EFBFBD><EFBFBD><EFBFBD> // <EFBFBD><EFBFBD>һ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
.macro opINC .macro opINC
readmem readmem
add r0, r0, #1 add r0, r0, #1
orr r3, r0, r0, lsl #24 orr m6502_nz, r0, r0, lsl #24
writemem writemem
.endm .endm
// <EFBFBD><EFBFBD><EFBFBD>ز<EFBFBD><EFBFBD><EFBFBD> // <EFBFBD><EFBFBD><EFBFBD>ز<EFBFBD><EFBFBD><EFBFBD>
.macro opLOAD x .macro opLOAD x
readmems readmems
mov \x, r3, lsl #24 mov \x, m6502_nz, lsl #24
.endm .endm
// <EFBFBD>߼<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> // <EFBFBD>߼<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
@@ -411,52 +409,52 @@
.if _type == _ABS .if _type == _ABS
readmemabs readmemabs
movs r0, r0, lsr #1 movs r0, r0, lsr #1
orr r8, r8, #CYC_C orr cycles, cycles, #CYC_C
mov r3, r0 mov m6502_nz, r0
writememabs writememabs
.elseif _type == _ZP .elseif _type == _ZP
ldrb r3, [r11, r12] ldrb m6502_nz, [cpu_zpage, addy]
movs r3, r3, lsr #1 movs m6502_nz, m6502_nz, lsr #1
orr r8, r8, #CYC_C orr cycles, cycles, #CYC_C
strb r3, [r11, r12] strb m6502_nz, [cpu_zpage, addy]
.elseif _type == _ZPI .elseif _type == _ZPI
lsr r3, r12, #24 lsr m6502_nz, addy, #24
ldrb r3, [r11, r3] ldrb m6502_nz, [cpu_zpage, m6502_nz]
movs r3, r3, lsr #1 movs m6502_nz, m6502_nz, lsr #1
orr r8, r8, #CYC_C orr cycles, cycles, #CYC_C
lsr r1, r12, #24 lsr r1, addy, #24
strb r3, [r11, r1] strb m6502_nz, [cpu_zpage, r1]
.endif .endif
.endm .endm
// OR <EFBFBD><EFBFBD><EFBFBD><EFBFBD> // OR <EFBFBD><EFBFBD><EFBFBD><EFBFBD>
.macro opORA .macro opORA
readmem readmem
orr r5, r5, r0, lsl #24 orr m6502_a, m6502_a, r0, lsl #24
mov r3, r5, asr #24 mov m6502_nz, m6502_a, asr #24
.endm .endm
// ѭ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> // ѭ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
.macro opROL .macro opROL
readmem readmem
movs r8, r8, lsr #1 movs cycles, cycles, lsr #1
adc r0, r0, r0 adc r0, r0, r0
orrs r3, r0, r0, lsl #24 orrs m6502_nz, r0, r0, lsl #24
adc r8, r8, r8 adc cycles, cycles, cycles
writemem writemem
.endm .endm
// ѭ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> // ѭ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
.macro opROR .macro opROR
readmem readmem
movs r8, r8, lsr #1 movs cycles, cycles, lsr #1
IT CS IT CS
orrcs r0, r0, #0x100 orrcs r0, r0, #0x100
movs r0, r0, lsr #1 movs r0, r0, lsr #1
orr r3, r0, r0, lsl #24 orr m6502_nz, r0, r0, lsl #24
adc r8, r8, r8 adc cycles, cycles, cycles
writemem writemem
.endm .endm
@@ -467,7 +465,7 @@
sbcs m6502_a, m6502_a, r0, lsl #24 sbcs m6502_a, m6502_a, r0, lsl #24
and m6502_a, m6502_a, #0xff000000 and m6502_a, m6502_a, #0xff000000
mov m6502_nz, m6502_a, asr #24 mov m6502_nz, m6502_a, asr #24
orr cycles, cycles, #CYC_C | CYC_V orr cycles, cycles, #CYC_C+CYC_V
IT VC IT VC
bicvc cycles, cycles, #CYC_V bicvc cycles, cycles, #CYC_V