程序能跑起来了,但跑得不正常
This commit is contained in:
@@ -153,7 +153,7 @@ static void Touch_Task (void *p_arg)
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WIN_KeyStruct k={0};
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// 设置锁屏时间为5秒
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SysFile_GetSysFile()->screenOffTime=15;
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SysFile_GetSysFile()->screenOffTime=0;
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int screen_off_timer=0;
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int key_shield_timer=0;
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@@ -117,7 +117,7 @@ void WIN_DrawTxtAt (char *txt,int x,int y)
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else
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{
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x+=WIN_DrawWordAt(txt,x,y);
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txt+=2;
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txt+=3;
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}
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}
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}
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@@ -147,7 +147,7 @@ void WIN_DrawTxtAtRect (char *txt,int x,int y,int x_size,int y_size)
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x_s=x;y_s+=WIN_GetFontHight();
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}
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x_s+=WIN_DrawWordAt(txt,x_s,y_s);
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txt+=2;
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txt+=3;
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}
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if (y_s-y>y_size-1-WIN_GetFontHight()) return;
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}
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@@ -345,7 +345,8 @@ static u32 WIN_DrawWordAtCommon (char *c,int x,int y)
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//获取字模
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if (g_font==0) g_font=WIN_CreatFontBuff(FONT_NUM);
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buff=WIN_GetFontData(g_font,(c[0]<<8)|c[1],&all_byte);
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// 汉字utf8一般是3个字节
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buff=WIN_GetFontData(g_font,(c[0]<<16)|(c[1]<<8)|c[2],&all_byte);
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@@ -396,12 +396,12 @@ int WIN_DecodeImg(WIN_PicStruct *pic,const char *name)
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int WIN_GetWordData(u8 size,u8 type,unsigned char *buff, int word, int buff_size)
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{
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u8 gbk[3]={0};
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u8 gbk[4]={0};
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u8 uni[3]={0};
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if (word>0x80)
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{
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gbk[0]=word>>8;
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gbk[0]=(word>>8)&0xff;
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gbk[1]=word&0xff;
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}
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else
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@@ -409,7 +409,7 @@ int WIN_GetWordData(u8 size,u8 type,unsigned char *buff, int word, int buff_size
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gbk[0]=word;
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}
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gbk2uni_str(gbk,uni);
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utf82uni_str(gbk,uni);
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if (g_ft_face)
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253
Project/Src/rt-thread/ports/context_gcc.S
Normal file
253
Project/Src/rt-thread/ports/context_gcc.S
Normal file
@@ -0,0 +1,253 @@
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/*
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* Copyright (c) 2006-2022, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2009-10-11 Bernard first version
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* 2012-01-01 aozima support context switch load/store FPU register.
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* 2013-06-18 aozima add restore MSP feature.
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* 2013-06-23 aozima support lazy stack optimized.
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* 2018-07-24 aozima enhancement hard fault exception handler.
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*/
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/**
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* @addtogroup cortex-m4
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*/
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/*@{*/
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.cpu cortex-m4
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.syntax unified
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.thumb
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.text
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.equ SCB_VTOR, 0xE000ED08 /* Vector Table Offset Register */
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.equ NVIC_INT_CTRL, 0xE000ED04 /* interrupt control state register */
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.equ NVIC_SYSPRI2, 0xE000ED20 /* system priority register (2) */
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.equ NVIC_PENDSV_PRI, 0xFFFF0000 /* PendSV and SysTick priority value (lowest) */
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.equ NVIC_PENDSVSET, 0x10000000 /* value to trigger PendSV exception */
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/*
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* rt_base_t rt_hw_interrupt_disable();
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*/
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.global rt_hw_interrupt_disable
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.type rt_hw_interrupt_disable, %function
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rt_hw_interrupt_disable:
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MRS r0, PRIMASK
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CPSID I
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BX LR
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/*
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* void rt_hw_interrupt_enable(rt_base_t level);
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*/
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.global rt_hw_interrupt_enable
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.type rt_hw_interrupt_enable, %function
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rt_hw_interrupt_enable:
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MSR PRIMASK, r0
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BX LR
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/*
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* void rt_hw_context_switch(rt_uint32 from, rt_uint32 to);
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* r0 --> from
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* r1 --> to
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*/
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.global rt_hw_context_switch_interrupt
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.type rt_hw_context_switch_interrupt, %function
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.global rt_hw_context_switch
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.type rt_hw_context_switch, %function
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rt_hw_context_switch_interrupt:
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rt_hw_context_switch:
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/* set rt_thread_switch_interrupt_flag to 1 */
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LDR r2, =rt_thread_switch_interrupt_flag
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LDR r3, [r2]
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CMP r3, #1
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BEQ _reswitch
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MOV r3, #1
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STR r3, [r2]
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LDR r2, =rt_interrupt_from_thread /* set rt_interrupt_from_thread */
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STR r0, [r2]
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_reswitch:
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LDR r2, =rt_interrupt_to_thread /* set rt_interrupt_to_thread */
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STR r1, [r2]
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LDR r0, =NVIC_INT_CTRL /* trigger the PendSV exception (causes context switch) */
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LDR r1, =NVIC_PENDSVSET
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STR r1, [r0]
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BX LR
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/* r0 --> switch from thread stack
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* r1 --> switch to thread stack
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* psr, pc, lr, r12, r3, r2, r1, r0 are pushed into [from] stack
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*/
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.global PendSV_Handler
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.type PendSV_Handler, %function
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PendSV_Handler:
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/* disable interrupt to protect context switch */
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MRS r2, PRIMASK
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CPSID I
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/* get rt_thread_switch_interrupt_flag */
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LDR r0, =rt_thread_switch_interrupt_flag
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LDR r1, [r0]
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CBZ r1, pendsv_exit /* pendsv already handled */
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/* clear rt_thread_switch_interrupt_flag to 0 */
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MOV r1, #0x00
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STR r1, [r0]
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LDR r0, =rt_interrupt_from_thread
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LDR r1, [r0]
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CBZ r1, switch_to_thread /* skip register save at the first time */
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MRS r1, psp /* get from thread stack pointer */
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#if defined (__VFP_FP__) && !defined(__SOFTFP__)
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TST lr, #0x10 /* if(!EXC_RETURN[4]) */
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IT EQ
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VSTMDBEQ r1!, {d8 - d15} /* push FPU register s16~s31 */
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#endif
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STMFD r1!, {r4 - r11} /* push r4 - r11 register */
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#if defined (__VFP_FP__) && !defined(__SOFTFP__)
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MOV r4, #0x00 /* flag = 0 */
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TST lr, #0x10 /* if(!EXC_RETURN[4]) */
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IT EQ
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MOVEQ r4, #0x01 /* flag = 1 */
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STMFD r1!, {r4} /* push flag */
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#endif
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LDR r0, [r0]
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STR r1, [r0] /* update from thread stack pointer */
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switch_to_thread:
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LDR r1, =rt_interrupt_to_thread
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LDR r1, [r1]
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LDR r1, [r1] /* load thread stack pointer */
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#if defined (__VFP_FP__) && !defined(__SOFTFP__)
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LDMFD r1!, {r3} /* pop flag */
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#endif
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LDMFD r1!, {r4 - r11} /* pop r4 - r11 register */
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#if defined (__VFP_FP__) && !defined(__SOFTFP__)
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CMP r3, #0 /* if(flag_r3 != 0) */
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IT NE
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VLDMIANE r1!, {d8 - d15} /* pop FPU register s16~s31 */
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#endif
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MSR psp, r1 /* update stack pointer */
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#if defined (__VFP_FP__) && !defined(__SOFTFP__)
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ORR lr, lr, #0x10 /* lr |= (1 << 4), clean FPCA. */
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CMP r3, #0 /* if(flag_r3 != 0) */
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IT NE
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BICNE lr, lr, #0x10 /* lr &= ~(1 << 4), set FPCA. */
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#endif
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pendsv_exit:
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/* restore interrupt */
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MSR PRIMASK, r2
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ORR lr, lr, #0x04
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BX lr
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/*
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* void rt_hw_context_switch_to(rt_uint32 to);
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* r0 --> to
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*/
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.global rt_hw_context_switch_to
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.type rt_hw_context_switch_to, %function
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rt_hw_context_switch_to:
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LDR r1, =rt_interrupt_to_thread
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STR r0, [r1]
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#if defined (__VFP_FP__) && !defined(__SOFTFP__)
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/* CLEAR CONTROL.FPCA */
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MRS r2, CONTROL /* read */
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BIC r2, #0x04 /* modify */
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MSR CONTROL, r2 /* write-back */
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#endif
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/* set from thread to 0 */
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LDR r1, =rt_interrupt_from_thread
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MOV r0, #0x0
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STR r0, [r1]
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/* set interrupt flag to 1 */
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LDR r1, =rt_thread_switch_interrupt_flag
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MOV r0, #1
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STR r0, [r1]
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/* set the PendSV and SysTick exception priority */
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LDR r0, =NVIC_SYSPRI2
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LDR r1, =NVIC_PENDSV_PRI
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LDR.W r2, [r0,#0x00] /* read */
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ORR r1,r1,r2 /* modify */
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STR r1, [r0] /* write-back */
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LDR r0, =NVIC_INT_CTRL /* trigger the PendSV exception (causes context switch) */
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LDR r1, =NVIC_PENDSVSET
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STR r1, [r0]
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/* restore MSP */
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LDR r0, =SCB_VTOR
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LDR r0, [r0]
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LDR r0, [r0]
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NOP
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MSR msp, r0
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/* enable interrupts at processor level */
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CPSIE F
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CPSIE I
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/* ensure PendSV exception taken place before subsequent operation */
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DSB
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ISB
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/* never reach here! */
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/* compatible with old version */
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.global rt_hw_interrupt_thread_switch
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.type rt_hw_interrupt_thread_switch, %function
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rt_hw_interrupt_thread_switch:
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BX lr
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NOP
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.global HardFault_Handler
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.type HardFault_Handler, %function
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HardFault_Handler:
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/* get current context */
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MRS r0, msp /* get fault context from handler. */
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TST lr, #0x04 /* if(!EXC_RETURN[2]) */
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BEQ _get_sp_done
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MRS r0, psp /* get fault context from thread. */
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_get_sp_done:
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STMFD r0!, {r4 - r11} /* push r4 - r11 register */
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#if defined (__VFP_FP__) && !defined(__SOFTFP__)
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STMFD r0!, {lr} /* push dummy for flag */
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#endif
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STMFD r0!, {lr} /* push exec_return register */
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TST lr, #0x04 /* if(!EXC_RETURN[2]) */
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BEQ _update_msp
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MSR psp, r0 /* update stack pointer to PSP. */
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B _update_done
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_update_msp:
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MSR msp, r0 /* update stack pointer to MSP. */
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_update_done:
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PUSH {LR}
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BL rt_hw_hard_fault_exception
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POP {LR}
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ORR lr, lr, #0x04
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BX lr
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@@ -1,240 +0,0 @@
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;/*
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; * File : context_rvds.S
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; * This file is part of RT-Thread RTOS
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; * COPYRIGHT (C) 2009, RT-Thread Development Team
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; *
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; * The license and distribution terms for this file may be
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; * found in the file LICENSE in this distribution or at
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; * http://www.rt-thread.org/license/LICENSE
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; *
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; * Change Logs:
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; * Date Author Notes
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; * 2009-01-17 Bernard first version.
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; * 2012-01-01 aozima support context switch load/store FPU register.
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; * 2013-06-18 aozima add restore MSP feature.
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; * 2013-06-23 aozima support lazy stack optimized.
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; */
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;/**
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; * @addtogroup cortex-m4
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; */
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;/*@{*/
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SCB_VTOR EQU 0xE000ED08 ; Vector Table Offset Register
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NVIC_INT_CTRL EQU 0xE000ED04 ; interrupt control state register
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NVIC_SYSPRI2 EQU 0xE000ED20 ; system priority register (2)
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NVIC_PENDSV_PRI EQU 0x00FF0000 ; PendSV priority value (lowest)
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NVIC_PENDSVSET EQU 0x10000000 ; value to trigger PendSV exception
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AREA |.text|, CODE, READONLY, ALIGN=2
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THUMB
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REQUIRE8
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PRESERVE8
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IMPORT rt_thread_switch_interrupt_flag
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IMPORT rt_interrupt_from_thread
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IMPORT rt_interrupt_to_thread
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;/*
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; * rt_base_t rt_hw_interrupt_disable();
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; */
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rt_hw_interrupt_disable PROC
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EXPORT rt_hw_interrupt_disable
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MRS r0, PRIMASK
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CPSID I
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BX LR
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ENDP
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;/*
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; * void rt_hw_interrupt_enable(rt_base_t level);
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; */
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rt_hw_interrupt_enable PROC
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EXPORT rt_hw_interrupt_enable
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MSR PRIMASK, r0
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BX LR
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ENDP
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;/*
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; * void rt_hw_context_switch(rt_uint32 from, rt_uint32 to);
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; * r0 --> from
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; * r1 --> to
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; */
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rt_hw_context_switch_interrupt
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EXPORT rt_hw_context_switch_interrupt
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rt_hw_context_switch PROC
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EXPORT rt_hw_context_switch
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; set rt_thread_switch_interrupt_flag to 1
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LDR r2, =rt_thread_switch_interrupt_flag
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LDR r3, [r2]
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CMP r3, #1
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BEQ _reswitch
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MOV r3, #1
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STR r3, [r2]
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LDR r2, =rt_interrupt_from_thread ; set rt_interrupt_from_thread
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STR r0, [r2]
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_reswitch
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LDR r2, =rt_interrupt_to_thread ; set rt_interrupt_to_thread
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STR r1, [r2]
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LDR r0, =NVIC_INT_CTRL ; trigger the PendSV exception (causes context switch)
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LDR r1, =NVIC_PENDSVSET
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STR r1, [r0]
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BX LR
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ENDP
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; r0 --> switch from thread stack
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; r1 --> switch to thread stack
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; psr, pc, lr, r12, r3, r2, r1, r0 are pushed into [from] stack
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OS_CPU_PendSVHandler PROC
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EXPORT OS_CPU_PendSVHandler
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; disable interrupt to protect context switch
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MRS r2, PRIMASK
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CPSID I
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; get rt_thread_switch_interrupt_flag
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LDR r0, =rt_thread_switch_interrupt_flag
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LDR r1, [r0]
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CBZ r1, pendsv_exit ; pendsv already handled
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; clear rt_thread_switch_interrupt_flag to 0
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MOV r1, #0x00
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STR r1, [r0]
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LDR r0, =rt_interrupt_from_thread
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LDR r1, [r0]
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CBZ r1, switch_to_thread ; skip register save at the first time
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MRS r1, psp ; get from thread stack pointer
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IF {FPU} != "SoftVFP"
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TST lr, #0x10 ; if(!EXC_RETURN[4])
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VSTMFDEQ r1!, {d8 - d15} ; push FPU register s16~s31
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ENDIF
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STMFD r1!, {r4 - r11} ; push r4 - r11 register
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IF {FPU} != "SoftVFP"
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MOV r4, #0x00 ; flag = 0
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TST lr, #0x10 ; if(!EXC_RETURN[4])
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MOVEQ r4, #0x01 ; flag = 1
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STMFD r1!, {r4} ; push flag
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ENDIF
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LDR r0, [r0]
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STR r1, [r0] ; update from thread stack pointer
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switch_to_thread
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LDR r1, =rt_interrupt_to_thread
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LDR r1, [r1]
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LDR r1, [r1] ; load thread stack pointer
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IF {FPU} != "SoftVFP"
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LDMFD r1!, {r3} ; pop flag
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ENDIF
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LDMFD r1!, {r4 - r11} ; pop r4 - r11 register
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IF {FPU} != "SoftVFP"
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CMP r3, #0 ; if(flag_r3 != 0)
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VLDMFDNE r1!, {d8 - d15} ; pop FPU register s16~s31
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ENDIF
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MSR psp, r1 ; update stack pointer
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IF {FPU} != "SoftVFP"
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ORR lr, lr, #0x10 ; lr |= (1 << 4), clean FPCA.
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CMP r3, #0 ; if(flag_r3 != 0)
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BICNE lr, lr, #0x10 ; lr &= ~(1 << 4), set FPCA.
|
||||
ENDIF
|
||||
|
||||
pendsv_exit
|
||||
; restore interrupt
|
||||
MSR PRIMASK, r2
|
||||
|
||||
ORR lr, lr, #0x04
|
||||
BX lr
|
||||
ENDP
|
||||
|
||||
;/*
|
||||
; * void rt_hw_context_switch_to(rt_uint32 to);
|
||||
; * r0 --> to
|
||||
; * this fucntion is used to perform the first thread switch
|
||||
; */
|
||||
rt_hw_context_switch_to PROC
|
||||
EXPORT rt_hw_context_switch_to
|
||||
; set to thread
|
||||
LDR r1, =rt_interrupt_to_thread
|
||||
STR r0, [r1]
|
||||
|
||||
IF {FPU} != "SoftVFP"
|
||||
; CLEAR CONTROL.FPCA
|
||||
MRS r2, CONTROL ; read
|
||||
BIC r2, #0x04 ; modify
|
||||
MSR CONTROL, r2 ; write-back
|
||||
ENDIF
|
||||
|
||||
; set from thread to 0
|
||||
LDR r1, =rt_interrupt_from_thread
|
||||
MOV r0, #0x0
|
||||
STR r0, [r1]
|
||||
|
||||
; set interrupt flag to 1
|
||||
LDR r1, =rt_thread_switch_interrupt_flag
|
||||
MOV r0, #1
|
||||
STR r0, [r1]
|
||||
|
||||
; set the PendSV exception priority
|
||||
LDR r0, =NVIC_SYSPRI2
|
||||
LDR r1, =NVIC_PENDSV_PRI
|
||||
LDR.W r2, [r0,#0x00] ; read
|
||||
ORR r1,r1,r2 ; modify
|
||||
STR r1, [r0] ; write-back
|
||||
|
||||
; trigger the PendSV exception (causes context switch)
|
||||
LDR r0, =NVIC_INT_CTRL
|
||||
LDR r1, =NVIC_PENDSVSET
|
||||
STR r1, [r0]
|
||||
|
||||
; restore MSP
|
||||
LDR r0, =SCB_VTOR
|
||||
LDR r0, [r0]
|
||||
LDR r0, [r0]
|
||||
MSR msp, r0
|
||||
|
||||
; enable interrupts at processor level
|
||||
CPSIE F
|
||||
CPSIE I
|
||||
|
||||
; never reach here!
|
||||
ENDP
|
||||
|
||||
; compatible with old version
|
||||
rt_hw_interrupt_thread_switch PROC
|
||||
EXPORT rt_hw_interrupt_thread_switch
|
||||
BX lr
|
||||
ENDP
|
||||
|
||||
IMPORT rt_hw_hard_fault_exception
|
||||
EXPORT HardFault_Handler
|
||||
HardFault_Handler PROC
|
||||
|
||||
B .
|
||||
; get current context
|
||||
;MRS r0, psp ; get fault thread stack pointer
|
||||
;PUSH {lr}
|
||||
;BL rt_hw_hard_fault_exception
|
||||
;POP {lr}
|
||||
|
||||
;ORR lr, lr, #0x04
|
||||
;BX lr
|
||||
ENDP
|
||||
|
||||
ALIGN 4
|
||||
|
||||
END
|
@@ -102,7 +102,7 @@ SRC=[
|
||||
"Src/lib/buff.c",
|
||||
'Src/rt-thread/board.c',
|
||||
# 'Src/rt-thread/core_delay.c',
|
||||
'Src/rt-thread/libcpu/arm/cortex-m4/context_gcc.S',
|
||||
'Src/rt-thread/ports/context_gcc.S',
|
||||
'Src/rt-thread/ports/cpuport.c',
|
||||
'Src/FreeType/ftdebug.c',
|
||||
'Src/FreeType/ftfile.c',
|
||||
|
Reference in New Issue
Block a user