diff --git a/Project/Src/MyWinApp/mywin_user_filder.c b/Project/Src/MyWinApp/mywin_user_filder.c index f8dc16a..37697ce 100644 --- a/Project/Src/MyWinApp/mywin_user_filder.c +++ b/Project/Src/MyWinApp/mywin_user_filder.c @@ -1,6 +1,6 @@ #include "mywin_inc.h" #include "ff.h" -// #include "nes_main.h" +#include "nes_main.h" #include "gif.h" #include "system_updata.h" #include "avi.h" @@ -347,7 +347,7 @@ void FILDER_OpenFile(WIN_FilderStruct *filder) { FILDER_GetFileRoute(filder); WIN_KeyShieldOn(); - // nes_load ((u8*)filder->fileName,LCD_GetShowAddr(),LCD_GetLcdSizeX()/2-128,LCD_GetLcdSizeY()/2-120); + nes_load ((u8*)filder->fileName,LCD_GetShowAddr(),LCD_GetLcdSizeX()/2-128,LCD_GetLcdSizeY()/2-120); WIN_KeyShieldOff(); } else if (strcmp(p_str, ".avi") == 0) diff --git a/Project/Src/NES/6502_gcc.S b/Project/Src/NES/6502_gcc.S new file mode 100644 index 0000000..df722e7 --- /dev/null +++ b/Project/Src/NES/6502_gcc.S @@ -0,0 +1,1533 @@ + + .syntax unified + .cpu cortex-m4 + .fpu softvfp + .thumb + + + .include "6502mac_gcc.S" + + +.extern NES_RAM +.extern NES_SRAM +.extern spr_ram +.extern debug_6502 // 无效操作码时调用这个函数 + + +.global cpunmi // cpu中断标志 +.global cpuirq // cpu中断标志 +.global clocks // apu要的cpu时钟 +.global cpu_data // 地址 cart.s +.global NMI6502 +.global CPU_reset +.global run6502 +.global op_table + + +.equ IRQ_VECTOR, 0xfffe // IRQ / BRK中断向量地址 +.equ RES_VECTOR, 0xfffc // 复位中断向量地址 +.equ NMI_VECTOR, 0xfffa // NMI中断向量地址 + + +.section .text + + + +// BRK +_00: + ldr r0,[globalptr,#lastbank] // 6502PC从 ROM的最后偏移量 + sub r1,m6502_pc,r0 + add r0,r1,#1 + push16 // save PC + + encodeP (B+R) // save P + + ldr r12,=IRQ_VECTOR + bl VecCont + + fetch 7 + @ LTORG // 把常量放在这里 + + +// ---------------------------------------------------------------------------- +_01:// ORA ($nn,X) +// ---------------------------------------------------------------------------- + doIIX + opORA + fetch 6 +// ---------------------------------------------------------------------------- +_05:// ORA $nn +// ---------------------------------------------------------------------------- + doZ + opORA + fetch 3 +// ---------------------------------------------------------------------------- +_06:// ASL $nn +// ---------------------------------------------------------------------------- + doZ + opASL + fetch_c 5 +// ---------------------------------------------------------------------------- +_08:// PHP +// ---------------------------------------------------------------------------- + encodeP (B+R) + push8 r0 + fetch 3 +// ---------------------------------------------------------------------------- +_09:// ORA #$nn +// ---------------------------------------------------------------------------- + doIMM + opORA + fetch 2 +// ---------------------------------------------------------------------------- +_0A:// ASL +// ---------------------------------------------------------------------------- + adds m6502_a,m6502_a,m6502_a + mov m6502_nz,m6502_a,asr#24 // NZ + orr cycles,cycles,#CYC_C // Prepare C + fetch_c 2 // also subs carry +// ---------------------------------------------------------------------------- +_0D:// ORA $nnnn +// ---------------------------------------------------------------------------- + doABS + opORA + fetch 4 +// ---------------------------------------------------------------------------- +_0E:// ASL $nnnn +// ---------------------------------------------------------------------------- + doABS + opASL + fetch_c 6 +// ---------------------------------------------------------------------------- +_10:// BPL * +// ---------------------------------------------------------------------------- + tst m6502_nz,#0x80000000 + ldrsb r0,[m6502_pc],#1 + IT EQ + addeq m6502_pc,m6502_pc,r0 + IT EQ + subeq cycles,cycles,#256 + fetch 2 +// ---------------------------------------------------------------------------- +_11:// ORA ($nn),Y +// ---------------------------------------------------------------------------- + doIIY + opORA + fetch 5 +// ---------------------------------------------------------------------------- +_15:// ORA $nn,X +// ---------------------------------------------------------------------------- + doZIXf + opORA + fetch 4 +// ---------------------------------------------------------------------------- +_16:// ASL $nn,X +// ---------------------------------------------------------------------------- + doZIXf + opASL + fetch_c 6 +// ---------------------------------------------------------------------------- +_18:// CLC +// ---------------------------------------------------------------------------- + bic cycles,cycles,#CYC_C + fetch 2 +// ---------------------------------------------------------------------------- +_19:// ORA $nnnn,Y +// ---------------------------------------------------------------------------- + doAIY + opORA + fetch 4 +// ---------------------------------------------------------------------------- +_1D:// ORA $nnnn,X +// ---------------------------------------------------------------------------- + doAIX + opORA + fetch 4 +// ---------------------------------------------------------------------------- +_1E:// ASL $nnnn,X +// ---------------------------------------------------------------------------- + doAIX + opASL + fetch_c 7 +// ---------------------------------------------------------------------------- +_20:// JSR $nnnn +// ---------------------------------------------------------------------------- + ldrb r2,[m6502_pc],#1 + ldr r1,[globalptr,#lastbank] + sub r0,m6502_pc,r1 + ldrb r1,[m6502_pc] + orr m6502_pc,r2,r1,lsl#8 + push16 + encodePC + fetch 6 +// ---------------------------------------------------------------------------- +_21:// AND ($nn,X) +// ---------------------------------------------------------------------------- + doIIX + opAND + fetch 6 +// ---------------------------------------------------------------------------- +_24:// BIT $nn +// ---------------------------------------------------------------------------- + doZ + opBIT + fetch 3 +// ---------------------------------------------------------------------------- +_25:// AND $nn +// ---------------------------------------------------------------------------- + doZ + opAND + fetch 3 +// ---------------------------------------------------------------------------- +_26:// ROL $nn +// ---------------------------------------------------------------------------- + doZ + opROL + fetch 5 +// ---------------------------------------------------------------------------- +_28:// PLP +// ---------------------------------------------------------------------------- + pop8 r0 + decodeP + fetch 4 +// ---------------------------------------------------------------------------- +_29:// AND #$nn +// ---------------------------------------------------------------------------- + doIMM + opAND + fetch 2 +// ---------------------------------------------------------------------------- +_2A:// ROL +// ---------------------------------------------------------------------------- + movs cycles,cycles,lsr#1 // get C + IT CS + orrcs m6502_a,m6502_a,#0x00800000 + + adds m6502_a,m6502_a,m6502_a + mov m6502_nz,m6502_a,asr#24 // NZ + adc cycles,cycles,cycles // Set C + fetch 2 +// ---------------------------------------------------------------------------- +_2C:// BIT $nnnn +// ---------------------------------------------------------------------------- + doABS + opBIT + fetch 4 +// ---------------------------------------------------------------------------- +_2D:// AND $nnnn +// ---------------------------------------------------------------------------- + doABS + opAND + fetch 4 +// ---------------------------------------------------------------------------- +_2E:// ROL $nnnn +// ---------------------------------------------------------------------------- + doABS + opROL + fetch 6 +// ---------------------------------------------------------------------------- +_30:// BMI * +// ---------------------------------------------------------------------------- + tst m6502_nz,#0x80000000 + ldrsb r0,[m6502_pc],#1 + IT NE + addne m6502_pc,m6502_pc,r0 + IT NE + subne cycles,cycles,#256 + fetch 2 +// ---------------------------------------------------------------------------- +_31:// AND ($nn),Y +// ---------------------------------------------------------------------------- + doIIY + opAND + fetch 5 +// ---------------------------------------------------------------------------- +_35:// AND $nn,X +// ---------------------------------------------------------------------------- + doZIXf + opAND + fetch 4 +// ---------------------------------------------------------------------------- +_36:// ROL $nn,X +// ---------------------------------------------------------------------------- + doZIXf + opROL + fetch 6 +// ---------------------------------------------------------------------------- +_38:// SEC +// ---------------------------------------------------------------------------- + orr cycles,cycles,#CYC_C + fetch 2 +// ---------------------------------------------------------------------------- +_39:// AND $nnnn,Y +// ---------------------------------------------------------------------------- + doAIY + opAND + fetch 4 +// ---------------------------------------------------------------------------- +_3D:// AND $nnnn,X +// ---------------------------------------------------------------------------- + doAIX + opAND + fetch 4 +// ---------------------------------------------------------------------------- +_3E:// ROL $nnnn,X +// ---------------------------------------------------------------------------- + doAIX + opROL + fetch 7 +// ---------------------------------------------------------------------------- +_40:// RTI +// ---------------------------------------------------------------------------- + pop8 r0 // pop 6502 flags and decode + decodeP + pop16 // pop the return address + encodePC + fetch 6 +// ---------------------------------------------------------------------------- +_41:// EOR ($nn,X) +// ---------------------------------------------------------------------------- + doIIX + opEOR + fetch 6 +// ---------------------------------------------------------------------------- +_45:// EOR $nn +// ---------------------------------------------------------------------------- + doZ + opEOR + fetch 3 +// ---------------------------------------------------------------------------- +_46:// LSR $nn +// ---------------------------------------------------------------------------- + doZ + opLSR + fetch_c 5 +// ---------------------------------------------------------------------------- +_48:// PHA +// ---------------------------------------------------------------------------- + mov r0,m6502_a,lsr#24 + push8 r0 + fetch 3 +// ---------------------------------------------------------------------------- +_49:// EOR #$nn +// ---------------------------------------------------------------------------- + doIMM + opEOR + fetch 2 +// ---------------------------------------------------------------------------- +_4A:// LSR +// ---------------------------------------------------------------------------- + movs m6502_nz,m6502_a,lsr#25 // Z, N=0 + mov m6502_a,m6502_nz,lsl#24 // result without garbage + orr cycles,cycles,#CYC_C // Prepare C + fetch_c 2 +// ---------------------------------------------------------------------------- +_4C:// JMP $nnnn +// ---------------------------------------------------------------------------- + ldrb r0,[m6502_pc],#1 + ldrb r1,[m6502_pc] + orr m6502_pc,r0,r1,lsl#8 + encodePC + fetch 3 +// ---------------------------------------------------------------------------- +_4D:// EOR $nnnn +// ---------------------------------------------------------------------------- + doABS + opEOR + fetch 4 +// ---------------------------------------------------------------------------- +_4E:// LSR $nnnn +// ---------------------------------------------------------------------------- + doABS + opLSR + fetch_c 6 +// ---------------------------------------------------------------------------- +_50:// BVC * +// ---------------------------------------------------------------------------- + tst cycles,#CYC_V + ldrsb r0,[m6502_pc],#1 + IT EQ + addeq m6502_pc,m6502_pc,r0 + IT EQ + subeq cycles,cycles,#256 + fetch 2 +// ---------------------------------------------------------------------------- +_51:// EOR ($nn),Y +// ---------------------------------------------------------------------------- + doIIY + opEOR + fetch 5 +// ---------------------------------------------------------------------------- +_55:// EOR $nn,X +// ---------------------------------------------------------------------------- + doZIXf + opEOR + fetch 4 +// ---------------------------------------------------------------------------- +_56:// LSR $nn,X +// ---------------------------------------------------------------------------- + doZIXf + opLSR + fetch_c 6 +// ---------------------------------------------------------------------------- +_58:// CLI +// ---------------------------------------------------------------------------- + bic cycles,cycles,#CYC_I + fetch 2 +// ---------------------------------------------------------------------------- +_59:// EOR $nnnn,Y +// ---------------------------------------------------------------------------- + doAIY + opEOR + fetch 4 +// ---------------------------------------------------------------------------- +_5D:// EOR $nnnn,X +// ---------------------------------------------------------------------------- + doAIX + opEOR + fetch 4 +// ---------------------------------------------------------------------------- +_5E:// LSR $nnnn,X +// ---------------------------------------------------------------------------- + doAIX + opLSR + fetch_c 7 +// ---------------------------------------------------------------------------- +_60:// RTS +// ---------------------------------------------------------------------------- + pop16 + add m6502_pc,m6502_pc,#1 + encodePC + fetch 6 +// ---------------------------------------------------------------------------- +_61:// ADC ($nn,X) +// ---------------------------------------------------------------------------- + doIIX + opADC + fetch_c 6 +// ---------------------------------------------------------------------------- +_65:// ADC $nn +// ---------------------------------------------------------------------------- + doZ + opADC + fetch_c 3 +// ---------------------------------------------------------------------------- +_66:// ROR $nn +// ---------------------------------------------------------------------------- + doZ + opROR + fetch 5 +// ---------------------------------------------------------------------------- +_68:// PLA +// ---------------------------------------------------------------------------- + pop8 m6502_nz + mov m6502_a,m6502_nz,lsl#24 + fetch 4 +// ---------------------------------------------------------------------------- +_69:// ADC #$nn +// ---------------------------------------------------------------------------- + doIMM + opADC + fetch_c 2 +// ---------------------------------------------------------------------------- +_6A:// ROR +// ---------------------------------------------------------------------------- + movs cycles,cycles,lsr#1 // get C + mov m6502_a,m6502_a,rrx + movs m6502_nz,m6502_a,asr#24 // NZ + and m6502_a,m6502_a,#0xff000000 + adc cycles,cycles,cycles // Set C + fetch 2 +// ---------------------------------------------------------------------------- +_6C:// JMP ($nnnn) JMP ($data16) 间接寻址 ********************************* +// ---------------------------------------------------------------------------- + doABS + ldr r1, =memmap_tbl + add r1, globalptr + and r2,addy,#0xE000 // +// ldr r1,[r1,r2,lsr#11] // >>11 addr&0x7FF + lsr r0,r2,#11 + ldr r1,[r1,r0] // 在数据传送之前,将偏移量加到Rn 中,其结果作为传送数据的存储地址 + + ldrb m6502_pc,[r1,addy] // //若使用后缀"!",则结果写回到Rn中 + add r1,r1,addy + + ldrb r0,[r1,#1] + orr m6502_pc,m6502_pc,r0,lsl#8 // m6502_pc=r9使用ORR 指令将近R9的高8 位数据移入到R0低8位 + encodePC + fetch 5 +// ---------------------------------------------------------------------------- +_6D:// ADC $nnnn +// ---------------------------------------------------------------------------- + doABS + opADC + fetch_c 4 +// ---------------------------------------------------------------------------- +_6E:// ROR $nnnn +// ---------------------------------------------------------------------------- + doABS + opROR + fetch 6 +// ---------------------------------------------------------------------------- +_70:// BVS * +// ---------------------------------------------------------------------------- + tst cycles,#CYC_V + ldrsb r0,[m6502_pc],#1 + IT NE + addne m6502_pc,m6502_pc,r0 + IT NE + subne cycles,cycles,#256 + fetch 2 +// ---------------------------------------------------------------------------- +_71:// ADC ($nn),Y +// ---------------------------------------------------------------------------- + doIIY + opADC + fetch_c 5 +// ---------------------------------------------------------------------------- +_75:// ADC $nn,X +// ---------------------------------------------------------------------------- + doZIXf + opADC + fetch_c 4 +// ---------------------------------------------------------------------------- +_76:// ROR $nn,X +// ---------------------------------------------------------------------------- + doZIXf + opROR + fetch 6 +// ---------------------------------------------------------------------------- +_78:// SEI +// ---------------------------------------------------------------------------- + orr cycles,cycles,#CYC_I + fetch 2 +// ---------------------------------------------------------------------------- +_79:// ADC $nnnn,Y +// ---------------------------------------------------------------------------- + doAIY + opADC + fetch_c 4 +// ---------------------------------------------------------------------------- +_7D:// ADC $nnnn,X +// ---------------------------------------------------------------------------- + doAIX + opADC + fetch_c 4 +// ---------------------------------------------------------------------------- +_7E:// ROR $nnnn,X +// ---------------------------------------------------------------------------- + doAIX + opROR + fetch 7 +// ---------------------------------------------------------------------------- +_81:// STA ($nn,X) +// ---------------------------------------------------------------------------- + doIIX + opSTORE m6502_a + fetch 6 +// ---------------------------------------------------------------------------- +_84:// STY $nn +// ---------------------------------------------------------------------------- + doZ + opSTORE m6502_y + fetch 3 +// ---------------------------------------------------------------------------- +_85:// STA $nn +// ---------------------------------------------------------------------------- + doZ + opSTORE m6502_a + fetch 3 +// ---------------------------------------------------------------------------- +_86:// STX $nn +// ---------------------------------------------------------------------------- + doZ + opSTORE m6502_x + fetch 3 +// ---------------------------------------------------------------------------- +_88:// DEY +// ---------------------------------------------------------------------------- + sub m6502_y,m6502_y,#0x01000000 + mov m6502_nz,m6502_y,asr#24 + fetch 2 +// ---------------------------------------------------------------------------- +_8A:// TXA +// ---------------------------------------------------------------------------- + mov m6502_a,m6502_x + mov m6502_nz,m6502_x,asr#24 + fetch 2 +// ---------------------------------------------------------------------------- +_8C:// STY $nnnn +// ---------------------------------------------------------------------------- + doABS + opSTORE m6502_y + fetch 4 +// ---------------------------------------------------------------------------- +_8D:// STA $nnnn +// ---------------------------------------------------------------------------- + doABS + opSTORE m6502_a + fetch 4 +// ---------------------------------------------------------------------------- +_8E:// STX $nnnn +// ---------------------------------------------------------------------------- + doABS + opSTORE m6502_x + fetch 4 +// ---------------------------------------------------------------------------- +_90:// BCC * +// ---------------------------------------------------------------------------- + tst cycles,#CYC_C // Test Carry + ldrsb r0,[m6502_pc],#1 + IT EQ + addeq m6502_pc,m6502_pc,r0 + IT EQ + subeq cycles,cycles,#256 + fetch 2 +// ---------------------------------------------------------------------------- +_91:// STA ($nn),Y +// ---------------------------------------------------------------------------- + doIIY + opSTORE m6502_a + fetch 6 +// ---------------------------------------------------------------------------- +_94:// STY $nn,X +// ---------------------------------------------------------------------------- + doZIXf + opSTORE m6502_y + fetch 4 +// ---------------------------------------------------------------------------- +_95:// STA $nn,X +// ---------------------------------------------------------------------------- + doZIXf + opSTORE m6502_a + fetch 4 +// ---------------------------------------------------------------------------- +_96:// STX $nn,Y +// ---------------------------------------------------------------------------- + doZIYf + opSTORE m6502_x + fetch 4 +// ---------------------------------------------------------------------------- +_98:// TYA +// ---------------------------------------------------------------------------- + mov m6502_a,m6502_y + mov m6502_nz,m6502_y,asr#24 + fetch 2 +// ---------------------------------------------------------------------------- +_99:// STA $nnnn,Y +// ---------------------------------------------------------------------------- + doAIY + opSTORE m6502_a + fetch 5 +// ---------------------------------------------------------------------------- +_9A:// TXS +// ---------------------------------------------------------------------------- + mov r0,m6502_x,lsr#24 + strb r0,[globalptr,#m6502_s] + fetch 2 +// ---------------------------------------------------------------------------- +_9D:// STA $nnnn,X +// ---------------------------------------------------------------------------- + doAIX + opSTORE m6502_a + fetch 5 +// ---------------------------------------------------------------------------- +_A0:// LDY #$nn +// ---------------------------------------------------------------------------- + doIMM + opLOAD m6502_y + fetch 2 +// ---------------------------------------------------------------------------- +_A1:// LDA ($nn,X) +// ---------------------------------------------------------------------------- + doIIX + opLOAD m6502_a + fetch 6 +// ---------------------------------------------------------------------------- +_A2:// LDX #$nn +// ---------------------------------------------------------------------------- + doIMM + opLOAD m6502_x + fetch 2 +// ---------------------------------------------------------------------------- +_A4:// LDY $nn +// ---------------------------------------------------------------------------- + doZ + opLOAD m6502_y + fetch 3 +// ---------------------------------------------------------------------------- +_A5:// LDA $nn +// ---------------------------------------------------------------------------- + doZ + opLOAD m6502_a + fetch 3 +// ---------------------------------------------------------------------------- +_A6:// LDX $nn +// ---------------------------------------------------------------------------- + doZ + opLOAD m6502_x + fetch 3 +// ---------------------------------------------------------------------------- +_A8:// TAY +// ---------------------------------------------------------------------------- + mov m6502_y,m6502_a + mov m6502_nz,m6502_y,asr#24 + fetch 2 +// ---------------------------------------------------------------------------- +_A9:// LDA #$nn +// ---------------------------------------------------------------------------- + doIMM + opLOAD m6502_a + fetch 2 +// ---------------------------------------------------------------------------- +_AA:// TAX +// ---------------------------------------------------------------------------- + mov m6502_x,m6502_a + mov m6502_nz,m6502_x,asr#24 + fetch 2 +// ---------------------------------------------------------------------------- +_AC:// LDY $nnnn +// ---------------------------------------------------------------------------- + doABS + opLOAD m6502_y + fetch 4 +// ---------------------------------------------------------------------------- +_AD:// LDA $nnnn +// ---------------------------------------------------------------------------- + doABS + opLOAD m6502_a + fetch 4 +// ---------------------------------------------------------------------------- +_AE:// LDX $nnnn +// ---------------------------------------------------------------------------- + doABS + opLOAD m6502_x + fetch 4 +// ---------------------------------------------------------------------------- +_B0:// BCS * +// ---------------------------------------------------------------------------- + tst cycles,#CYC_C // Test Carry + ldrsb r0,[m6502_pc],#1 + IT NE + addne m6502_pc,m6502_pc,r0 + IT NE + subne cycles,cycles,#256 + fetch 2 +// ---------------------------------------------------------------------------- +_B1:// LDA ($nn),Y +// ---------------------------------------------------------------------------- + doIIY + opLOAD m6502_a + fetch 5 +// ---------------------------------------------------------------------------- +_B4:// LDY $nn,X +// ---------------------------------------------------------------------------- + doZIX + opLOAD m6502_y + fetch 4 +// ---------------------------------------------------------------------------- +_B5:// LDA $nn,X +// ---------------------------------------------------------------------------- + doZIX + opLOAD m6502_a + fetch 4 +// ---------------------------------------------------------------------------- +_B6:// LDX $nn,Y +// ---------------------------------------------------------------------------- + doZIY + opLOAD m6502_x + fetch 4 +// ---------------------------------------------------------------------------- +_B8:// CLV +// ---------------------------------------------------------------------------- + bic cycles,cycles,#CYC_V + fetch 2 +// ---------------------------------------------------------------------------- +_B9:// LDA $nnnn,Y +// ---------------------------------------------------------------------------- + doAIY + opLOAD m6502_a + fetch 4 +// ---------------------------------------------------------------------------- +_BA:// TSX +// ---------------------------------------------------------------------------- + ldrb m6502_x,[globalptr,#m6502_s] + mov m6502_x,m6502_x,lsl#24 + mov m6502_nz,m6502_x,asr#24 + fetch 2 +// ---------------------------------------------------------------------------- +_BC:// LDY $nnnn,X +// ---------------------------------------------------------------------------- + doAIX + opLOAD m6502_y + fetch 4 +// ---------------------------------------------------------------------------- +_BD:// LDA $nnnn,X +// ---------------------------------------------------------------------------- + doAIX + opLOAD m6502_a + fetch 4 +// ---------------------------------------------------------------------------- +_BE:// LDX $nnnn,Y +// ---------------------------------------------------------------------------- + doAIY + opLOAD m6502_x + fetch 4 +// ---------------------------------------------------------------------------- +_C0:// CPY #$nn +// ---------------------------------------------------------------------------- + doIMM + opCOMP m6502_y + fetch_c 2 +// ---------------------------------------------------------------------------- +_C1:// CMP ($nn,X) +// ---------------------------------------------------------------------------- + doIIX + opCOMP m6502_a + fetch_c 6 +// ---------------------------------------------------------------------------- +_C4:// CPY $nn +// ---------------------------------------------------------------------------- + doZ + opCOMP m6502_y + fetch_c 3 +// ---------------------------------------------------------------------------- +_C5:// CMP $nn +// ---------------------------------------------------------------------------- + doZ + opCOMP m6502_a + fetch_c 3 +// ---------------------------------------------------------------------------- +_C6:// DEC $nn +// ---------------------------------------------------------------------------- + doZ + opDEC + fetch 5 +// ---------------------------------------------------------------------------- +_C8:// INY +// ---------------------------------------------------------------------------- + add m6502_y,m6502_y,#0x01000000 + mov m6502_nz,m6502_y,asr#24 + fetch 2 +// ---------------------------------------------------------------------------- +_C9:// CMP #$nn +// ---------------------------------------------------------------------------- + doIMM + opCOMP m6502_a + fetch_c 2 +// ---------------------------------------------------------------------------- +_CA:// DEX +// ---------------------------------------------------------------------------- + sub m6502_x,m6502_x,#0x01000000 + mov m6502_nz,m6502_x,asr#24 + fetch 2 +// ---------------------------------------------------------------------------- +_CC:// CPY $nnnn +// ---------------------------------------------------------------------------- + doABS + opCOMP m6502_y + fetch_c 4 +// ---------------------------------------------------------------------------- +_CD:// CMP $nnnn +// ---------------------------------------------------------------------------- + doABS + opCOMP m6502_a + fetch_c 4 +// ---------------------------------------------------------------------------- +_CE:// DEC $nnnn +// ---------------------------------------------------------------------------- + doABS + opDEC + fetch 6 +// ---------------------------------------------------------------------------- +_D0:// BNE * +// ---------------------------------------------------------------------------- + tst m6502_nz,#0xff + ldrsb r0,[m6502_pc],#1 + IT NE + addne m6502_pc,m6502_pc,r0 + IT NE + subne cycles,cycles,#256 + fetch 2 +// ---------------------------------------------------------------------------- +_D1:// CMP ($nn),Y +// ---------------------------------------------------------------------------- + doIIY + opCOMP m6502_a + fetch_c 5 +// ---------------------------------------------------------------------------- +_D5:// CMP $nn,X +// ---------------------------------------------------------------------------- + doZIXf + opCOMP m6502_a + fetch_c 4 +// ---------------------------------------------------------------------------- +_D6:// DEC $nn,X +// ---------------------------------------------------------------------------- + doZIXf + opDEC + fetch 6 +// ---------------------------------------------------------------------------- +_D8:// CLD +// ---------------------------------------------------------------------------- + bic cycles,cycles,#CYC_D + fetch 2 +// ---------------------------------------------------------------------------- +_D9:// CMP $nnnn,Y +// ---------------------------------------------------------------------------- + doAIY + opCOMP m6502_a + fetch_c 4 +// ---------------------------------------------------------------------------- +_DD:// CMP $nnnn,X +// ---------------------------------------------------------------------------- + doAIX + opCOMP m6502_a + fetch_c 4 +// ---------------------------------------------------------------------------- +_DE:// DEC $nnnn,X +// ---------------------------------------------------------------------------- + doAIX + opDEC + fetch 7 +// ---------------------------------------------------------------------------- +_E0:// CPX #$nn +// ---------------------------------------------------------------------------- + doIMM + opCOMP m6502_x + fetch_c 2 +// ---------------------------------------------------------------------------- +_E1:// SBC ($nn,X) +// ---------------------------------------------------------------------------- + doIIX + opSBC + fetch_c 6 +// ---------------------------------------------------------------------------- +_E4:// CPX $nn +// ---------------------------------------------------------------------------- + doZ + opCOMP m6502_x + fetch_c 3 +// ---------------------------------------------------------------------------- +_E5:// SBC $nn +// ---------------------------------------------------------------------------- + doZ + opSBC + fetch_c 3 +// ---------------------------------------------------------------------------- +_E6:// INC $nn +// ---------------------------------------------------------------------------- + doZ + opINC + fetch 5 +// ---------------------------------------------------------------------------- +_E8:// INX +// ---------------------------------------------------------------------------- + add m6502_x,m6502_x,#0x01000000 + mov m6502_nz,m6502_x,asr#24 + fetch 2 +// ---------------------------------------------------------------------------- +_E9:// SBC #$nn +// ---------------------------------------------------------------------------- + doIMM + opSBC + fetch_c 2 +// ---------------------------------------------------------------------------- +_EA:// NOP +// ---------------------------------------------------------------------------- + fetch 2 +// ---------------------------------------------------------------------------- +_EC:// CPX $nnnn +// ---------------------------------------------------------------------------- + doABS + opCOMP m6502_x + fetch_c 4 +// ---------------------------------------------------------------------------- +_ED:// SBC $nnnn +// ---------------------------------------------------------------------------- + doABS + opSBC + fetch_c 4 +// ---------------------------------------------------------------------------- +_EE:// INC $nnnn +// ---------------------------------------------------------------------------- + doABS + opINC + fetch 6 +// ---------------------------------------------------------------------------- +_F0:// BEQ * +// ---------------------------------------------------------------------------- + tst m6502_nz,#0xff + ldrsb r0,[m6502_pc],#1 + IT EQ + addeq m6502_pc,m6502_pc,r0 + IT EQ + subeq cycles,cycles,#256 + fetch 2 +// ---------------------------------------------------------------------------- +_F1:// SBC ($nn),Y +// ---------------------------------------------------------------------------- + doIIY + opSBC + fetch_c 5 +// ---------------------------------------------------------------------------- +_F5:// SBC $nn,X +// ---------------------------------------------------------------------------- + doZIXf + opSBC + fetch_c 4 +// ---------------------------------------------------------------------------- +_F6:// INC $nn,X +// ---------------------------------------------------------------------------- + doZIXf + opINC + fetch 6 +// ---------------------------------------------------------------------------- +_F8:// SED +// ---------------------------------------------------------------------------- + orr cycles,cycles,#CYC_D + fetch 2 +// ---------------------------------------------------------------------------- +_F9:// SBC $nnnn,Y +// ---------------------------------------------------------------------------- + doAIY + opSBC + fetch_c 4 +// ---------------------------------------------------------------------------- +_FD:// SBC $nnnn,X +// ---------------------------------------------------------------------------- + doAIX + opSBC + fetch_c 4 +// ---------------------------------------------------------------------------- +_FE:// INC $nnnn,X +// ---------------------------------------------------------------------------- + doAIX + opINC + fetch 7 +// ***********************************************************以下指令是一些HACK游戏需要****************** +_FF:// ISB $????,X 加的，不确定正确 激龟忍者传2无敌HACK需要 +// ------------------------------------------------------------------- + doAIX // MR_AX()// + opSBC // ISB()// + // MW_EA()// #define MW_EA() WR6502(EA,DT) // EA .... EFFECTIVE ADDRESS + fetch 5 // ADD_CYCLE(5)// // DT .... DATA +// ------------------------------------------------------------------------ +_FB:// ISB $????,X 加的，不确定正确 激龟忍者传2无敌HACK需要 +// ------------------------------------------------------------------- + doAIY // MR_AY()// + opSBC // ISB()// + // MW_EA()// + fetch 5 // ADD_CYCLE(5)// +// ------------------------------------------------------------------------ +_14:// 加的，不确定正确 激龟忍者传2无敌HACK需要 +// ------------------------------------------------------------------- + add m6502_pc,m6502_pc,#1 // R.PC++// + fetch 4 // ADD_CYCLE(4)// +// ------------------------------------------------------------------- +_67:// // RRA $?? 帝国战机无敌HACK需要 +// ------------------------------------------------------------------- + doZ // MR_ZP()// + opADC // RRA()// + // MW_ZP()// + fetch 5 // ADD_CYCLE(5)// +// -------------------------------------------------------------------- +_03:// // SLO ($??,X) 帝国战机无敌HACK需要 +// ------------------------------------------------------------------- + doIIX // MR_IX()// + // SLO()// + // MW_EA()// + fetch 8// // ADD_CYCLE(8)// +// ----------------------------------------------------------------- +_07:// // SLO $?? +// ------------------------------------------------------------------ + doZ // MR_ZP()// + // SLO()// + // MW_ZP()// + fetch 5 // ADD_CYCLE(5)// + +// ---------------------------------------------------------------------------- +_xx:// ??? // invalid opcode 无效的操作码 +// ---------------------------------------------------------------------------- + mov r1,#1 // 不用debug可以直接注译这两行 + bl debug_6502 + + fetch 2 + + + + + +@ .thumb_func +run6502: + stmfd sp!,{r4-r11,lr} // 将这几个寄存器中的值保存到堆栈中 + + ldr globalptr,=cpu_data // r10 wram_globals: 读取地址 + ldr cpu_zpage,=NES_RAM // r11 + ldr cpu_zpage,[cpu_zpage] // NES_RAM用了指针 + + ldr r1, =cpuregs + add r1, globalptr + ldmia r1,{m6502_nz-m6502_pc} // restore 6502 state恢复6502状态 r3-r9 + add cycles,cycles,r0 + + ldrb r0,[globalptr,#cpuirqf] // cpu中断标志 + cmp r0,#0x01 + beq CheckI // EQ 相等(EQual) irq6502; + fetch 0 // 提取操作码并运行 + +exit_run: + ldrb r0,[globalptr,#cpunmif] // cpu中断标志 + cmp r0,#0x01; + beq NMI6502 // EQ 相等(EQual) +exit_nmi: + ldr r0, =cpuregs + add r0, globalptr + stmia r0,{m6502_nz-m6502_pc} // 保存6502状态 r3-r9 + ldmfd sp!,{r4-r11,pc} // exit +@ .end + + +@ .thumb_func +NMI6502: + mov r0,#0 + str r0,[globalptr,#cpunmif] // 清除cpu中断标志 + ldr r12,=NMI_VECTOR // NMI? addy + bl Vec6502 + sub cycles,cycles,#7*256 // CYCLE=256 6502的中断潜伏期为七 (7) 个周 + // 期; 这也就是说需要需要七 (7) 个周期来移入和移出一个中断 + b exit_nmi // return +@ .end + + +default_scanlinehook: + fetch 0 + + +CheckI: +// Check Interrupt Disable 检查中断禁用 + tst cycles,#CYC_I + bne default_scanlinehook // we dont want no stinkin irqs 我们不需要没有讨厌的IRQ + +irq6502: + mov r0,#0 + str r0,[globalptr,#cpuirqf] // 清除cpu中断标志 + ldr r12,=IRQ_VECTOR + bl Vec6502 + fetch 7 + +Vec6502: + ldr r0,[globalptr,lastbank] + sub r0,m6502_pc,r0 + push16 // save PC + encodeP (R) // save P + +VecCont: + push8 r0 + orr cycles,cycles,#CYC_I // disable IRQ 禁用IRQ + ldr r0,[globalptr,#memmap_tbl+28] // 7*4 + // ldrb m6502_pc,[r0,r12]! + ldrb m6502_pc,[r0,r12] // 在数据传送之前,将偏移量加到Rn 中,其结果作为传送数据的存储地址 + // 若使用后缀"!",则结果写回到Rn中 + add r0,r0,r12 // R12=0xfffc 复位中断向量地址 + ldrb r2,[r0,#1] + orr m6502_pc,m6502_pc,r2,lsl#8 + encodePC // get IRQ vector得到6502 PC ROM的偏移量 + bx lr + +@ .thumb_func +CPU_reset: // called by loadcart (r0-r9 are free to use) + str lr,[sp,#-4]! + mov m6502_a,#0 + mov m6502_x,#0 + mov m6502_y,#0 + mov m6502_nz,#0 + ldr m6502_rmem, =readmem_tbl + add m6502_rmem, globalptr // 把readmem_tbl的地址加载到m6502_rmem + + // ldr r0,=NES_RAM+0x100 // 256 + ldr r0,=NES_RAM // NES_RAM用了指针 + ldr r0,[r0] + add r0,#0x100 + + str r0,[globalptr,#m6502_s] // S=0xFD (0x100-3) 把一个寄存器按字存储到存储器中 + mov r0,#0 + str r0,[globalptr,#cpunmif] // 清除cpu中断标志 + str r0,[globalptr,#cpuirqf] // 清除cpu中断标志 + mov cycles,#0 // D=0, C=0, V=0, I=1 disable IRQ. + + ldr r12,=RES_VECTOR // 复位中断向量地址 + bl Vec6502 + + ldr r0, =cpuregs + add r0, globalptr // 读取地址 + stmia r0,{m6502_nz-m6502_pc} // 保存6502状态 + + ldr r1,=exit_run + str r1,[globalptr,#nexttimeout] // 保存指令执行完后下一步的PC地址 + + ldr pc,[sp],#4 +@ .end + + + +empty_R: // 读地址不正确read bad address (error) + mov r0,r12 + mov r1,#2 + bl debug_6502 + mov r0,#0 + orr lr,#0x01 // lr最低位置1防止进入arm状态 + bx lr + +@ .thumb_func +void: // - - - - - - - - -空函数 + mov r0,#0 + orr lr,#0x01 // lr最低位置1防止进入arm状态 + bx lr +@ .end + + +ram_R: // ram read ($0000-$1FFF) + bic addy,addy,#0x1f800 // only 0x07FF is RAM + ldrb r0,[cpu_zpage,addy] + orr lr,#0x01 // lr最低位置1防止进入arm状态 + bx lr + +ram_W: // ram write ($0000-$1FFF) + bic addy,addy,#0x1f800 // only 0x07FF is RAM + strb r0,[cpu_zpage,addy] // cpu_zpage RN r11 ;=CPU_RAM + orr lr,#0x01 // lr最低位置1防止进入arm状态 + bx lr + +sram_R: // sram read ($6000-$7FFF) + sub r1,addy,#0x6000 + ldr r2,[globalptr,#memmap_tbl+12] + ldrb r0,[r2,r1] + orr lr,#0x01 // lr最低位置1防止进入arm状态 + bx lr + +sram_W: // sram write ($6000-$7FFF) + sub addy,addy,#0x6000 + ldr r1,[globalptr,#memmap_tbl+12] + strb r0,[r1,addy] + orr lr,#0x01 // lr最低位置1防止进入arm状态 + bx lr + +rom_R60: // rom read ($6000-$7FFF) + ldr r1,[globalptr,#memmap_tbl+12] + ldrb r0,[r1,addy] + orr lr,#0x01 // lr最低位置1防止进入arm状态 + bx lr + +rom_R80: // rom read ($8000-$9FFF) + ldr r1,[globalptr,#memmap_tbl+16] + ldrb r0,[r1,addy] + orr lr,#0x01 // lr最低位置1防止进入arm状态 + bx lr + +rom_RA0: // rom read ($A000-$BFFF) + ldr r1,[globalptr,#memmap_tbl+20] + ldrb r0,[r1,addy] + orr lr,#0x01 // lr最低位置1防止进入arm状态 + bx lr + +rom_RC0: // rom read ($C000-$DFFF) + ldr r1,[globalptr,#memmap_tbl+24] + ldrb r0,[r1,addy] + orr lr,#0x01 // lr最低位置1防止进入arm状态 + bx lr + +rom_RE0: // ;rom read ($E000-$FFFF) + ldr r1,[globalptr,#memmap_tbl+28] + ldrb r0,[r1,addy] + orr lr,#0x01 // lr最低位置1防止进入arm状态 + bx lr + +IO_R: // I/O read + mov r2,#0x4018 // $4018-$6000 + cmp r12,r2 + bhi Read_Low // HI 无符号数大于 C==1 && Z==0 + + sub r1,r12,#0x4000 // addy=r12 + subs r1,r1,#0x15 + bmi empty_R // 读地址不正确 MI 负数(MInus) N==1 + cmp r1,#3 + ldr r2,=io_read_tbl // 改过，加3行 + add r2,r2,r1,lsl#2 // <<2 + IT MI + ldrmi pc,[r2] + + b empty_R // 读地址不正确 + + +io_read_tbl: + .word apu_4015R // void_4015r ;4015 (sound) + .word joy0_R // 4016: controller 1 + .word joy1_R // 4017: controller 2 + +IO_W: // I/O write + mov r2,#0x4018 // $4018-$6000 + cmp r12,r2 + bhi Write_Low // HI 无符号数大于 C==1 && Z==0 + sub r1,r12,#0x4000 // addy=r12 + cmp r1,#0x18 + ldr r2,=io_write_tbl // 改过，加3行 + add r2,r2,r1,lsl#2 // <<2 + IT MI + ldrmi pc,[r2] // 直接操作pc太他妈危险了 + b empty_R // 读地址不正确 + + +io_write_tbl: + .word apu_w // void_4000w + .word apu_w // _4001w + .word apu_w // _4002w + .word apu_w // _4003w + .word apu_w // _4004w + .word apu_w // _4005w + .word apu_w // _4006w + .word apu_w // _4007w + .word apu_w // _4008w + .word apu_w // void + .word apu_w // _400aw + .word apu_w // void_400bw + .word apu_w // void_400cw + .word apu_w // void + .word apu_w // void_400ew + .word apu_w // void_400fw + .word apu_w // void_4010w + .word apu_w // void_4011w + .word apu_w // void_4012w + .word apu_w // void_4013w + .word dma_W // $4014: Sprite DMA transfer + .word apu_4015w // void_4015w 声音通道切换 + .word joy0_W // $4016: Joypad 0 write joypad_write_ptr + .word void // joy1_W $4017: + + +.extern asm_Mapper_ReadLow + +@ .thumb_func +Read_Low: // $5000-$6000 mapper->MemoryReadLow(addr); + stmfd sp!,{r3,lr} // LR 寄存器放栈 + mov r0,r12 + bl asm_Mapper_ReadLow + ldmfd sp!,{r3,lr} + orr lr,#0x01 // lr最低位置1防止进入arm状态 + bx lr +@ .end + + +.extern asm_Mapper_WriteLow + +@ .thumb_func +Write_Low: // $5000-$6000 mapper->MemoryWriteLow( data, addr); + stmfd sp!,{r3,lr} // LR 寄存器放栈 + mov r1,r12 + bl asm_Mapper_WriteLow + ldmfd sp!,{r3,lr} + orr lr,#0x01 // lr最低位置1防止进入arm状态 + bx lr +@ .end + + +.extern Apu_Write +.extern Apu_Write4015 + +apu_w: // 0x4000--0x4013 + stmfd sp!,{r3,lr} // LR 寄存器放栈 + bl Apu_Write + ldmfd sp!,{r3,lr} + orr lr,#0x01 // lr最低位置1防止进入arm状态 + bx lr + +apu_4015w: + stmfd sp!,{r3,lr} + bl Apu_Write4015 + ldmfd sp!,{r3,lr} + orr lr,#0x01 + bx lr + + +.extern Apu_Read4015 + +apu_4015R: + stmfd sp!,{r3,lr} + add r0,r1,#0x15 + bl Apu_Read4015 + ldmfd sp!,{r3,lr} + orr lr,#0x01 + bx lr + + +dma_W: // (4014) sprite DMA transfer 精灵DMA传输 DMA访问精灵RAM： +// 通过写一个值xx到这个端口，引起CPU内存地址为$xx00－$xxFF的区域传送到精灵内存 + sub cycles,cycles,#512*256 + stmfd sp!,{r3,lr} + and r1,r0,#0xe0 + ldr r2, =memmap_tbl + add r2, globalptr + lsr r1,r1,#3 + ldr r2,[r2,r1] + and r0,r0,#0xff + add r2,r2,r0,lsl#8 // addy r2=DMA source 源 + ldr r1,=spr_ram // r1 DMA的 目的地 ppu.c + ldr r1,[r1] // spr_ram用了指针 + mov r0,#64 // 256/4/8 +copy_: + subs r0,r0,#1 // -1 + ldr r3,[r2,r0,lsl#2] + str r3,[r1,r0,lsl#2] // <<2 *4 + bne copy_ + ldmfd sp!,{r3,lr} + orr lr,#0x01 + bx lr + + +.extern PADdata +.extern PADdata1 + +joy0_W: // 4016 手柄1键值 [7:0]右7 左6 下5 上4 Start3 Select2 B1 A0 ) + tst r0,#1 // 0＝写，1＝读 + orr lr,#0x01 // lr最低位置1防止进入arm状态 + IT NE + bxne lr // NE 不等（NotEqual） + ldr r1,=PADdata; // 手柄1键值 + ldr r1,[r1] + str r1,[globalptr,#joy0data] + ldr r1,=PADdata1; // 手柄1键值 + ldr r1,[r1] + str r1,[globalptr,#joy1data] + bx lr + + +// 在手柄0里面把手柄1的数据一起读取了，所以这个函数不需要了 +joy1_W: // 4017 手柄1键值 [7:0]右7 左6 下5 上4 Start3 Select2 B1 A0 ) + // tst r0,#1 ; 0＝??，1＝读 + // orr lr,#0x01 ;lr最低位置1防止进入arm状态 + // bxne lr ;NE 不等（NotEqual） + bx lr + +joy0_R: +// 4016 + ldr r0,[globalptr,#joy0data] // 串行数据 当前读取位;joy0data是键值 + mov r1,r0,lsr#1 // >>1 + str r1,[globalptr,#joy0data] + and r0,r0,#1 // &1 + orr r0,r0,#0x40 // |0x40 + orr lr,#0x01 // lr最低位置1防止进入arm状态 + bx lr + +joy1_R: +// 4017 + ldr r0,[globalptr,#joy1data] // 串行数据 当前读取位;joy0data是键值 + mov r1,r0,lsr#1 // >>1 + str r1,[globalptr,#joy1data] + and r0,r0,#1 // &1 + orr r0,r0,#0x40 // |0x80？ 0xf8? + orr lr,#0x01 // lr最低位置1防止进入arm状态 + bx lr + +.global K6502_Read +@ .thumb_func +K6502_Read: +// apu Rendering DPCM channel #5 r0=APU->ApuC5Address不确定正确* + stmfd sp!,{lr} + mov r1,r0,lsr#13 // >>13= & 0xe000 + ldr r2,=CPU_RAM // 存储器映象 ram+rom + ldr r1,[r2,r1,lsl#2] // lookup rom ptr..查找ptr + bic r0,r0,#0xe000 // and r0,#0x1fff &0x1fff + ldrb r0,[r1,r0] + ldmfd sp!,{lr} + bx lr +@ .end + +.extern PPU_WriteToPort +.extern PPU_ReadFromPort + + +PPU_W: + stmfd sp!,{r3,lr} + mov r1,r12 + bl PPU_WriteToPort + ldmfd sp!,{r3,lr} + orr lr,#0x01 + bx lr + +PPU_R: + stmfd sp!,{r3,lr} + mov r0,r12 + bl PPU_ReadFromPort + ldmfd sp!,{r3,lr} + orr lr,#0x01 + bx lr + + +op_table: + .word _00,_01,_xx,_03,_xx,_05,_06,_07,_08,_09,_0A,_xx,_xx,_0D,_0E,_xx + .word _10,_11,_xx,_xx,_14,_15,_16,_xx,_18,_19,_xx,_xx,_xx,_1D,_1E,_xx + .word _20,_21,_xx,_xx,_24,_25,_26,_xx,_28,_29,_2A,_xx,_2C,_2D,_2E,_xx + .word _30,_31,_xx,_xx,_xx,_35,_36,_xx,_38,_39,_xx,_xx,_xx,_3D,_3E,_xx + .word _40,_41,_xx,_xx,_xx,_45,_46,_xx,_48,_49,_4A,_xx,_4C,_4D,_4E,_xx + .word _50,_51,_xx,_xx,_xx,_55,_56,_xx,_58,_59,_xx,_xx,_xx,_5D,_5E,_xx + .word _60,_61,_xx,_xx,_xx,_65,_66,_67,_68,_69,_6A,_xx,_6C,_6D,_6E,_xx + .word _70,_71,_xx,_xx,_xx,_75,_76,_xx,_78,_79,_xx,_xx,_xx,_7D,_7E,_xx + .word _xx,_81,_xx,_xx,_84,_85,_86,_xx,_88,_xx,_8A,_xx,_8C,_8D,_8E,_xx + .word _90,_91,_xx,_xx,_94,_95,_96,_xx,_98,_99,_9A,_xx,_xx,_9D,_xx,_xx + .word _A0,_A1,_A2,_xx,_A4,_A5,_A6,_xx,_A8,_A9,_AA,_xx,_AC,_AD,_AE,_xx + .word _B0,_B1,_xx,_xx,_B4,_B5,_B6,_xx,_B8,_B9,_BA,_xx,_BC,_BD,_BE,_xx + .word _C0,_C1,_xx,_xx,_C4,_C5,_C6,_xx,_C8,_C9,_CA,_xx,_CC,_CD,_CE,_xx + .word _D0,_D1,_xx,_xx,_xx,_D5,_D6,_xx,_D8,_D9,_xx,_xx,_xx,_DD,_DE,_xx + .word _E0,_E1,_xx,_xx,_E4,_E5,_E6,_xx,_E8,_E9,_EA,_xx,_EC,_ED,_EE,_xx + .word _F0,_F1,_xx,_xx,_xx,_F5,_F6,_xx,_F8,_F9,_xx,_FB,_xx,_FD,_FE,_FF + + +.section .data +.type cpu_data, %object +cpu_data: + .word 0 // opz # 4 代码表地址 + // readmem_tbl + .word ram_R // $0000 + .word PPU_R // $2000 + .word IO_R // $4000 + .word sram_R // $6000 + .word rom_R80 // $8000 + .word rom_RA0 // $A000 + .word rom_RC0 // $C000 + .word rom_RE0 // $E000 + // writemem_tbl + .word ram_W // $0000 + .word PPU_W // $2000 r0传参数 + .word IO_W // $4000 + .word sram_W // $6000 + .word void // $8000 + .word void // $A000 + .word void // $C000 + .word void // $E000 +CPU_RAM: // memmap_tbl 存储器映象 + .word NES_RAM // $0000 0000-7fff keep $400 byte aligned for 6502 stack shit + .word NES_RAM // $2000 should 保持1024字节对齐 + .word NES_RAM // $4000 never + .word NES_SRAM // NES_RAM-0x5800 ;$6000 change改变 +rommap: + .space 4*4 // $8000-FFFF memmap_tbl+16 +cpustate: + // group these together for save/loadstate + .space 7*4 // cpuregs (nz,c,a,x,y,cycles,pc) + .word 0 // m6502_s: + .word 0 // lastbank: 最后MEMMAP添加到PC （用于计算当前的PC ） + .word 0 // nexttimeout: jump here when cycles runs out 跳到下一个时钟周期运行 + .word 0 // rombase # 4 ;//ROM开始地址 + .word 0 // romnumber # 4 ;// + .word 0 // rommask # 4 ;//ROM掩膜 rommask=romsize-1 + .word 0 // joy0data # 4 ;//手柄1串行数据 + .word 0 // joy1data # 4 ;//手柄2串行数据 +clocks: + .word 0 // clocksh # 4 ;//执行的时钟数 apu用 +cpunmi: + .word 0 // cpunmif # 4 ;cpu中断标志 +cpuirq: + .word 0 // cpuirqf # 4 ;cpu中断标志 + + + diff --git a/Project/Src/NES/6502cart_gcc.S b/Project/Src/NES/6502cart_gcc.S new file mode 100644 index 0000000..0c888b2 --- /dev/null +++ b/Project/Src/NES/6502cart_gcc.S @@ -0,0 +1,211 @@ + .syntax unified + .cpu cortex-m4 + .fpu softvfp + .thumb + .text + + +.include "6502def.s" + + + +.extern NES_RAM +.extern NES_SRAM +.extern CPU_reset +.extern romfile +.extern cpu_data +.extern op_table + +.global cpu6502_init +.global map67_ +.global map89_ +.global mapAB_ +.global mapCD_ +.global mapEF_ + + + +@ .thumb_func +cpu6502_init: + // 压栈 + stmfd sp!,{r4-r11,lr} + // 把读取cpu数据 + ldr r10,=cpu_data + // 把NES_RAM地址指针加载到r11里 + ldr r11,=NES_RAM + ldr r11,[r11] + + // 填充内存映射 + str r11,[globalptr,#memmap_tbl] + str r11,[globalptr,#memmap_tbl+4] + str r11,[globalptr,#memmap_tbl+8] + ldr r0,=NES_SRAM + ldr r0,[r0] + str r0,[globalptr,#memmap_tbl+12] + + // 保存跳转码表地址指针 + ldr r0,=op_table + str r0,[globalptr,#opz] + + // 保存rom基地址 + ldr r0,=romfile + ldr r0,[r0] // R0现在指向ROM映像（包括头） + add r3,r0,#16 // r3现在指向rom镜像(不包括头） + str r3,[globalptr,#rombase] // 设置rom基地址 + + mov r2,#1 + ldrb r1,[r3,#-12] // 16kB PROM的数目 2 + rsb r0,r2,r1,lsl#14 // romsize=X*16KB <<14 逆向减法指令 r0=0x7fff + str r0,[globalptr,#rommask] // rommask=promsize-1 32768-1 + + mov r9,#0 // (消除任何encodePC的映射器*初始化过程中的错误) + str r9,[globalptr,#lastbank] // 6502PC从 ROM的最后偏移量写0 + + mov r0,#0 // 默认rom映射 + bl map89AB_ // 89AB=1st 16k + mov r0,#-1 + bl mapCDEF_ // CDEF=last 16k + + ldrb r1,[r3,#-10] // get mapper + ldrb r2,[r3,#-9] + tst r2,#0x0e // long live DiskDude! + and r1,r1,#0xf0 + and r2,r2,#0xf0 + orr r0,r2,r1,lsr#4 + IT NE + movne r0,r1,lsr#4 // ignore high nibble if header looks bad 忽略高四位，如果头看起来很糟糕 + // r0=mapper号 + + // 填充写rom函数指针 + ldr r0,=Mapper_W + str r0,[globalptr,#writemem_tbl+16] + str r0,[globalptr,#writemem_tbl+20] + str r0,[globalptr,#writemem_tbl+24] + str r0,[globalptr,#writemem_tbl+28] + + // cpu复位 + bl CPU_reset + ldmfd sp!,{r4-r11,lr} + bx lr +@ .end + + + +// ---------------------------------------------------------------------------- +map67_: // rom paging.. r0=page# +// ---------------------------------------------------------------------------- + ldr r1,[globalptr,#rommask] + and r0,r1,r0,lsl#13 + ldr r1,[globalptr,#rombase] + add r0,r1,r0 + sub r0,r0,#0x6000 + str r0,[globalptr,#memmap_tbl+12] + b flush +// ---------------------------------------------------------------------------- +map89_: // rom paging.. r0=page# ROM分页 +// ---------------------------------------------------------------------------- + ldr r1,[globalptr,#rombase] // rom开始地址 + sub r1,r1,#0x8000 + ldr r2,[globalptr,#rommask] + and r0,r2,r0,lsl#13 + add r0,r1,r0 + str r0,[globalptr,#memmap_tbl+16] + b flush +// ---------------------------------------------------------------------------- +mapAB_: +// ---------------------------------------------------------------------------- + ldr r1,[globalptr,#rombase] + sub r1,r1,#0xa000 + ldr r2,[globalptr,#rommask] + and r0,r2,r0,lsl#13 + add r0,r1,r0 + str r0,[globalptr,#memmap_tbl+20] + b flush +// ---------------------------------------------------------------------------- +mapCD_: +// ---------------------------------------------------------------------------- + ldr r1,[globalptr,#rombase] + sub r1,r1,#0xc000 + ldr r2,[globalptr,#rommask] + and r0,r2,r0,lsl#13 + add r0,r1,r0 + str r0,[globalptr,#memmap_tbl+24] + b flush +// ---------------------------------------------------------------------------- +mapEF_: +// ---------------------------------------------------------------------------- + ldr r1,[globalptr,#rombase] + sub r1,r1,#0xe000 + ldr r2,[globalptr,#rommask] + and r0,r2,r0,lsl#13 + add r0,r1,r0 + str r0,[globalptr,#memmap_tbl+28] + b flush +// ---------------------------------------------------------------------------- +map89AB_: +// ---------------------------------------------------------------------------- + ldr r1,[globalptr,#rombase] // rom基地址（不包括头） + sub r1,r1,#0x8000 + ldr r2,[globalptr,#rommask] + and r0,r2,r0,lsl#14 + add r0,r1,r0 + str r0,[globalptr,#memmap_tbl+16] + str r0,[globalptr,#memmap_tbl+20] + +flush: // update m6502_pc & lastbank + ldr r1,[globalptr,#lastbank] + sub r9,r9,r1 + and r1,r9,#0xE000 // //r9和0xe000按位与运算 + ldr r2, =memmap_tbl + add r2, globalptr // //把存储器映象地址加载到r2 + lsr r1,r1,#11 // //>>11位 r1/2048 + ldr r0,[r2,r1] // //读取r2地址+r1偏移的数据到r0 + + str r0,[globalptr,#lastbank] // //保存6502PC从 ROM的最后偏移量 + add r9,r9,r0 // //m6502_pc+r0 + orr lr,#0x01 // lr最低位置1防止进入arm状态 + bx lr + +// ---------------------------------------------------------------------------- +mapCDEF_: +// ---------------------------------------------------------------------------- + ldr r1,[globalptr,#rombase] + sub r1,r1,#0xc000 + ldr r2,[globalptr,#rommask] + and r0,r2,r0,lsl#14 + add r0,r1,r0 + str r0,[globalptr,#memmap_tbl+24] + str r0,[globalptr,#memmap_tbl+28] + b flush +// ---------------------------------------------------------------------------- +map89ABCDEF_: +// ---------------------------------------------------------------------------- + ldr r1,[globalptr,#rombase] + sub r1,r1,#0x8000 + ldr r2,[globalptr,#rommask] + and r0,r2,r0,lsl#15 + add r0,r1,r0 + str r0,[globalptr,#memmap_tbl+16] + str r0,[globalptr,#memmap_tbl+20] + str r0,[globalptr,#memmap_tbl+24] + str r0,[globalptr,#memmap_tbl+28] + b flush + + +.extern asm_Mapper_Write +.type Mapper_W, %function +Mapper_W: + stmfd sp!,{r3,lr} // LR 寄存器放栈 + mov r1,r12 + bl asm_Mapper_Write + ldmfd sp!,{r3,lr} + orr lr,#0x01 // lr最低位置1防止进入arm状态 + bx lr + + + +@ .global main +@ .type main, %function +@ mian: +@ b cpu6502_init + diff --git a/Project/Src/NES/6502def.s b/Project/Src/NES/6502def.s new file mode 100644 index 0000000..7999600 --- /dev/null +++ b/Project/Src/NES/6502def.s @@ -0,0 +1,64 @@ + + +m6502_nz .req r3 // bit 31=N, Z=1 if bits 0-7=0 ;RN定义寄存器名 +m6502_rmem .req r4 // readmem_tbl +m6502_a .req r5 // bits 0-23=0, 还用于清除在内存中的字节 +m6502_x .req r6 // bits 0-23=0 +m6502_y .req r7 // bits 0-23=0 +cycles .req r8 // also VDIC flags也VDIC标志 +m6502_pc .req r9 +globalptr .req r10 // =wram_globals* ptr +m6502_optbl .req r10 +cpu_zpage .req r11 // =CPU_RAM +addy .req r12 // keep this at r12 (从头 APCS) //addr :代表8位地址 + + + + +// equates.s - GCC/GAS version +// 定义寄存器别名（注意：GAS 不支持 RN，直接使用寄存器编号） +// globalptr, r10 +// cpu_zpage 对应 r11（如果需要） + +// 定义全局数据结构偏移量（相当于 MAP 0, globalptr） +// 假设 globalptr 指向一块结构体数据，以下为各字段偏移量 + +.equ opz, 0 // 操作数地址表指针 +.equ readmem_tbl, opz + 4 // 读内存函数表偏移 +.equ writemem_tbl, readmem_tbl + 32 // 写内存函数表偏移 +.equ memmap_tbl, writemem_tbl + 32 // ROM/RAM 映射表偏移 +.equ cpuregs, memmap_tbl + 32 // 保存 6502 寄存器状态起始偏移 +.equ m6502_s, cpuregs + 28 // 栈指针 s +.equ lastbank, m6502_s + 4 // 最后一次 ROM bank 地址 +.equ nexttimeout, lastbank + 4 // 下次超时跳转地址 +.equ rombase, nexttimeout + 4 // ROM 起始地址 +.equ romnumber, rombase + 4 // ROM 编号 +.equ rommask, romnumber + 4 // ROM 掩码（romsize-1） +.equ joy0data, rommask + 4 // 手柄 1 数据 +.equ joy1data, joy0data + 4 // 手柄 2 数据 +.equ clocksh, joy1data + 4 // APU 时钟计数 +.equ cpunmif, clocksh + 4 // NMI 中断标志 +.equ cpuirqf, cpunmif + 4 // IRQ 中断标志 + + + +.equ C, 0x01 // 6502 flags 6502标志 +.equ Z, 0x02 +.equ I, 0x04 +.equ D, 0x08 +.equ B, 0x10 // (always 1 except when IRQ pushes it) IRQ外部中断 +.equ R, 0x20 // (locked at 1) +.equ V, 0x40 +.equ N, 0x80 + + +.equ CYC_C, 0x01 // Carry bit 进位 +.equ BRANCH, 0x02 // branch instruction encountered 遇到分支指令 +.equ CYC_I, 0x04 // IRQ mask +.equ CYC_D, 0x08 // Decimal bit 小数位 +.equ CYC_V, 0x40 // Overflow bit 溢出位 +.equ CYC_MASK, 0xFF // CYCLE-1 ;Mask + + + + diff --git a/Project/Src/NES/6502mac_gcc.S b/Project/Src/NES/6502mac_gcc.S new file mode 100644 index 0000000..b44ccc2 --- /dev/null +++ b/Project/Src/NES/6502mac_gcc.S @@ -0,0 +1,548 @@ + + + + + +.include "6502def.s" + + +// 将 6502 PC 地址转换为 ROM 偏移地址 +.macro encodePC + and r1, m6502_pc, #0xE000 // r9 & 0xE000 + ldr r2, =memmap_tbl + add r2, globalptr // 加载内存映射表地址到 r2 + lsr r0, r1, #11 // >>11位 + ldr r0, [r2, r0] // 从 r2 + r0 加载数据到 r0 + str r0, [globalptr,#lastbank] // 保存当前 bank 偏移 + add m6502_pc, m6502_pc, r0 // m6502_pc += r0 +.endm + +// 打包 6502 标志到 r0 +.macro encodeP extra + and r0, r8, #0x4F // CYC_V+CYC_D+CYC_I+CYC_C + tst r3, #0x80000000 // PSR_N + IT NE + orrne r0, r0, #N // 设置 N 标志 + tst r3, #0xFF // Z 标志 + IT EQ + orreq r0, r0, #Z // 设置 Z 标志 + orr r0, r0, \extra // 添加额外标志 (B/R) +.endm + +// 解包 r0 中的 6502 标志 +.macro decodeP + bic r8, r8, #0x4F // 清除 CYC_V+CYC_D+CYC_I+CYC_C + and r1, r0, #V+D+I+C // 提取 V/D/I/C 标志 + orr r8, r8, r1 // 写入 cycles + bic r3, r0, #0xFD // r0 is signed + eor r3, r3, #Z // 反转 Z 位 +.endm + +// 获取下一条指令并执行 +.macro fetch count + ldr r0, [globalptr,#clocksh] + add r0, r0, \count + str r0, [globalptr,#clocksh] + + ldr r1, [globalptr,#opz] + subs r8, r8, \count * 256 + + IT PL + ldrbpl r0, [r9], #1 + + IT PL + ldrpl pc, [r1, r0, lsl #2] + + ldr pc, [globalptr,#nexttimeout] +.endm + +// 同上，但考虑 Carry 位 +.macro fetch_c count + ldr r0, [globalptr,#clocksh] + add r0, r0, \count + str r0, [globalptr,#clocksh] + + ldr r1, [globalptr,#opz] + sbcs r8, r8, \count * 256 + + IT PL + ldrbpl r0, [r9], #1 + + IT PL + ldrpl pc, [r1, r0, lsl #2] + + ldr pc, [globalptr,#nexttimeout] +.endm + +// 清除周期标志 +.macro clearcycles + and r8, r8, #0xFF // CYC_MASK +.endm + +// 绝对地址读取 +.macro readmemabs + and r1, r12, #0xE000 + adr lr, 0f + lsr r1, r1, #11 + ldr pc, [r4, r1] +0: +.endm + +// 零页读取 +.macro readmemzp + ldrb r0, [r11, r12] +.endm + +// 零页索引读取（带高位） +.macro readmemzpi + lsr r0, r12, #24 + ldrb r0, [r11, r0] +.endm + +// RAM 读取并设置 NZ +.macro readmemzps + ldrsb r3, [r11, r12] +.endm + +// 立即数读取 +.macro readmemimm + ldrb r0, [r9], #1 +.endm + +// 立即数读取并设置 NZ +.macro readmemimms + ldrsb r3, [r9], #1 +.endm + +// 根据类型选择读取方式 +.macro readmem + .if _type == _ABS + readmemabs + .elseif _type == _ZP + readmemzp + .elseif _type == _ZPI + readmemzpi + .elseif _type == _IMM + readmemimm + .endif +.endm + +// 带符号扩展的读取 +.macro readmems + .if _type == _ABS + readmemabs + orr r3, r0, r0, lsl #24 + .elseif _type == _ZP + readmemzps + .elseif _type == _IMM + readmemimms + .endif +.endm + +// 绝对地址写入 +.macro writememabs + and r1, r12, #0xE000 + // adr r2, writemem_tbl + ldr r2, =writemem_tbl + add r2, r10 + + lsr r1, r1, #11 + ldr pc, [r2, r1] +0: +.endm + +// 零页写入 +.macro writememzp + strb r0, [r11, r12] +.endm + +// 零页索引写入 +.macro writememzpi + lsr r1, r12, #24 + strb r0, [r11, r1] +.endm + +// 根据类型选择写入方式 +.macro writemem + .if _type == _ABS + writememabs + .elseif _type == _ZP + writememzp + .elseif _type == _ZPI + writememzpi + .endif +.endm + +// 16位压栈 +.macro push16 + mov r1, r0, lsr #8 + ldr r2, [globalptr,#m6502_s] + strb r1, [r2], #-1 + orr r2, r2, #0x100 + strb r0, [r2], #-1 + strb r2, [globalptr,#m6502_s] +.endm + +// 8位压栈 +.macro push8 x + ldr r2, [globalptr,#m6502_s] + strb \x, [r2], #-1 + strb r2, [globalptr,#m6502_s] +.endm + +// 16位弹栈 +.macro pop16 + ldrb r2, [globalptr,#m6502_s] + add r2, r2, #2 + strb r2, [globalptr,#m6502_s] + ldr r2, [globalptr,#m6502_s] + ldrb r0, [r2], #-1 + orr r2, r2, #0x100 + ldrb r9, [r2] + orr r9, r9, r0, lsl #8 +.endm + +// 8位弹栈（带符号扩展） +.macro pop8 x + ldrb r2, [globalptr,#m6502_s] + add r2, r2, #1 + strb r2, [globalptr,#m6502_s] + orr r2, r2, #0x100 + ldrsb \x, [r11, r2] +.endm + +// 定义寻址模式常量 +.equ _IMM, 1 +.equ _ZP, 2 +.equ _ZPI, 3 +.equ _ABS, 4 + +// 绝对寻址 +.macro doABS +.set _type, _ABS + ldrb r12, [r9], #1 + ldrb r0, [r9], #1 + orr r12, r12, r0, lsl #8 +.endm + +// X寄存器绝对索引 +.macro doAIX +.set _type, _ABS + ldrb r12, [r9], #1 + ldrb r0, [r9], #1 + orr r12, r12, r0, lsl #8 + add r12, r12, r6, lsr #24 +.endm + +// Y寄存器绝对索引 +.macro doAIY +.set _type, _ABS + ldrb r12, [r9], #1 + ldrb r0, [r9], #1 + orr r12, r12, r0, lsl #8 + add r12, r12, r7, lsr #24 +.endm + +// 立即数寻址 +.macro doIMM +.set _type, _IMM +.endm + +// X寄存器间接寻址 +.macro doIIX +.set _type, _ABS + ldrb r0, [r9], #1 + add r0, r6, r0, lsl #24 + lsr r12, r0, #24 + ldrb r12, [r11, r12] + add r0, r0, #0x01000000 + lsr r1, r0, #24 + ldrb r1, [r11, r1] + orr r12, r12, r1, lsl #8 +.endm + +// Y寄存器间接寻址 +.macro doIIY +.set _type, _ABS + ldrb r0, [r9], #1 + ldrb r12, [r11, r0] + add r0, r0, r11 + ldrb r1, [r0, #1] + orr r12, r12, r1, lsl #8 + add r12, r12, r7, lsr #24 +.endm + +// 零页间接寻址 +.macro doZPI +.set _type, _ABS + ldrb r0, [r9], #1 + ldrb r12, [r11, r0] + add r0, r0, r11 + ldrb r1, [r0, #1] + orr r12, r12, r1, lsl #8 +.endm + +// 零页寻址 +.macro doZ +.set _type, _ZP + ldrb r12, [r9], #1 +.endm + +// 零页双字节寻址（用于 bbr/bbs） +.macro doZ2 +.set _type, _ZP + ldrb r12, [r9], #2 +.endm + +// 零页X索引 +.macro doZIX +.set _type, _ZP + ldrb r12, [r9], #1 + add r12, r12, r6, lsr #24 + and r12, r12, #0xff +.endm + +// 零页X索引（带左移） +.macro doZIXf +.set _type, _ZPI + ldrb r12, [r9], #1 + add r12, r6, r12, lsl #24 +.endm + +// 零页Y索引 +.macro doZIY +.set _type, _ZP + ldrb r12, [r9], #1 + add r12, r12, r7, lsr #24 + and r12, r12, #0xff +.endm + +// 零页Y索引（带左移） +.macro doZIYf +.set _type, _ZPI + ldrb r12, [r9], #1 + add r12, r7, r12, lsl #24 +.endm + +// ADC 操作 +.macro opADC + readmem + movs r1, r8, lsr #1 + + IT CS + subcs r0, r0, #0x00000100 + adcs r5, r5, r0, ror #8 + + mov r3, r5, asr #24 + orr r8, r8, #CYC_C+CYC_V + + IT VC + bicvc r8, r8, #CYC_V +.endm + +// AND 操作 +.macro opAND + readmem + and r5, r5, r0, lsl #24 + mov r3, r5, asr #24 +.endm + +// ASL 操作 +.macro opASL + readmem + add r0, r0, r0 + orrs r3, r0, r0, lsl #24 + orr r8, r8, #CYC_C + writemem +.endm + +// BIT 操作 +.macro opBIT + readmem + bic r8, r8, #CYC_V + tst r0, #V + + IT NE + orrne r8, r8, #CYC_V + + and r3, r0, r5, lsr #24 + orr r3, r3, r0, lsl #24 +.endm + +// 比较操作 +.macro opCOMP x + readmem + subs r3, \x, r0, lsl #24 + mov r3, r3, asr #24 + orr r8, r8, #CYC_C +.endm + +// 减一操作 +.macro opDEC + readmem + sub r0, r0, #1 + orr r3, r0, r0, lsl #24 + writemem +.endm + +// 异或操作 +.macro opEOR + readmem + eor r5, r5, r0, lsl #24 + mov r3, r5, asr #24 +.endm + +// 加一操作 +.macro opINC + readmem + add r0, r0, #1 + orr r3, r0, r0, lsl #24 + writemem +.endm + +// 加载操作 +.macro opLOAD x + readmems + mov \x, r3, lsl #24 +.endm + +// 逻辑右移 +.macro opLSR + .if _type == _ABS + readmemabs + movs r0, r0, lsr #1 + orr r8, r8, #CYC_C + mov r3, r0 + writememabs + .elseif _type == _ZP + ldrb r3, [r11, r12] + movs r3, r3, lsr #1 + orr r8, r8, #CYC_C + strb r3, [r11, r12] + .elseif _type == _ZPI + lsr r3, r12, #24 + ldrb r3, [r11, r3] + movs r3, r3, lsr #1 + orr r8, r8, #CYC_C + lsr r1, r12, #24 + strb r3, [r11, r1] + .endif +.endm + +// OR 操作 +.macro opORA + readmem + orr r5, r5, r0, lsl #24 + mov r3, r5, asr #24 +.endm + +// 循环左移 +.macro opROL + readmem + movs r8, r8, lsr #1 + adc r0, r0, r0 + orrs r3, r0, r0, lsl #24 + adc r8, r8, r8 + writemem +.endm + +// 循环右移 +.macro opROR + readmem + movs r8, r8, lsr #1 + + IT CS + orrcs r0, r0, #0x100 + + movs r0, r0, lsr #1 + orr r3, r0, r0, lsl #24 + adc r8, r8, r8 + writemem +.endm + +// 带进位减法 +.macro opSBC + readmem + movs r1, cycles, lsr #1 + sbcs m6502_a, m6502_a, r0, lsl #24 + and m6502_a, m6502_a, #0xff000000 + mov m6502_nz, m6502_a, asr #24 + orr cycles, cycles, #CYC_C | CYC_V + + IT VC + bicvc cycles, cycles, #CYC_V +.endm + + +.macro opSTORE x + mov r0, \x, lsr #24 + writemem +.endm + +@ .global main +@ .type main, %function +@ mian: +@ encodePC +@ encodeP (B+R) +@ encodeP (R) +@ decodeP +@ fetch 10 +@ fetch_c 10 + +@ clearcycles +@ readmemabs +@ readmemzp +@ readmemzpi +@ readmemzps +@ readmemimm +@ readmemimms +@ readmem +@ readmems +@ writememabs +@ writememzp +@ writememzpi +@ writemem +@ push16 +@ push8 r0 +@ pop16 +@ pop8 r0 +@ doABS +@ doAIX +@ doAIY +@ doIMM +@ doIIX +@ doIIY +@ doZPI +@ doZ +@ doZ2 +@ doZIX +@ doZIXf +@ doZIY +@ doZIYf +@ opADC +@ opAND +@ opASL +@ opBIT +@ opCOMP r5 +@ opDEC +@ opEOR +@ opINC +@ opLOAD r5 +@ opLSR +@ opORA +@ opROL +@ opROR +@ opSBC +@ opSTORE r5 + + + + + + + + + + + + diff --git a/Project/make.py b/Project/make.py index c83a6c6..5c41438 100644 --- a/Project/make.py +++ b/Project/make.py @@ -70,7 +70,8 @@ INC=[ '-ISrc/rt-thread', '-ISrc/rt-thread/include', # '-ISrc/sqlite3', - '-ISrc/zlib' + '-ISrc/zlib', + '-ISrc/NES' ] SRC_DIR=[ @@ -128,6 +129,13 @@ SRC=[ 'Src/MP3/helix/arm/asmmisc_gcc.s', 'Src/MP3/helix/arm/asmpoly_thumb2_gcc.s', 'Src/MY/syscalls.c', + + 'Src/NES/6502_gcc.S', + 'Src/NES/6502cart_gcc.S', + 'Src/NES/nes_apu.c', + 'Src/NES/nes_main.c', + 'Src/NES/nes_ppu.c', + 'Src/NES/nes_mapper.c', ] LD_FILE="stm32f429ighx_flash.ld" @@ -303,7 +311,7 @@ def build_target(src:list): if(check_rebuild(dst,obj_list)): rsp=f"{' '.join(obj_list)} -o {dst} {flags} \ -T{LD_FILE} -lc -lm -lnosys -Wl,-Map={OUTPUT}/{TARGET}.map,--cref -Wl,--gc-sections \ - -Wl,--no-warn-rwx-segments -Wl,-print-memory-usage" + -Wl,-print-memory-usage" print(f"閾炬帴 {dst}") with open(f"{OUTPUT}/{TARGET}.rsp",'w+') as f: f.write(rsp.replace('\\','/'))