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10 Commits
a1253887f3
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66c0004459
Author | SHA1 | Date | |
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66c0004459 | ||
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0530972eb4 | |||
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e03aefba9d | ||
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ae075e4ca0 | ||
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9d0c9708f8 |
@@ -1,15 +0,0 @@
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; *************************************************************
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||||
; *** Scatter-Loading Description File generated by uVision ***
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||||
; *************************************************************
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||||
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LR_IROM1 0x08000000 0x00200000 { ; load region size_region
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ER_IROM1 0x08000000 0x00200000 { ; load address = execution address
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*.o (RESET, +First)
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*(InRoot$$Sections)
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.ANY (+RO)
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}
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RW_IRAM1 0x20000008 0x0002FFF8 { ; RW data
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.ANY (+RW +ZI)
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}
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}
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|
@@ -1,27 +0,0 @@
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; *************************************************************
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||||
; *** Scatter-Loading Description File generated by uVision ***
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||||
; *************************************************************
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||||
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||||
LR_IROM1 0x08020000 0x001E0000 { ; load region size_region
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ER_IROM1 0x08020000 0x001E0000 { ; load address = execution address
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*.o (RESET, +First)
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*(InRoot$$Sections)
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.ANY (+RO)
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}
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bsp_init +0 {
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*.o(bsp_init)
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}
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sys_api +0 {
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*.o(sys_api)
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}
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libc_dev +0 {
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*.o(libc_dev)
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}
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name +0{
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*.o(name)
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}
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RW_IRAM1 0x2000000C 0x0002FFF4 { ; RW data
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.ANY (+RW +ZI)
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}
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}
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|
File diff suppressed because it is too large
Load Diff
@@ -3,7 +3,6 @@
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#include "stm32f4xx.h"
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#define LCD_CLK 9 // <20><><EFBFBD><EFBFBD>LCD<43><44><EFBFBD><EFBFBD>ʱ<EFBFBD>ӣ<EFBFBD><D3A3><EFBFBD><EFBFBD><EFBFBD>Ϊ<EFBFBD>˷<EFBFBD><CBB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵӦ<D6B5><D3A6>10-70֮<30>䣬<EFBFBD><E4A3AC>λΪM
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#define HBP 40
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@@ -24,7 +23,6 @@
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//
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#define LCD_MemoryAdd_OFFSET ((uint32_t)LCD_Width * LCD_Height * 4 * 3)
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/*---------------------- <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> -------------------------*/
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void LCD_Init(void);
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void LCD_Backlight(u8 power);
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@@ -32,8 +30,10 @@ void LCD_Backlight (u8 power);
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/*-----------------------<2D><><EFBFBD>Ŷ<EFBFBD><C5B6><EFBFBD>--------------------------*/
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// IO<49><4F>ʱ<EFBFBD><CAB1>
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#define LCD_GPIO_CLK RCC_AHB1Periph_GPIOA | RCC_AHB1Periph_GPIOB | RCC_AHB1Periph_GPIOC | RCC_AHB1Periph_GPIOD \
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| RCC_AHB1Periph_GPIOJ | RCC_AHB1Periph_GPIOK | RCC_AHB1Periph_GPIOI
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#define LCD_GPIO_CLK \
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RCC_AHB1Periph_GPIOA | RCC_AHB1Periph_GPIOB | RCC_AHB1Periph_GPIOC | \
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RCC_AHB1Periph_GPIOD | RCC_AHB1Periph_GPIOJ | RCC_AHB1Periph_GPIOK | \
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RCC_AHB1Periph_GPIOI
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// <20><>ɫ<EFBFBD><C9AB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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#define LTDC_R0_PORT GPIOI
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@@ -156,56 +156,14 @@ void LCD_Backlight (u8 power);
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#define COLOR565TO888(color) ((((color)&0xf800)<<8)|((color)&0x07e0)<<5|(((color)&0x001f)<<3))
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#define COLOR888TO565(color) ((((color)>>8)&0xf800)|(((color)>>5)&0x07e0)|(((color)>>3)&0x001f))
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//<2F><>RGBת<42><D7AA>Ϊ565<36><35>ʽ
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#define RGB(r,g,b) ((((r)>>3)<<11)|(((g)>>2)<<5)|((b)>>3))
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//RGBת<42>Ҷ<EFBFBD>
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#define RGB2GRAY(rgb16) (((((rgb16)&0xf800)>>8)+(((rgb16)&0x07e0)>>3)+(((rgb16)&0x001f)<<3))/3)
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//<2F>Ҷ<EFBFBD>תRGB
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#define GRAY2RGB(gray) ((((gray)>>3)<<11)|(((gray)>>2)<<5)|((gray)>>3))
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//#define U8 unsigned char
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//#define U16 unsigned short
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//#define U32 unsigned
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//extern u32* LCD_ADDR;
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//extern u32* LCD_ADDR1;
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//typedef struct
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//{
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// u32 BackColor; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɫ
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// u32 Color; //ǰ<><C7B0><EFBFBD><EFBFBD>ɫ
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// u32 ScreenDis; //<2F><>Ļ<EFBFBD><C4BB>ʾ<EFBFBD><CABE><EFBFBD><EFBFBD><EFBFBD><EFBFBD>0<EFBFBD><30>1
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// u32 DrawMode; //<2F><><EFBFBD><EFBFBD>ģʽ<C4A3><CABD>0<EFBFBD><30><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ǰ<EFBFBD><C7B0>ɫʱ<C9AB><CAB1><EFBFBD>Ʊ<EFBFBD><C6B1><EFBFBD>ɫ<EFBFBD><C9AB>1<EFBFBD><31><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ǰ<EFBFBD><C7B0>ɫʱ<C9AB><CAB1><EFBFBD><EFBFBD><EFBFBD>Ʊ<EFBFBD><C6B1><EFBFBD>ɫ
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// u16 *DrawAddr; //<2F><><EFBFBD><EFBFBD><EFBFBD>Դ<EFBFBD><D4B4><EFBFBD>ַ
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// u32 LcdAddr; //<2F><>ǰָ<C7B0><D6B8><EFBFBD><EFBFBD><EFBFBD>Դ<EFBFBD><D4B4><EFBFBD>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD>ִ<EFBFBD><D6B4><EFBFBD>л<EFBFBD>
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// u32 LcdSwitchEn; //1,<2C><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD>л<EFBFBD><D0BB><EFBFBD>LcdAddrָ<72><D6B8><EFBFBD><EFBFBD><EFBFBD>Դ<EFBFBD><D4B4><EFBFBD>ַ<EFBFBD><D6B7>0<EFBFBD><30><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>л<EFBFBD>
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// int LayerBuffEnter; //<2F><><EFBFBD>뻺<EFBFBD><EBBBBA><EFBFBD><EFBFBD><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD>
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// int WindowSrcX; //<2F><><EFBFBD>ƴ<EFBFBD><C6B4><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD>
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// int WindowSrcY; //
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// int WindowDstX;
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// int WindowDstY;
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//} LCD_Struct;
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typedef struct
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{
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typedef struct {
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int xs;
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int ys;
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int xe;
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int ye;
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} LCD_WindowStruct;
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typedef struct
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{
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typedef struct {
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int x_size;
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int y_size;
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int color;
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@@ -220,25 +178,15 @@ typedef struct
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int LayerBuffEnter;
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} LCD_Struct;
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// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>LCD<43><44><EFBFBD><EFBFBD><EFBFBD>ó<EFBFBD>ʼ<EFBFBD><CABC>
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//
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void LCD_LayerInit(void);
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// <20><>ȡͼ<C8A1><CDBC><EFBFBD><EFBFBD>ʾ<EFBFBD><CABE>ַ
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u32 *LCD_GetShowAddr(void);
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// <20><>ȡͼ<C8A1><CDBC><EFBFBD><EFBFBD><EFBFBD>Ƶ<EFBFBD>ַ
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u32 *LCD_GetDrawAddr(void);
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u32 LCD_SetLayer(u32 AddrIndex);
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u32 LCD_SetDrawLayer(u32 Index);
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@@ -280,7 +228,6 @@ void LCD_SwitchLayerBuff (void);
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// <20>˳<EFBFBD><CBB3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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void LCD_ExitLayerBuff(void);
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// <20><><EFBFBD>û<C3BB><EEB6AF><EFBFBD><EFBFBD>
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void LCD_SetWindow(int x_s, int y_s, int x_size, int y_size);
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@@ -320,10 +267,12 @@ void LCD_FillRectByColorAlpha (int x,int y,int x_size,int y_size,u8 alpha);
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// void LCD_FillRectOff16 (u16 *buff,int x_s,int y_s,int xsize,int ysize);
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void LCD_FillRectOff16At (int s_x,int s_y,int s_xsize,int s_ysize,u16 *buff,int x_s,int y_s,int xsize,int ysize);
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void LCD_FillRectOff16At(int s_x, int s_y, int s_xsize, int s_ysize, u16 *buff,
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int x_s, int y_s, int xsize, int ysize);
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// <20><><EFBFBD><EFBFBD><EFBFBD><CDB8><EFBFBD>ȵ<EFBFBD>ͼƬ<CDBC><C6AC><EFBFBD><EFBFBD>
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void LCD_FillRectOffAtAlpha (int s_x,int s_y,int s_xsize,int s_ysize,void *buff,int x_s,int y_s,int xsize,int ysize);
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void LCD_FillRectOffAtAlpha(int s_x, int s_y, int s_xsize, int s_ysize,
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void *buff, int x_s, int y_s, int xsize, int ysize);
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void LCD_GetColors(u16 *buff, int x_s, int y_s, int x_size, int y_size);
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|
File diff suppressed because it is too large
Load Diff
@@ -1,6 +1,6 @@
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#include "mywin_inc.h"
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#include "ff.h"
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// #include "nes_main.h"
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#include "nes_main.h"
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#include "gif.h"
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#include "system_updata.h"
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#include "avi.h"
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@@ -347,7 +347,7 @@ void FILDER_OpenFile(WIN_FilderStruct *filder)
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{
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FILDER_GetFileRoute(filder);
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WIN_KeyShieldOn();
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// nes_load ((u8*)filder->fileName,LCD_GetShowAddr(),LCD_GetLcdSizeX()/2-128,LCD_GetLcdSizeY()/2-120);
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nes_load ((u8*)filder->fileName,LCD_GetShowAddr(),LCD_GetLcdSizeX()/2-128,LCD_GetLcdSizeY()/2-120);
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WIN_KeyShieldOff();
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}
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else if (strcmp(p_str, ".avi") == 0)
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@@ -589,7 +589,7 @@ static void FILDER_Enter(WIN_FilderStruct *filder, int x, int y)
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// <20>ļ<EFBFBD><C4BC><EFBFBD>Ϣ
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char *txt_buff = mymalloc(512);
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FILDER_GetFileRoute(filder);
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sprintf(txt_buff, "·<EFBFBD><EFBFBD><EFBFBD><EFBFBD>%s\n<EFBFBD><EFBFBD>С<EFBFBD><EFBFBD>%lld Byte", filder->fileName, filder->file[filder->index].size);
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sprintf(txt_buff, "·<EFBFBD><EFBFBD><EFBFBD><EFBFBD>%s\n<EFBFBD><EFBFBD>С<EFBFBD><EFBFBD>%u Byte", filder->fileName, (uint32_t)filder->file[filder->index].size);
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MSGBOX_Tips((WIN_WindowStruct *)filder, "<EFBFBD>ļ<EFBFBD><EFBFBD><EFBFBD>Ϣ", txt_buff, "ȷ<EFBFBD><EFBFBD>");
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myfree(txt_buff);
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}
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|
File diff suppressed because it is too large
Load Diff
1365
Project/Src/NES/6502_gcc.S
Normal file
1365
Project/Src/NES/6502_gcc.S
Normal file
File diff suppressed because it is too large
Load Diff
207
Project/Src/NES/6502cart_gcc.S
Normal file
207
Project/Src/NES/6502cart_gcc.S
Normal file
@@ -0,0 +1,207 @@
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.syntax unified
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.cpu cortex-m4
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.fpu softvfp
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.thumb
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.text
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.include "6502def.s"
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.extern NES_RAM
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.extern NES_SRAM
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.extern CPU_reset
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.extern romfile
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.extern cpu_data
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.extern op_table
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.global cpu6502_init
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.global map67_
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.global map89_
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.global mapAB_
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.global mapCD_
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.global mapEF_
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.type cpu6502_init, %function
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cpu6502_init:
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// ѹջ
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stmfd sp!,{r4-r11,lr}
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// <EFBFBD>Ѷ<EFBFBD>ȡcpu<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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ldr r10,=cpu_data
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// <EFBFBD><EFBFBD>NES_RAM<EFBFBD><EFBFBD>ַָ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ص<EFBFBD>r11<EFBFBD><EFBFBD>
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ldr r11,=NES_RAM
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ldr r11,[r11]
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// <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ڴ<EFBFBD>ӳ<EFBFBD><EFBFBD>
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str r11,[globalptr,#memmap_tbl]
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str r11,[globalptr,#memmap_tbl+4]
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str r11,[globalptr,#memmap_tbl+8]
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ldr r0,=NES_SRAM
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ldr r0,[r0]
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str r0,[globalptr,#memmap_tbl+12]
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// <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ת<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַָ<EFBFBD><EFBFBD>
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ldr r0,=op_table
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str r0,[globalptr,#opz]
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|
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// <EFBFBD><EFBFBD><EFBFBD><EFBFBD>rom<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
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ldr r0,=romfile
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ldr r0,[r0] // R0<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><EFBFBD>ROMӳ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD><EFBFBD>
|
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add r3,r0,#16 // r3<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><EFBFBD>rom<EFBFBD><EFBFBD><EFBFBD><EFBFBD>(<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD><EFBFBD>
|
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str r3,[globalptr,#rombase] // <EFBFBD><EFBFBD><EFBFBD><EFBFBD>rom<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
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|
||||
mov r2,#1
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ldrb r1,[r3,#-12] // 16kB PROM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ŀ 2
|
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rsb r0,r2,r1,lsl#14 // romsize=X*16KB <<14 <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><EFBFBD> r0=0x7fff
|
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str r0,[globalptr,#rommask] // rommask=promsize-1 32768-1
|
||||
|
||||
mov r9,#0 // (<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>κ<EFBFBD>encodePC<EFBFBD><EFBFBD>ӳ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>*<EFBFBD><EFBFBD>ʼ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>еĴ<EFBFBD><EFBFBD><EFBFBD>)
|
||||
str r9,[globalptr,#lastbank] // 6502PC<EFBFBD><EFBFBD> ROM<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƫ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>д0
|
||||
|
||||
mov r0,#0 // Ĭ<EFBFBD><EFBFBD>romӳ<EFBFBD><EFBFBD>
|
||||
bl map89AB_ // 89AB=1st 16k
|
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mov r0,#-1
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||||
bl mapCDEF_ // CDEF=last 16k
|
||||
|
||||
ldrb r1,[r3,#-10] // get mapper
|
||||
ldrb r2,[r3,#-9]
|
||||
tst r2,#0x0e // long live DiskDude!
|
||||
and r1,r1,#0xf0
|
||||
and r2,r2,#0xf0
|
||||
orr r0,r2,r1,lsr#4
|
||||
IT NE
|
||||
movne r0,r1,lsr#4 // ignore high nibble if header looks bad <EFBFBD><EFBFBD><EFBFBD>Ը<EFBFBD><EFBFBD><EFBFBD>λ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
// r0=mapper<EFBFBD><EFBFBD>
|
||||
|
||||
// <EFBFBD><EFBFBD><EFBFBD><EFBFBD>дrom<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><EFBFBD>
|
||||
ldr r0,=Mapper_W
|
||||
str r0,[globalptr,#writemem_tbl+16]
|
||||
str r0,[globalptr,#writemem_tbl+20]
|
||||
str r0,[globalptr,#writemem_tbl+24]
|
||||
str r0,[globalptr,#writemem_tbl+28]
|
||||
|
||||
// cpu<EFBFBD><EFBFBD>λ
|
||||
bl CPU_reset
|
||||
ldmfd sp!,{r4-r11,lr}
|
||||
bx lr
|
||||
|
||||
|
||||
|
||||
.type map67_, %function
|
||||
map67_: // rom paging.. r0=page#
|
||||
ldr r1,[globalptr,#rommask]
|
||||
and r0,r1,r0,lsl#13
|
||||
ldr r1,[globalptr,#rombase]
|
||||
add r0,r1,r0
|
||||
sub r0,r0,#0x6000
|
||||
str r0,[globalptr,#memmap_tbl+12]
|
||||
b flush
|
||||
|
||||
.type map89_, %function
|
||||
map89_: // rom paging.. r0=page# ROM<EFBFBD><EFBFBD>ҳ
|
||||
ldr r1,[globalptr,#rombase] // rom<EFBFBD><EFBFBD>ʼ<EFBFBD><EFBFBD>ַ
|
||||
sub r1,r1,#0x8000
|
||||
ldr r2,[globalptr,#rommask]
|
||||
and r0,r2,r0,lsl#13
|
||||
add r0,r1,r0
|
||||
str r0,[globalptr,#memmap_tbl+16]
|
||||
b flush
|
||||
|
||||
.type mapAB_, %function
|
||||
mapAB_:
|
||||
ldr r1,[globalptr,#rombase]
|
||||
sub r1,r1,#0xa000
|
||||
ldr r2,[globalptr,#rommask]
|
||||
and r0,r2,r0,lsl#13
|
||||
add r0,r1,r0
|
||||
str r0,[globalptr,#memmap_tbl+20]
|
||||
b flush
|
||||
|
||||
.type mapCD_, %function
|
||||
mapCD_:
|
||||
ldr r1,[globalptr,#rombase]
|
||||
sub r1,r1,#0xc000
|
||||
ldr r2,[globalptr,#rommask]
|
||||
and r0,r2,r0,lsl#13
|
||||
add r0,r1,r0
|
||||
str r0,[globalptr,#memmap_tbl+24]
|
||||
b flush
|
||||
|
||||
.type mapEF_, %function
|
||||
mapEF_:
|
||||
ldr r1,[globalptr,#rombase]
|
||||
sub r1,r1,#0xe000
|
||||
ldr r2,[globalptr,#rommask]
|
||||
and r0,r2,r0,lsl#13
|
||||
add r0,r1,r0
|
||||
str r0,[globalptr,#memmap_tbl+28]
|
||||
b flush
|
||||
|
||||
.type map89AB_, %function
|
||||
map89AB_:
|
||||
ldr r1,[globalptr,#rombase] // rom<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD><EFBFBD>
|
||||
sub r1,r1,#0x8000
|
||||
ldr r2,[globalptr,#rommask]
|
||||
and r0,r2,r0,lsl#14
|
||||
add r0,r1,r0
|
||||
str r0,[globalptr,#memmap_tbl+16]
|
||||
str r0,[globalptr,#memmap_tbl+20]
|
||||
|
||||
flush: // update m6502_pc & lastbank
|
||||
ldr r1,[globalptr,#lastbank]
|
||||
sub r9,r9,r1
|
||||
and r1,r9,#0xE000 // //r9<EFBFBD><EFBFBD>0xe000<EFBFBD><EFBFBD>λ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
add r2, globalptr,#memmap_tbl // //<EFBFBD>Ѵ洢<EFBFBD><EFBFBD>ӳ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ<EFBFBD><EFBFBD><EFBFBD>ص<EFBFBD>r2
|
||||
lsr r1,r1,#11 // //>>11λ r1/2048
|
||||
ldr r0,[r2,r1] // //<EFBFBD><EFBFBD>ȡr2<EFBFBD><EFBFBD>ַ+r1ƫ<EFBFBD>Ƶ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݵ<EFBFBD>r0
|
||||
|
||||
str r0,[globalptr,#lastbank] // //<EFBFBD><EFBFBD><EFBFBD><EFBFBD>6502PC<EFBFBD><EFBFBD> ROM<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƫ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
add r9,r9,r0 // //m6502_pc+r0
|
||||
orr lr,#0x01 // lr<EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ<EFBFBD><EFBFBD>1<EFBFBD><EFBFBD>ֹ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>arm״̬
|
||||
bx lr
|
||||
|
||||
.type mapCDEF_, %function
|
||||
mapCDEF_:
|
||||
ldr r1,[globalptr,#rombase]
|
||||
sub r1,r1,#0xc000
|
||||
ldr r2,[globalptr,#rommask]
|
||||
and r0,r2,r0,lsl#14
|
||||
add r0,r1,r0
|
||||
str r0,[globalptr,#memmap_tbl+24]
|
||||
str r0,[globalptr,#memmap_tbl+28]
|
||||
b flush
|
||||
|
||||
.type map89ABCDEF_, %function
|
||||
map89ABCDEF_:
|
||||
ldr r1,[globalptr,#rombase]
|
||||
sub r1,r1,#0x8000
|
||||
ldr r2,[globalptr,#rommask]
|
||||
and r0,r2,r0,lsl#15
|
||||
add r0,r1,r0
|
||||
str r0,[globalptr,#memmap_tbl+16]
|
||||
str r0,[globalptr,#memmap_tbl+20]
|
||||
str r0,[globalptr,#memmap_tbl+24]
|
||||
str r0,[globalptr,#memmap_tbl+28]
|
||||
b flush
|
||||
|
||||
|
||||
.extern asm_Mapper_Write
|
||||
.type Mapper_W, %function
|
||||
Mapper_W:
|
||||
stmfd sp!,{r3,lr} // LR <EFBFBD>Ĵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ջ
|
||||
mov r1,r12
|
||||
bl asm_Mapper_Write
|
||||
ldmfd sp!,{r3,lr}
|
||||
orr lr,#0x01 // lr<EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ<EFBFBD><EFBFBD>1<EFBFBD><EFBFBD>ֹ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>arm״̬
|
||||
bx lr
|
||||
|
||||
|
||||
|
||||
@ .global main
|
||||
@ .type main, %function
|
||||
@ mian:
|
||||
@ b cpu6502_init
|
||||
|
64
Project/Src/NES/6502def.s
Normal file
64
Project/Src/NES/6502def.s
Normal file
@@ -0,0 +1,64 @@
|
||||
|
||||
|
||||
m6502_nz .req r3 // bit 31=N, Z=1 if bits 0-7=0 ;RN<52><4E><EFBFBD><EFBFBD><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD>
|
||||
m6502_rmem .req r4 // readmem_tbl
|
||||
m6502_a .req r5 // bits 0-23=0, <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ڴ<EFBFBD><EFBFBD>е<EFBFBD><EFBFBD>ֽ<EFBFBD>
|
||||
m6502_x .req r6 // bits 0-23=0
|
||||
m6502_y .req r7 // bits 0-23=0
|
||||
cycles .req r8 // also VDIC flagsҲVDIC<EFBFBD><EFBFBD>־
|
||||
m6502_pc .req r9
|
||||
globalptr .req r10 // =wram_globals* ptr
|
||||
m6502_optbl .req r10
|
||||
cpu_zpage .req r11 // =CPU_RAM
|
||||
addy .req r12 // keep this at r12 (<EFBFBD><EFBFBD>ͷ APCS) //addr :<EFBFBD><EFBFBD><EFBFBD><EFBFBD>8λ<EFBFBD><EFBFBD>ַ
|
||||
|
||||
|
||||
|
||||
|
||||
// equates.s - GCC/GAS version
|
||||
// <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ĵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ע<EFBFBD>⣺GAS <EFBFBD><EFBFBD>֧<EFBFBD><EFBFBD> RN<EFBFBD><EFBFBD>ֱ<EFBFBD><EFBFBD>ʹ<EFBFBD>üĴ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ţ<EFBFBD>
|
||||
// globalptr, r10
|
||||
// cpu_zpage <EFBFBD><EFBFBD>Ӧ r11<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><EFBFBD>
|
||||
|
||||
// <EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȫ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݽṹƫ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>൱<EFBFBD><EFBFBD> MAP 0, globalptr<EFBFBD><EFBFBD>
|
||||
// <EFBFBD><EFBFBD><EFBFBD><EFBFBD> globalptr ָ<EFBFBD><EFBFBD>һ<EFBFBD><EFBFBD><EFBFBD>ṹ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݣ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ<EFBFBD><EFBFBD><EFBFBD>ֶ<EFBFBD>ƫ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
.equ opz, 0 // <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ<EFBFBD><EFBFBD>ָ<EFBFBD><EFBFBD>
|
||||
.equ readmem_tbl, opz + 4 // <EFBFBD><EFBFBD><EFBFBD>ڴ溯<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƫ<EFBFBD><EFBFBD>
|
||||
.equ writemem_tbl, readmem_tbl + 32 // д<EFBFBD>ڴ溯<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƫ<EFBFBD><EFBFBD>
|
||||
.equ memmap_tbl, writemem_tbl + 32 // ROM/RAM ӳ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƫ<EFBFBD><EFBFBD>
|
||||
.equ cpuregs, memmap_tbl + 32 // <EFBFBD><EFBFBD><EFBFBD><EFBFBD> 6502 <EFBFBD>Ĵ<EFBFBD><EFBFBD><EFBFBD>״̬<EFBFBD><EFBFBD>ʼƫ<EFBFBD><EFBFBD>
|
||||
.equ m6502_s, cpuregs + 28 // ջָ<EFBFBD><EFBFBD> s
|
||||
.equ lastbank, m6502_s + 4 // <EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><EFBFBD> ROM bank <EFBFBD><EFBFBD>ַ
|
||||
.equ nexttimeout, lastbank + 4 // <EFBFBD>´γ<EFBFBD>ʱ<EFBFBD><EFBFBD>ת<EFBFBD><EFBFBD>ַ
|
||||
.equ rombase, nexttimeout + 4 // ROM <EFBFBD><EFBFBD>ʼ<EFBFBD><EFBFBD>ַ
|
||||
.equ romnumber, rombase + 4 // ROM <EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
.equ rommask, romnumber + 4 // ROM <EFBFBD><EFBFBD><EFBFBD>루romsize-1<EFBFBD><EFBFBD>
|
||||
.equ joy0data, rommask + 4 // <EFBFBD>ֱ<EFBFBD> 1 <EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
.equ joy1data, joy0data + 4 // <EFBFBD>ֱ<EFBFBD> 2 <EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
.equ clocksh, joy1data + 4 // APU ʱ<EFBFBD>Ӽ<EFBFBD><EFBFBD><EFBFBD>
|
||||
.equ cpunmif, clocksh + 4 // NMI <EFBFBD>жϱ<EFBFBD>־
|
||||
.equ cpuirqf, cpunmif + 4 // IRQ <EFBFBD>жϱ<EFBFBD>־
|
||||
|
||||
|
||||
|
||||
.equ C, 0x01 // 6502 flags 6502<EFBFBD><EFBFBD>־
|
||||
.equ Z, 0x02
|
||||
.equ I, 0x04
|
||||
.equ D, 0x08
|
||||
.equ B, 0x10 // (always 1 except when IRQ pushes it) IRQ<EFBFBD>ⲿ<EFBFBD>ж<EFBFBD>
|
||||
.equ R, 0x20 // (locked at 1)
|
||||
.equ V, 0x40
|
||||
.equ N, 0x80
|
||||
|
||||
|
||||
.equ CYC_C, 0x01 // Carry bit <EFBFBD><EFBFBD>λ
|
||||
.equ BRANCH, 0x02 // branch instruction encountered <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ָ֧<EFBFBD><EFBFBD>
|
||||
.equ CYC_I, 0x04 // IRQ mask
|
||||
.equ CYC_D, 0x08 // Decimal bit С<EFBFBD><EFBFBD>λ
|
||||
.equ CYC_V, 0x40 // Overflow bit <EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ
|
||||
.equ CYC_MASK, 0xFF // CYCLE-1 ;Mask
|
||||
|
||||
|
||||
|
||||
|
@@ -1,512 +0,0 @@
|
||||
|
||||
C EQU 0x01 ;//6502 flags 6502<30><32>־
|
||||
Z EQU 0x02
|
||||
I EQU 0x04
|
||||
D EQU 0x08
|
||||
B EQU 0x10 ;//(allways 1 except when IRQ pushes it)IRQ<52>ⲿ<EFBFBD>ж<EFBFBD>
|
||||
R EQU 0x20 ;//(locked at 1)
|
||||
V EQU 0x40
|
||||
N EQU 0x80
|
||||
|
||||
|
||||
|
||||
MACRO ;//translate from 6502 PC to rom offset<65><74><EFBFBD><EFBFBD><EFBFBD><EFBFBD>6502 PC ROM<4F><4D>ƫ<EFBFBD><C6AB><EFBFBD><EFBFBD>
|
||||
encodePC
|
||||
and r1,m6502_pc,#0xE000 ;//r9<72><39>0xe000<30><30>λ<EFBFBD><CEBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
adr r2,memmap_tbl ;//<2F>Ѵ洢<D1B4><E6B4A2>ӳ<EFBFBD><D3B3><EFBFBD><EFBFBD>ַ<EFBFBD><D6B7><EFBFBD>ص<EFBFBD>r2
|
||||
;// ldr r0,[r2,r1,lsr#11] ;//<2F>Ĺ<EFBFBD><C4B9><EFBFBD><EFBFBD><EFBFBD>2<EFBFBD><32>
|
||||
lsr r0,r1,#11 ;//>>11λ r1/2048
|
||||
ldr r0,[r2,r0] ;//<2F><>ȡr2<72><32>ַ+r1ƫ<31>Ƶ<EFBFBD><C6B5><EFBFBD><EFBFBD>ݵ<EFBFBD>r0
|
||||
|
||||
str r0,lastbank ;//<2F><><EFBFBD><EFBFBD>6502PC<50><43> ROM<4F><4D><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƫ<EFBFBD><C6AB><EFBFBD><EFBFBD>
|
||||
add m6502_pc,m6502_pc,r0 ;//m6502_pc+r0
|
||||
MEND
|
||||
|
||||
MACRO ;//pack 6502 flags into r0 6502<30><32>־<EFBFBD><D6BE>װ<EFBFBD><D7B0>R0
|
||||
encodeP $extra
|
||||
and r0,cycles,#CYC_V+CYC_D+CYC_I+CYC_C
|
||||
tst m6502_nz,#0x80000000;//PSR_N
|
||||
orrne r0,r0,#N ;N
|
||||
tst m6502_nz,#0xff
|
||||
orreq r0,r0,#Z ;Z
|
||||
orr r0,r0,#$extra ;R(&B)
|
||||
MEND
|
||||
|
||||
MACRO ;//;<3B>궨<EFBFBD><EAB6A8>//unpack 6502 flags from r0 <20><>ѹ<EFBFBD><D1B9>6502<30><32>R0<52>ı<EFBFBD>־
|
||||
decodeP
|
||||
bic cycles,cycles,#CYC_V+CYC_D+CYC_I+CYC_C
|
||||
and r1,r0,#V+D+I+C
|
||||
orr cycles,cycles,r1 ;//VDIC
|
||||
bic m6502_nz,r0,#0xFD ;//r0 is signed
|
||||
eor m6502_nz,m6502_nz,#Z
|
||||
MEND ;// ;<3B>궨<EFBFBD><EAB6A8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
MACRO
|
||||
fetch $count ;//<2F><>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD> ;$<24><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> $<24><><EFBFBD><EFBFBD>1<EFBFBD><31>$<24><><EFBFBD><EFBFBD>2<EFBFBD><32>...
|
||||
;//---------------------------------------------------------------------
|
||||
ldr r0,clocksh ;//<2F><><EFBFBD><EFBFBD>apu<70><75>Ҫ<EFBFBD><D2AA>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>
|
||||
add r0,r0,#$count
|
||||
str r0,clocksh
|
||||
|
||||
ldr r1,opz ;//<2F><>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ת<EFBFBD><D7AA><EFBFBD><EFBFBD>ַ
|
||||
;//-------------------------------------------------------------------------
|
||||
subs cycles,cycles,#$count*256;//CYCLE=256 ;// 3*256 <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>0<EFBFBD><30>ִ<EFBFBD><D6B4><EFBFBD><EFBFBD>2<EFBFBD><32>ָ<EFBFBD><D6B8>
|
||||
ldrplb r0,[m6502_pc],#1 ; //<2F>Ӵ洢<D3B4><E6B4A2><EFBFBD>м<EFBFBD><D0BC><EFBFBD><EFBFBD>ֽڵ<D6BD>һ<EFBFBD><D2BB><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD> r0=<3D><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
; ldrpl pc,[m6502_optbl,r0,lsl#2] ;//r10 ********r0=r0x4***<2A><><EFBFBD>д<EFBFBD><D0B4><EFBFBD><EFBFBD>ĵ<EFBFBD>ַ**************************************
|
||||
ldrpl pc,[r1,r0,lsl#2]
|
||||
ldr pc,nexttimeout
|
||||
MEND
|
||||
|
||||
MACRO ;//<2F><>ͬ<EFBFBD><CDAC><EFBFBD><EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˽<EFBFBD>λ<EFBFBD><CEBB>λ0<CEBB><30>
|
||||
fetch_c $count ;//same as fetch except it adds the Carry (bit 0) also.
|
||||
;//---------------------------------------------------------------------
|
||||
ldr r0,clocksh ;//<2F><><EFBFBD><EFBFBD>apu<70><75>Ҫ<EFBFBD><D2AA>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>
|
||||
add r0,r0,#$count
|
||||
str r0,clocksh
|
||||
|
||||
ldr r1,opz ;//<2F><>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ת<EFBFBD><D7AA><EFBFBD><EFBFBD>ַ
|
||||
;//-------------------------------------------------------------------------
|
||||
sbcs cycles,cycles,#$count*256;//CYCLE=256
|
||||
ldrplb r0,[m6502_pc],#1
|
||||
; ldrpl pc,[m6502_optbl,r0,lsl#2]
|
||||
ldrpl pc,[r1,r0,lsl#2]
|
||||
ldr pc,nexttimeout
|
||||
MEND
|
||||
|
||||
MACRO
|
||||
clearcycles
|
||||
and cycles,cycles,#CYC_MASK ;Save CPU bits
|
||||
MEND
|
||||
|
||||
MACRO
|
||||
readmemabs
|
||||
and r1,addy,#0xE000
|
||||
adr lr,%F0
|
||||
;// ldr pc,[m6502_rmem,r1,lsr#11] ;//in: addy,r1=addy&0xE000 (for rom_R)
|
||||
lsr r1,r1,#11 ;//<2F>Ĺ<EFBFBD><C4B9><EFBFBD><EFBFBD><EFBFBD>2<EFBFBD><32> >>11
|
||||
ldr pc,[m6502_rmem,r1]
|
||||
|
||||
0 ;//out: r0=val (bits 8-31=0 (LSR,ROR,INC,DEC,ASL)), addy preserved for RMW instructions
|
||||
MEND
|
||||
|
||||
MACRO
|
||||
readmemzp
|
||||
ldrb r0,[cpu_zpage,addy]
|
||||
MEND
|
||||
|
||||
MACRO
|
||||
readmemzpi
|
||||
;// ldrb r0,[cpu_zpage,addy,lsr#24]
|
||||
lsr r0,addy,#24 ;//<2F>Ĺ<EFBFBD><C4B9><EFBFBD><EFBFBD><EFBFBD>3<EFBFBD><33>
|
||||
ldrb r0,[cpu_zpage,r0]
|
||||
|
||||
MEND
|
||||
|
||||
MACRO
|
||||
readmemzps
|
||||
ldrsb m6502_nz,[cpu_zpage,addy];RAM
|
||||
MEND
|
||||
|
||||
MACRO
|
||||
readmemimm
|
||||
ldrb r0,[m6502_pc],#1 ;ROM
|
||||
MEND
|
||||
|
||||
MACRO
|
||||
readmemimms
|
||||
ldrsb m6502_nz,[m6502_pc],#1
|
||||
MEND
|
||||
|
||||
MACRO
|
||||
readmem
|
||||
[ _type = _ABS
|
||||
readmemabs
|
||||
]
|
||||
[ _type = _ZP
|
||||
readmemzp
|
||||
]
|
||||
[ _type = _ZPI
|
||||
readmemzpi
|
||||
]
|
||||
[ _type = _IMM
|
||||
readmemimm
|
||||
]
|
||||
MEND
|
||||
|
||||
MACRO
|
||||
readmems
|
||||
[ _type = _ABS
|
||||
readmemabs
|
||||
orr m6502_nz,r0,r0,lsl#24
|
||||
]
|
||||
[ _type = _ZP
|
||||
readmemzps
|
||||
]
|
||||
[ _type = _IMM
|
||||
readmemimms
|
||||
]
|
||||
MEND
|
||||
|
||||
|
||||
MACRO
|
||||
writememabs
|
||||
and r1,addy,#0xe000
|
||||
adr r2,writemem_tbl
|
||||
adr lr,%F0
|
||||
;// ldr pc,[r2,r1,lsr#11] ;//in: addy,r0=val(bits 8-31=?)
|
||||
lsr r1,r1,#11 ;//<2F>Ĺ<EFBFBD><C4B9><EFBFBD><EFBFBD><EFBFBD>2<EFBFBD><32> >>11
|
||||
ldr pc,[r2,r1]
|
||||
|
||||
0 ;out: r0,r1,r2,addy=?
|
||||
MEND
|
||||
|
||||
MACRO
|
||||
writememzp
|
||||
strb r0,[cpu_zpage,addy]
|
||||
MEND
|
||||
|
||||
MACRO
|
||||
writememzpi
|
||||
;// strb r0,[cpu_zpage,addy,lsr#24]
|
||||
lsr r1,addy,#24 ;//<2F>Ĺ<EFBFBD><C4B9><EFBFBD><EFBFBD><EFBFBD>2<EFBFBD><32> >>24
|
||||
strb r0,[cpu_zpage,r1]
|
||||
|
||||
|
||||
MEND
|
||||
|
||||
MACRO
|
||||
writemem ;//д<>ڴ<EFBFBD>
|
||||
[ _type = _ABS
|
||||
writememabs
|
||||
]
|
||||
[ _type = _ZP
|
||||
writememzp
|
||||
]
|
||||
[ _type = _ZPI
|
||||
writememzpi
|
||||
]
|
||||
MEND
|
||||
;----------------------------------------------------------------------------
|
||||
|
||||
MACRO ;///////////////////////////////// /////////////////////
|
||||
push16 ;push r0
|
||||
mov r1,r0,lsr#8
|
||||
ldr r2,m6502_s
|
||||
strb r1,[r2],#-1
|
||||
orr r2,r2,#0x100
|
||||
strb r0,[r2],#-1
|
||||
strb r2,m6502_s
|
||||
MEND ;r1,r2=?
|
||||
|
||||
MACRO
|
||||
push8 $x
|
||||
ldr r2,m6502_s
|
||||
strb $x,[r2],#-1
|
||||
strb r2,m6502_s
|
||||
MEND ;r2=?
|
||||
|
||||
MACRO
|
||||
pop16 ;pop m6502_pc
|
||||
ldrb r2,m6502_s
|
||||
add r2,r2,#2
|
||||
strb r2,m6502_s
|
||||
ldr r2,m6502_s
|
||||
ldrb r0,[r2],#-1
|
||||
orr r2,r2,#0x100
|
||||
ldrb m6502_pc,[r2]
|
||||
orr m6502_pc,m6502_pc,r0,lsl#8
|
||||
MEND ;r0,r1=?
|
||||
|
||||
MACRO
|
||||
pop8 $x
|
||||
ldrb r2,m6502_s
|
||||
add r2,r2,#1
|
||||
strb r2,m6502_s
|
||||
orr r2,r2,#0x100
|
||||
ldrsb $x,[cpu_zpage,r2] ;signed for PLA & PLP
|
||||
|
||||
MEND ;r2=?
|
||||
|
||||
;----------------------------------------------------------------------------
|
||||
;doXXX: load addy, increment m6502_pc
|
||||
|
||||
GBLA _type
|
||||
|
||||
_IMM EQU 1 ;immediate
|
||||
_ZP EQU 2 ;zero page
|
||||
_ZPI EQU 3 ;zero page indexed
|
||||
_ABS EQU 4 ;absolute
|
||||
|
||||
MACRO
|
||||
doABS ;absolute $nnnn
|
||||
_type SETA _ABS
|
||||
ldrb addy,[m6502_pc],#1
|
||||
ldrb r0,[m6502_pc],#1
|
||||
orr addy,addy,r0,lsl#8
|
||||
MEND
|
||||
|
||||
MACRO
|
||||
doAIX ;absolute indexed X $nnnn,X
|
||||
_type SETA _ABS
|
||||
ldrb addy,[m6502_pc],#1
|
||||
ldrb r0,[m6502_pc],#1
|
||||
orr addy,addy,r0,lsl#8
|
||||
add addy,addy,m6502_x,lsr#24
|
||||
; bic addy,addy,#0xff0000 ;Base Wars needs this
|
||||
MEND
|
||||
|
||||
MACRO
|
||||
doAIY ;absolute indexed Y $nnnn,Y
|
||||
_type SETA _ABS
|
||||
ldrb addy,[m6502_pc],#1
|
||||
ldrb r0,[m6502_pc],#1
|
||||
orr addy,addy,r0,lsl#8
|
||||
add addy,addy,m6502_y,lsr#24
|
||||
; bic addy,addy,#0xff0000 ;Tecmo Bowl needs this
|
||||
MEND
|
||||
|
||||
MACRO
|
||||
doIMM ;immediate #$nn
|
||||
_type SETA _IMM
|
||||
MEND
|
||||
|
||||
MACRO
|
||||
doIIX ;indexed indirect X ($nn,X)
|
||||
_type SETA _ABS
|
||||
ldrb r0,[m6502_pc],#1
|
||||
add r0,m6502_x,r0,lsl#24
|
||||
;//ldrb addy,[cpu_zpage,r0,lsr#24] ;//<2F><><EFBFBD><EFBFBD>:ָ<><D6B8><EFBFBD><EFBFBD>ת<EFBFBD>䲻<EFBFBD><E4B2BB><EFBFBD><EFBFBD>
|
||||
lsr addy,r0,#24 ;//<2F>Ĺ<EFBFBD><C4B9><EFBFBD><EFBFBD><EFBFBD>2<EFBFBD><32> >>24
|
||||
ldrb addy,[cpu_zpage,addy]
|
||||
|
||||
add r0,r0,#0x01000000
|
||||
;//ldrb r1,[cpu_zpage,r0,lsr#24] ;//R1,LSR#2;<3B><>R1<52>е<EFBFBD><D0B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>2λ
|
||||
lsr r1,r0,#24 ;//<2F>Ĺ<EFBFBD><C4B9><EFBFBD><EFBFBD><EFBFBD>2<EFBFBD><32>
|
||||
ldrb r1,[cpu_zpage,r1]
|
||||
|
||||
orr addy,addy,r1,lsl#8
|
||||
MEND
|
||||
|
||||
MACRO
|
||||
doIIY ;indirect indexed Y ($nn),Y
|
||||
_type SETA _ABS
|
||||
ldrb r0,[m6502_pc],#1
|
||||
;// ldrb addy,[r0,cpu_zpage]! ;;<3B><><EFBFBD><EFBFBD><EFBFBD>ݴ<EFBFBD><DDB4><EFBFBD>֮ǰ,<2C><>ƫ<EFBFBD><C6AB><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD>Rn <20><>,<2C><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݵĴ洢<C4B4><E6B4A2>ַ
|
||||
;//<2F><>ʹ<EFBFBD>ú<EFBFBD>"!",<2C><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>д<EFBFBD>ص<EFBFBD>Rn<52><6E>
|
||||
ldrb addy,[r0,cpu_zpage]
|
||||
add r0,r0,cpu_zpage ;//////////////////////////////////////
|
||||
|
||||
|
||||
ldrb r1,[r0,#1]
|
||||
orr addy,addy,r1,lsl#8
|
||||
add addy,addy,m6502_y,lsr#24
|
||||
; bic addy,addy,#0xff0000 ;Zelda2 needs this
|
||||
MEND
|
||||
|
||||
MACRO
|
||||
doZPI ;Zeropage indirect ($nn)
|
||||
_type SETA _ABS
|
||||
ldrb r0,[m6502_pc],#1
|
||||
;// ldrb addy,[r0,cpu_zpage]!;;<3B><><EFBFBD><EFBFBD><EFBFBD>ݴ<EFBFBD><DDB4><EFBFBD>֮ǰ,<2C><>ƫ<EFBFBD><C6AB><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD>Rn <20><>,<2C><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݵĴ洢<C4B4><E6B4A2>ַ
|
||||
;//<2F><>ʹ<EFBFBD>ú<EFBFBD>"!",<2C><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>д<EFBFBD>ص<EFBFBD>Rn<52><6E>
|
||||
ldrb addy,[r0,cpu_zpage]
|
||||
add r0,r0,cpu_zpage
|
||||
|
||||
|
||||
ldrb r1,[r0,#1]
|
||||
orr addy,addy,r1,lsl#8
|
||||
MEND
|
||||
|
||||
MACRO
|
||||
doZ ;zero page $nn
|
||||
_type SETA _ZP
|
||||
ldrb addy,[m6502_pc],#1
|
||||
MEND
|
||||
|
||||
MACRO
|
||||
doZ2 ;zero page $nn
|
||||
_type SETA _ZP
|
||||
ldrb addy,[m6502_pc],#2 ;ugly thing for bbr/bbs
|
||||
MEND
|
||||
|
||||
MACRO
|
||||
doZIX ;zero page indexed X $nn,X
|
||||
_type SETA _ZP
|
||||
ldrb addy,[m6502_pc],#1
|
||||
add addy,addy,m6502_x,lsr#24
|
||||
and addy,addy,#0xff ;Rygar needs this
|
||||
MEND
|
||||
|
||||
MACRO
|
||||
doZIXf ;zero page indexed X $nn,X
|
||||
_type SETA _ZPI
|
||||
ldrb addy,[m6502_pc],#1
|
||||
add addy,m6502_x,addy,lsl#24
|
||||
MEND
|
||||
|
||||
MACRO
|
||||
doZIY ;zero page indexed Y $nn,Y
|
||||
_type SETA _ZP
|
||||
ldrb addy,[m6502_pc],#1
|
||||
add addy,addy,m6502_y,lsr#24
|
||||
and addy,addy,#0xff
|
||||
MEND
|
||||
|
||||
MACRO
|
||||
doZIYf ;zero page indexed Y $nn,Y
|
||||
_type SETA _ZPI
|
||||
ldrb addy,[m6502_pc],#1
|
||||
add addy,m6502_y,addy,lsl#24
|
||||
MEND
|
||||
|
||||
;----------------------------------------------------------------------------
|
||||
|
||||
MACRO
|
||||
opADC
|
||||
readmem
|
||||
movs r1,cycles,lsr#1 ;get C
|
||||
subcs r0,r0,#0x00000100
|
||||
adcs m6502_a,m6502_a,r0,ror#8
|
||||
mov m6502_nz,m6502_a,asr#24 ;NZ
|
||||
orr cycles,cycles,#CYC_C+CYC_V ;Prepare C & V
|
||||
bicvc cycles,cycles,#CYC_V ;V
|
||||
MEND
|
||||
|
||||
MACRO
|
||||
opAND
|
||||
readmem
|
||||
and m6502_a,m6502_a,r0,lsl#24
|
||||
mov m6502_nz,m6502_a,asr#24 ;NZ
|
||||
MEND
|
||||
|
||||
MACRO
|
||||
opASL
|
||||
readmem
|
||||
add r0,r0,r0
|
||||
orrs m6502_nz,r0,r0,lsl#24 ;NZ
|
||||
orr cycles,cycles,#CYC_C ;Prepare C
|
||||
writemem
|
||||
MEND
|
||||
|
||||
MACRO
|
||||
opBIT
|
||||
readmem
|
||||
bic cycles,cycles,#CYC_V ;reset V
|
||||
tst r0,#V
|
||||
orrne cycles,cycles,#CYC_V ;V
|
||||
and m6502_nz,r0,m6502_a,lsr#24 ;Z
|
||||
orr m6502_nz,m6502_nz,r0,lsl#24 ;N
|
||||
MEND
|
||||
|
||||
MACRO
|
||||
opCOMP $x ;A,X & Y
|
||||
readmem
|
||||
subs m6502_nz,$x,r0,lsl#24
|
||||
mov m6502_nz,m6502_nz,asr#24 ;NZ
|
||||
orr cycles,cycles,#CYC_C ;Prepare C
|
||||
MEND
|
||||
|
||||
MACRO
|
||||
opDEC
|
||||
readmem
|
||||
sub r0,r0,#1
|
||||
orr m6502_nz,r0,r0,lsl#24 ;NZ
|
||||
writemem
|
||||
MEND
|
||||
|
||||
MACRO
|
||||
opEOR
|
||||
readmem
|
||||
eor m6502_a,m6502_a,r0,lsl#24
|
||||
mov m6502_nz,m6502_a,asr#24 ;NZ
|
||||
MEND
|
||||
|
||||
MACRO
|
||||
opINC
|
||||
readmem
|
||||
add r0,r0,#1
|
||||
orr m6502_nz,r0,r0,lsl#24 ;NZ
|
||||
writemem
|
||||
MEND
|
||||
|
||||
MACRO
|
||||
opLOAD $x
|
||||
readmems
|
||||
mov $x,m6502_nz,lsl#24
|
||||
MEND
|
||||
|
||||
MACRO
|
||||
opLSR
|
||||
[ _type = _ABS
|
||||
readmemabs
|
||||
movs r0,r0,lsr#1
|
||||
orr cycles,cycles,#CYC_C ;Prepare C
|
||||
mov m6502_nz,r0 ;Z, (N=0)
|
||||
writememabs
|
||||
]
|
||||
[ _type = _ZP
|
||||
ldrb m6502_nz,[cpu_zpage,addy]
|
||||
movs m6502_nz,m6502_nz,lsr#1 ;Z, (N=0)
|
||||
orr cycles,cycles,#CYC_C ;Prepare C
|
||||
strb m6502_nz,[cpu_zpage,addy]
|
||||
]
|
||||
[ _type = _ZPI
|
||||
;// ldrb m6502_nz,[cpu_zpage,addy,lsr#24]
|
||||
lsr m6502_nz,addy,#24 ;//<2F>Ĺ<EFBFBD><C4B9><EFBFBD><EFBFBD><EFBFBD>2<EFBFBD><32>
|
||||
ldrb m6502_nz,[cpu_zpage,m6502_nz]
|
||||
|
||||
movs m6502_nz,m6502_nz,lsr#1 ;Z, (N=0)
|
||||
orr cycles,cycles,#CYC_C ;Prepare C
|
||||
;// strb m6502_nz,[cpu_zpage,addy,lsr#24]
|
||||
lsr r1,addy,#24 ;//<2F>Ĺ<EFBFBD><C4B9><EFBFBD><EFBFBD><EFBFBD>2<EFBFBD><32>
|
||||
strb m6502_nz,[cpu_zpage,r1]
|
||||
|
||||
]
|
||||
MEND
|
||||
|
||||
MACRO
|
||||
opORA
|
||||
readmem
|
||||
orr m6502_a,m6502_a,r0,lsl#24
|
||||
mov m6502_nz,m6502_a,asr#24
|
||||
MEND
|
||||
|
||||
MACRO
|
||||
opROL
|
||||
readmem
|
||||
movs cycles,cycles,lsr#1 ;get C
|
||||
adc r0,r0,r0
|
||||
orrs m6502_nz,r0,r0,lsl#24 ;NZ
|
||||
adc cycles,cycles,cycles ;Set C
|
||||
writemem
|
||||
MEND
|
||||
|
||||
MACRO
|
||||
opROR
|
||||
readmem
|
||||
movs cycles,cycles,lsr#1 ;get C
|
||||
orrcs r0,r0,#0x100
|
||||
movs r0,r0,lsr#1
|
||||
orr m6502_nz,r0,r0,lsl#24 ;NZ
|
||||
adc cycles,cycles,cycles ;Set C
|
||||
writemem
|
||||
MEND
|
||||
|
||||
MACRO
|
||||
opSBC
|
||||
readmem
|
||||
movs r1,cycles,lsr#1 ;get C
|
||||
sbcs m6502_a,m6502_a,r0,lsl#24
|
||||
and m6502_a,m6502_a,#0xff000000
|
||||
mov m6502_nz,m6502_a,asr#24 ;NZ
|
||||
orr cycles,cycles,#CYC_C+CYC_V ;Prepare C & V
|
||||
bicvc cycles,cycles,#CYC_V ;V
|
||||
MEND
|
||||
|
||||
MACRO
|
||||
opSTORE $x
|
||||
mov r0,$x,lsr#24
|
||||
writemem
|
||||
MEND
|
||||
;----------------------------------------------------
|
||||
END
|
545
Project/Src/NES/6502mac_gcc.S
Normal file
545
Project/Src/NES/6502mac_gcc.S
Normal file
@@ -0,0 +1,545 @@
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
.include "6502def.s"
|
||||
|
||||
|
||||
// <EFBFBD><EFBFBD> 6502 PC <EFBFBD><EFBFBD>ַת<EFBFBD><EFBFBD>Ϊ ROM ƫ<EFBFBD>Ƶ<EFBFBD>ַ
|
||||
.macro encodePC
|
||||
and r1, m6502_pc, #0xE000 // r9 & 0xE000
|
||||
add r2, globalptr,#memmap_tbl // <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ڴ<EFBFBD>ӳ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ<EFBFBD><EFBFBD> r2
|
||||
lsr r0, r1, #11 // >>11λ
|
||||
ldr r0, [r2, r0] // <EFBFBD><EFBFBD> r2 + r0 <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݵ<EFBFBD> r0
|
||||
str r0, [globalptr,#lastbank] // <EFBFBD><EFBFBD><EFBFBD>浱ǰ bank ƫ<EFBFBD><EFBFBD>
|
||||
add m6502_pc, m6502_pc, r0 // m6502_pc += r0
|
||||
.endm
|
||||
|
||||
// <EFBFBD><EFBFBD><EFBFBD><EFBFBD> 6502 <EFBFBD><EFBFBD>־<EFBFBD><EFBFBD> r0
|
||||
.macro encodeP extra
|
||||
and r0, cycles, #CYC_V+CYC_D+CYC_I+CYC_C // CYC_V+CYC_D+CYC_I+CYC_C
|
||||
tst m6502_nz, #0x80000000 // PSR_N
|
||||
IT NE
|
||||
orrne r0, r0, #N // <EFBFBD><EFBFBD><EFBFBD><EFBFBD> N <EFBFBD><EFBFBD>־
|
||||
|
||||
tst m6502_nz, #0xFF // Z <EFBFBD><EFBFBD>־
|
||||
IT EQ
|
||||
orreq r0, r0, #Z // <EFBFBD><EFBFBD><EFBFBD><EFBFBD> Z <EFBFBD><EFBFBD>־
|
||||
orr r0, r0, #\extra // <EFBFBD><EFBFBD><EFBFBD>Ӷ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־ (B/R)
|
||||
.endm
|
||||
|
||||
// <EFBFBD><EFBFBD><EFBFBD><EFBFBD> r0 <EFBFBD>е<EFBFBD> 6502 <EFBFBD><EFBFBD>־
|
||||
.macro decodeP
|
||||
bic cycles,cycles,#CYC_V+CYC_D+CYC_I+CYC_C // <EFBFBD><EFBFBD><EFBFBD><EFBFBD> CYC_V+CYC_D+CYC_I+CYC_C
|
||||
and r1, r0, #V+D+I+C // <EFBFBD><EFBFBD>ȡ V/D/I/C <EFBFBD><EFBFBD>־
|
||||
orr cycles,cycles,r1 // д<EFBFBD><EFBFBD> cycles
|
||||
bic m6502_nz, r0, #0xFD // r0 is signed
|
||||
eor m6502_nz, m6502_nz, #Z // <EFBFBD><EFBFBD>ת Z λ
|
||||
.endm
|
||||
|
||||
// <EFBFBD><EFBFBD>ȡ<EFBFBD><EFBFBD>һ<EFBFBD><EFBFBD>ָ<EFBFBD>ִ<EFBFBD><EFBFBD>
|
||||
.macro fetch count
|
||||
ldr r0, [r10,#clocksh]
|
||||
add r0, r0, \count
|
||||
str r0, [globalptr,#clocksh]
|
||||
|
||||
ldr r1, [globalptr,#opz]
|
||||
subs cycles, cycles, \count*256
|
||||
|
||||
ITT PL
|
||||
ldrbpl r0, [m6502_pc], #1
|
||||
ldrpl pc, [r1, r0, lsl #2]
|
||||
|
||||
ldr pc, [globalptr,#nexttimeout]
|
||||
.endm
|
||||
|
||||
// ͬ<EFBFBD>ϣ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> Carry λ
|
||||
.macro fetch_c count
|
||||
ldr r0, [globalptr,#clocksh]
|
||||
add r0, r0, \count
|
||||
str r0, [globalptr,#clocksh]
|
||||
|
||||
ldr r1, [globalptr,#opz]
|
||||
sbcs cycles, cycles, \count*256
|
||||
|
||||
ITT PL
|
||||
ldrbpl r0, [m6502_pc], #1
|
||||
ldrpl pc, [r1, r0, lsl #2]
|
||||
|
||||
ldr pc, [globalptr,#nexttimeout]
|
||||
.endm
|
||||
|
||||
// <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ڱ<EFBFBD>־
|
||||
.macro clearcycles
|
||||
and cycles,cycles,#CYC_MASK // CYC_MASK
|
||||
.endm
|
||||
|
||||
// <EFBFBD><EFBFBD><EFBFBD>Ե<EFBFBD>ַ<EFBFBD><EFBFBD>ȡ
|
||||
.macro readmemabs
|
||||
and r1, addy, #0xE000
|
||||
adr lr, 0f
|
||||
lsr r1, r1, #11
|
||||
ldr pc, [m6502_rmem, r1]
|
||||
0:
|
||||
.endm
|
||||
|
||||
// <EFBFBD><EFBFBD>ҳ<EFBFBD><EFBFBD>ȡ
|
||||
.macro readmemzp
|
||||
ldrb r0, [cpu_zpage, addy]
|
||||
.endm
|
||||
|
||||
// <EFBFBD><EFBFBD>ҳ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ<EFBFBD><EFBFBD>
|
||||
.macro readmemzpi
|
||||
lsr r0, addy, #24
|
||||
ldrb r0, [cpu_zpage, r0]
|
||||
.endm
|
||||
|
||||
// RAM <EFBFBD><EFBFBD>ȡ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> NZ
|
||||
.macro readmemzps
|
||||
ldrsb m6502_nz, [cpu_zpage,addy]
|
||||
.endm
|
||||
|
||||
// <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ
|
||||
.macro readmemimm
|
||||
ldrb r0, [m6502_pc], #1
|
||||
.endm
|
||||
|
||||
// <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> NZ
|
||||
.macro readmemimms
|
||||
ldrsb m6502_nz, [m6502_pc], #1
|
||||
.endm
|
||||
|
||||
// <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ѡ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ<EFBFBD><EFBFBD>ʽ
|
||||
.macro readmem
|
||||
.if _type == _ABS
|
||||
readmemabs
|
||||
.elseif _type == _ZP
|
||||
readmemzp
|
||||
.elseif _type == _ZPI
|
||||
readmemzpi
|
||||
.elseif _type == _IMM
|
||||
readmemimm
|
||||
.endif
|
||||
.endm
|
||||
|
||||
// <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>չ<EFBFBD>Ķ<EFBFBD>ȡ
|
||||
.macro readmems
|
||||
.if _type == _ABS
|
||||
readmemabs
|
||||
orr m6502_nz, r0, r0, lsl #24
|
||||
.elseif _type == _ZP
|
||||
readmemzps
|
||||
.elseif _type == _IMM
|
||||
readmemimms
|
||||
.endif
|
||||
.endm
|
||||
|
||||
// <EFBFBD><EFBFBD><EFBFBD>Ե<EFBFBD>ַд<EFBFBD><EFBFBD>
|
||||
.macro writememabs
|
||||
and r1, addy, #0xE000
|
||||
@ ldr r2, =writemem_tbl
|
||||
@ add r2, globalptr
|
||||
add r2, globalptr,#writemem_tbl
|
||||
adr lr, 0f
|
||||
|
||||
lsr r1, r1, #11
|
||||
ldr pc, [r2, r1]
|
||||
0:
|
||||
.endm
|
||||
|
||||
// <EFBFBD><EFBFBD>ҳд<EFBFBD><EFBFBD>
|
||||
.macro writememzp
|
||||
strb r0, [cpu_zpage,addy]
|
||||
.endm
|
||||
|
||||
// <EFBFBD><EFBFBD>ҳ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>д<EFBFBD><EFBFBD>
|
||||
.macro writememzpi
|
||||
lsr r1, addy, #24
|
||||
strb r0, [cpu_zpage, r1]
|
||||
.endm
|
||||
|
||||
// <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ѡ<EFBFBD><EFBFBD>д<EFBFBD>뷽ʽ
|
||||
.macro writemem
|
||||
.if _type == _ABS
|
||||
writememabs
|
||||
.elseif _type == _ZP
|
||||
writememzp
|
||||
.elseif _type == _ZPI
|
||||
writememzpi
|
||||
.endif
|
||||
.endm
|
||||
|
||||
// 16λѹջ
|
||||
.macro push16
|
||||
mov r1, r0, lsr #8
|
||||
ldr r2, [globalptr,#m6502_s]
|
||||
strb r1, [r2], #-1
|
||||
orr r2, r2, #0x100
|
||||
strb r0, [r2], #-1
|
||||
strb r2, [globalptr,#m6502_s]
|
||||
.endm
|
||||
|
||||
// 8λѹջ
|
||||
.macro push8 x
|
||||
ldr r2, [globalptr,#m6502_s]
|
||||
strb \x, [r2], #-1
|
||||
strb r2, [globalptr,#m6502_s]
|
||||
.endm
|
||||
|
||||
// 16λ<EFBFBD><EFBFBD>ջ
|
||||
.macro pop16
|
||||
ldrb r2, [globalptr,#m6502_s]
|
||||
add r2, r2, #2
|
||||
strb r2, [globalptr,#m6502_s]
|
||||
ldr r2, [globalptr,#m6502_s]
|
||||
ldrb r0, [r2], #-1
|
||||
orr r2, r2, #0x100
|
||||
ldrb m6502_pc, [r2]
|
||||
orr m6502_pc, m6502_pc, r0, lsl #8
|
||||
.endm
|
||||
|
||||
// 8λ<EFBFBD><EFBFBD>ջ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>չ<EFBFBD><EFBFBD>
|
||||
.macro pop8 x
|
||||
ldrb r2, [globalptr,#m6502_s]
|
||||
add r2, r2, #1
|
||||
strb r2, [globalptr,#m6502_s]
|
||||
orr r2, r2, #0x100
|
||||
ldrsb \x, [cpu_zpage, r2]
|
||||
.endm
|
||||
|
||||
// <EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ѱַģʽ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
.equ _IMM, 1
|
||||
.equ _ZP, 2
|
||||
.equ _ZPI, 3
|
||||
.equ _ABS, 4
|
||||
|
||||
// <EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ѱַ
|
||||
.macro doABS
|
||||
.set _type, _ABS
|
||||
ldrb addy, [m6502_pc], #1
|
||||
ldrb r0, [m6502_pc], #1
|
||||
orr addy, addy, r0, lsl #8
|
||||
.endm
|
||||
|
||||
// X<EFBFBD>Ĵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
.macro doAIX
|
||||
.set _type, _ABS
|
||||
ldrb addy, [m6502_pc], #1
|
||||
ldrb r0, [m6502_pc], #1
|
||||
orr addy, addy, r0, lsl #8
|
||||
add addy, addy, m6502_x, lsr #24
|
||||
.endm
|
||||
|
||||
// Y<EFBFBD>Ĵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
.macro doAIY
|
||||
.set _type, _ABS
|
||||
ldrb addy, [m6502_pc], #1
|
||||
ldrb r0, [m6502_pc], #1
|
||||
orr addy, addy, r0, lsl #8
|
||||
add addy, addy, m6502_y, lsr #24
|
||||
.endm
|
||||
|
||||
// <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ѱַ
|
||||
.macro doIMM
|
||||
.set _type, _IMM
|
||||
.endm
|
||||
|
||||
// X<EFBFBD>Ĵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ѱַ
|
||||
.macro doIIX
|
||||
.set _type, _ABS
|
||||
ldrb r0, [m6502_pc], #1
|
||||
add r0, m6502_x, r0, lsl #24
|
||||
lsr addy, r0, #24
|
||||
ldrb addy, [cpu_zpage, addy]
|
||||
add r0, r0, #0x01000000
|
||||
lsr r1, r0, #24
|
||||
ldrb r1, [cpu_zpage, r1]
|
||||
orr addy, addy, r1, lsl #8
|
||||
.endm
|
||||
|
||||
// Y<EFBFBD>Ĵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ѱַ
|
||||
.macro doIIY
|
||||
.set _type, _ABS
|
||||
ldrb r0, [m6502_pc], #1
|
||||
ldrb addy, [r0,cpu_zpage]
|
||||
add r0, r0, cpu_zpage
|
||||
ldrb r1, [r0, #1]
|
||||
orr addy, addy, r1, lsl #8
|
||||
add addy, addy, m6502_y, lsr #24
|
||||
.endm
|
||||
|
||||
// <EFBFBD><EFBFBD>ҳ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ѱַ
|
||||
.macro doZPI
|
||||
.set _type, _ABS
|
||||
ldrb r0, [m6502_pc], #1
|
||||
ldrb addy, [r0,cpu_zpage]
|
||||
add r0, r0, cpu_zpage
|
||||
ldrb r1, [r0, #1]
|
||||
orr addy, addy, r1, lsl #8
|
||||
.endm
|
||||
|
||||
// <EFBFBD><EFBFBD>ҳѰַ
|
||||
.macro doZ
|
||||
.set _type, _ZP
|
||||
ldrb addy, [m6502_pc], #1
|
||||
.endm
|
||||
|
||||
// <EFBFBD><EFBFBD>ҳ˫<EFBFBD>ֽ<EFBFBD>Ѱַ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> bbr/bbs<EFBFBD><EFBFBD>
|
||||
.macro doZ2
|
||||
.set _type, _ZP
|
||||
ldrb addy, [m6502_pc], #2
|
||||
.endm
|
||||
|
||||
// <EFBFBD><EFBFBD>ҳX<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
.macro doZIX
|
||||
.set _type, _ZP
|
||||
ldrb addy, [m6502_pc], #1
|
||||
add addy, addy, m6502_x, lsr #24
|
||||
and addy, addy, #0xff
|
||||
.endm
|
||||
|
||||
// <EFBFBD><EFBFBD>ҳX<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƣ<EFBFBD>
|
||||
.macro doZIXf
|
||||
.set _type, _ZPI
|
||||
ldrb addy, [m6502_pc], #1
|
||||
add addy, m6502_x, addy, lsl #24
|
||||
.endm
|
||||
|
||||
// <EFBFBD><EFBFBD>ҳY<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
.macro doZIY
|
||||
.set _type, _ZP
|
||||
ldrb addy, [m6502_pc], #1
|
||||
add addy, addy, m6502_y, lsr #24
|
||||
and addy, addy, #0xff
|
||||
.endm
|
||||
|
||||
// <EFBFBD><EFBFBD>ҳY<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƣ<EFBFBD>
|
||||
.macro doZIYf
|
||||
.set _type, _ZPI
|
||||
ldrb addy, [m6502_pc], #1
|
||||
add addy, m6502_y, addy, lsl #24
|
||||
.endm
|
||||
|
||||
// ADC <EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
.macro opADC
|
||||
readmem
|
||||
movs r1, cycles, lsr #1
|
||||
|
||||
IT CS
|
||||
subcs r0, r0, #0x00000100
|
||||
adcs m6502_a, m6502_a, r0, ror #8
|
||||
|
||||
mov m6502_nz, m6502_a, asr #24
|
||||
orr cycles, cycles, #CYC_C+CYC_V
|
||||
|
||||
IT VC
|
||||
bicvc cycles, cycles, #CYC_V
|
||||
.endm
|
||||
|
||||
// AND <EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
.macro opAND
|
||||
readmem
|
||||
and m6502_a, m6502_a, r0, lsl #24
|
||||
mov m6502_nz, m6502_a, asr #24
|
||||
.endm
|
||||
|
||||
// ASL <EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
.macro opASL
|
||||
readmem
|
||||
add r0, r0, r0
|
||||
orrs m6502_nz, r0, r0, lsl #24
|
||||
orr cycles, cycles, #CYC_C
|
||||
writemem
|
||||
.endm
|
||||
|
||||
// BIT <EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
.macro opBIT
|
||||
readmem
|
||||
bic cycles, cycles, #CYC_V
|
||||
tst r0, #V
|
||||
|
||||
IT NE
|
||||
orrne cycles, cycles, #CYC_V
|
||||
|
||||
and m6502_nz, r0, m6502_a, lsr #24
|
||||
orr m6502_nz, m6502_nz, r0, lsl #24
|
||||
.endm
|
||||
|
||||
// <EFBFBD>Ƚϲ<EFBFBD><EFBFBD><EFBFBD>
|
||||
.macro opCOMP x
|
||||
readmem
|
||||
subs m6502_nz, \x, r0, lsl #24
|
||||
mov m6502_nz, m6502_nz, asr #24
|
||||
orr cycles, cycles, #CYC_C
|
||||
.endm
|
||||
|
||||
// <EFBFBD><EFBFBD>һ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
.macro opDEC
|
||||
readmem
|
||||
sub r0, r0, #1
|
||||
orr m6502_nz, r0, r0, lsl #24
|
||||
writemem
|
||||
.endm
|
||||
|
||||
// <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
.macro opEOR
|
||||
readmem
|
||||
eor m6502_a, m6502_a, r0, lsl #24
|
||||
mov m6502_nz, m6502_a, asr #24
|
||||
.endm
|
||||
|
||||
// <EFBFBD><EFBFBD>һ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
.macro opINC
|
||||
readmem
|
||||
add r0, r0, #1
|
||||
orr m6502_nz, r0, r0, lsl #24
|
||||
writemem
|
||||
.endm
|
||||
|
||||
// <EFBFBD><EFBFBD><EFBFBD>ز<EFBFBD><EFBFBD><EFBFBD>
|
||||
.macro opLOAD x
|
||||
readmems
|
||||
mov \x, m6502_nz, lsl #24
|
||||
.endm
|
||||
|
||||
// <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
.macro opLSR
|
||||
.if _type == _ABS
|
||||
readmemabs
|
||||
movs r0, r0, lsr #1
|
||||
orr cycles, cycles, #CYC_C
|
||||
mov m6502_nz, r0
|
||||
writememabs
|
||||
.elseif _type == _ZP
|
||||
ldrb m6502_nz, [cpu_zpage, addy]
|
||||
movs m6502_nz, m6502_nz, lsr #1
|
||||
orr cycles, cycles, #CYC_C
|
||||
strb m6502_nz, [cpu_zpage, addy]
|
||||
.elseif _type == _ZPI
|
||||
lsr m6502_nz, addy, #24
|
||||
ldrb m6502_nz, [cpu_zpage, m6502_nz]
|
||||
movs m6502_nz, m6502_nz, lsr #1
|
||||
orr cycles, cycles, #CYC_C
|
||||
lsr r1, addy, #24
|
||||
strb m6502_nz, [cpu_zpage, r1]
|
||||
.endif
|
||||
.endm
|
||||
|
||||
// OR <EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
.macro opORA
|
||||
readmem
|
||||
orr m6502_a, m6502_a, r0, lsl #24
|
||||
mov m6502_nz, m6502_a, asr #24
|
||||
.endm
|
||||
|
||||
// ѭ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
.macro opROL
|
||||
readmem
|
||||
movs cycles, cycles, lsr #1
|
||||
adc r0, r0, r0
|
||||
orrs m6502_nz, r0, r0, lsl #24
|
||||
adc cycles, cycles, cycles
|
||||
writemem
|
||||
.endm
|
||||
|
||||
// ѭ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
.macro opROR
|
||||
readmem
|
||||
movs cycles, cycles, lsr #1
|
||||
|
||||
IT CS
|
||||
orrcs r0, r0, #0x100
|
||||
|
||||
movs r0, r0, lsr #1
|
||||
orr m6502_nz, r0, r0, lsl #24
|
||||
adc cycles, cycles, cycles
|
||||
writemem
|
||||
.endm
|
||||
|
||||
// <EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
.macro opSBC
|
||||
readmem
|
||||
movs r1, cycles, lsr #1
|
||||
sbcs m6502_a, m6502_a, r0, lsl #24
|
||||
and m6502_a, m6502_a, #0xff000000
|
||||
mov m6502_nz, m6502_a, asr #24
|
||||
orr cycles, cycles, #CYC_C+CYC_V
|
||||
|
||||
IT VC
|
||||
bicvc cycles, cycles, #CYC_V
|
||||
.endm
|
||||
|
||||
|
||||
.macro opSTORE x
|
||||
mov r0, \x, lsr #24
|
||||
writemem
|
||||
.endm
|
||||
|
||||
@ .global main
|
||||
@ .type main, %function
|
||||
@ mian:
|
||||
@ encodePC
|
||||
@ encodeP (B+R)
|
||||
@ encodeP (R)
|
||||
@ decodeP
|
||||
@ fetch 10
|
||||
@ fetch_c 10
|
||||
|
||||
@ clearcycles
|
||||
@ readmemabs
|
||||
@ readmemzp
|
||||
@ readmemzpi
|
||||
@ readmemzps
|
||||
@ readmemimm
|
||||
@ readmemimms
|
||||
@ readmem
|
||||
@ readmems
|
||||
@ writememabs
|
||||
@ writememzp
|
||||
@ writememzpi
|
||||
@ writemem
|
||||
@ push16
|
||||
@ push8 r0
|
||||
@ pop16
|
||||
@ pop8 r0
|
||||
@ doABS
|
||||
@ doAIX
|
||||
@ doAIY
|
||||
@ doIMM
|
||||
@ doIIX
|
||||
@ doIIY
|
||||
@ doZPI
|
||||
@ doZ
|
||||
@ doZ2
|
||||
@ doZIX
|
||||
@ doZIXf
|
||||
@ doZIY
|
||||
@ doZIYf
|
||||
@ opADC
|
||||
@ opAND
|
||||
@ opASL
|
||||
@ opBIT
|
||||
@ opCOMP r5
|
||||
@ opDEC
|
||||
@ opEOR
|
||||
@ opINC
|
||||
@ opLOAD r5
|
||||
@ opLSR
|
||||
@ opORA
|
||||
@ opROL
|
||||
@ opROR
|
||||
@ opSBC
|
||||
@ opSTORE r5
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
@@ -1,199 +0,0 @@
|
||||
INCLUDE equates.s
|
||||
|
||||
|
||||
IMPORT NES_RAM
|
||||
IMPORT NES_SRAM
|
||||
IMPORT CPU_reset
|
||||
IMPORT romfile ;from main.c
|
||||
IMPORT cpu_data ; 6502.s
|
||||
IMPORT op_table
|
||||
|
||||
EXPORT cpu6502_init
|
||||
EXPORT map67_
|
||||
EXPORT map89_
|
||||
EXPORT mapAB_
|
||||
EXPORT mapCD_
|
||||
EXPORT mapEF_
|
||||
;----------------------------------------------------------------------------
|
||||
AREA rom_code, CODE, READONLY
|
||||
; THUMB
|
||||
PRESERVE8
|
||||
;----------------------------------------------------------------------------
|
||||
cpu6502_init PROC
|
||||
;----------------------------------------------------------------------------
|
||||
stmfd sp!,{r4-r11,lr}
|
||||
|
||||
ldr r10,=cpu_data ;<3B><>ȡ<EFBFBD><C8A1>ַ
|
||||
ldr r11,=NES_RAM ;r11=cpu_zpage
|
||||
|
||||
ldr r11,[r11] ;NES_RAM<41><4D><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>
|
||||
;*******************************************************
|
||||
str r11,memmap_tbl ;NES_RAM<41><4D><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>
|
||||
str r11,memmap_tbl+4
|
||||
str r11,memmap_tbl+8
|
||||
|
||||
ldr r0,=NES_SRAM ;NES_SRAM<41><4D><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>
|
||||
ldr r0,[r0]
|
||||
str r0,memmap_tbl+12
|
||||
;**********************************************************************
|
||||
|
||||
ldr r0,=op_table ;<3B><>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ת<EFBFBD><D7AA><EFBFBD><EFBFBD>ַ
|
||||
str r0,opz ;<3B><><EFBFBD><EFBFBD>
|
||||
|
||||
ldr r0,=romfile
|
||||
ldr r0,[r0] ;R0<52><30><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>ROMӳ<4D><EFBFBD><F1A3A8B0><EFBFBD>ͷ<EFBFBD><CDB7>
|
||||
add r3,r0,#16 ;r3<72><33><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>rom<6F><6D><EFBFBD><EFBFBD>(<28><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7>
|
||||
str r3,rombase ;<3B><><EFBFBD><EFBFBD>rom<6F><6D><EFBFBD><EFBFBD>ַ
|
||||
;r3=rombase til end of loadcart so DON'T FUCK IT UP
|
||||
mov r2,#1
|
||||
ldrb r1,[r3,#-12] ; 16kB PROM<4F><4D><EFBFBD><EFBFBD>Ŀ 2
|
||||
rsb r0,r2,r1,lsl#14 ;romsize=X*16KB <<14 <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8> r0=0x7fff
|
||||
str r0,rommask ;rommask=promsize-1 32768-1
|
||||
;------------------------------------------------------------------------------------
|
||||
mov r9,#0 ;(<28><><EFBFBD><EFBFBD><EFBFBD>κ<EFBFBD>encodePC<50><43>ӳ<EFBFBD><D3B3><EFBFBD><EFBFBD>*<2A><>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>еĴ<D0B5><C4B4><EFBFBD>)
|
||||
str r9,lastbank ;6502PC<50><43> ROM<4F><4D><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƫ<EFBFBD><C6AB><EFBFBD><EFBFBD>д0
|
||||
|
||||
mov r0,#0 ;Ĭ<><C4AC>romӳ<6D><D3B3>
|
||||
bl map89AB_ ;89AB=1st 16k
|
||||
mov r0,#-1
|
||||
bl mapCDEF_ ;CDEF=last 16k
|
||||
;----------------------------------------------------------------------------
|
||||
|
||||
ldrb r1,[r3,#-10] ;get mapper#
|
||||
ldrb r2,[r3,#-9]
|
||||
tst r2,#0x0e ;long live DiskDude!
|
||||
and r1,r1,#0xf0
|
||||
and r2,r2,#0xf0
|
||||
orr r0,r2,r1,lsr#4
|
||||
movne r0,r1,lsr#4 ;ignore high nibble if header looks bad <09><><EFBFBD>Ը<EFBFBD><D4B8><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
;r0=mapper<65><72>
|
||||
;----------------------------------------------------------------------------
|
||||
|
||||
ldr r0,=Mapper_W
|
||||
str r0,writemem_tbl+16
|
||||
str r0,writemem_tbl+20
|
||||
str r0,writemem_tbl+24
|
||||
str r0,writemem_tbl+28
|
||||
;------------------------------------------------------------------------------
|
||||
|
||||
bl CPU_reset ;reset everything else
|
||||
ldmfd sp!,{r4-r11,lr}
|
||||
bx lr
|
||||
ENDP
|
||||
|
||||
;----------------------------------------------------------------------------
|
||||
map67_ ;rom paging.. r0=page#
|
||||
;----------------------------------------------------------------------------
|
||||
ldr r1,rommask
|
||||
and r0,r1,r0,lsl#13
|
||||
ldr r1,rombase
|
||||
add r0,r1,r0
|
||||
sub r0,r0,#0x6000
|
||||
str r0,memmap_tbl+12
|
||||
b flush
|
||||
;----------------------------------------------------------------------------
|
||||
map89_ ;rom paging.. r0=page# ROM<4F><4D>ҳ
|
||||
;----------------------------------------------------------------------------
|
||||
ldr r1,rombase ;rom<6F><6D>ʼ<EFBFBD><CABC>ַ
|
||||
sub r1,r1,#0x8000
|
||||
ldr r2,rommask
|
||||
and r0,r2,r0,lsl#13
|
||||
add r0,r1,r0
|
||||
str r0,memmap_tbl+16
|
||||
b flush
|
||||
;----------------------------------------------------------------------------
|
||||
mapAB_
|
||||
;----------------------------------------------------------------------------
|
||||
ldr r1,rombase
|
||||
sub r1,r1,#0xa000
|
||||
ldr r2,rommask
|
||||
and r0,r2,r0,lsl#13
|
||||
add r0,r1,r0
|
||||
str r0,memmap_tbl+20
|
||||
b flush
|
||||
;----------------------------------------------------------------------------
|
||||
mapCD_
|
||||
;----------------------------------------------------------------------------
|
||||
ldr r1,rombase
|
||||
sub r1,r1,#0xc000
|
||||
ldr r2,rommask
|
||||
and r0,r2,r0,lsl#13
|
||||
add r0,r1,r0
|
||||
str r0,memmap_tbl+24
|
||||
b flush
|
||||
;----------------------------------------------------------------------------
|
||||
mapEF_
|
||||
;----------------------------------------------------------------------------
|
||||
ldr r1,rombase
|
||||
sub r1,r1,#0xe000
|
||||
ldr r2,rommask
|
||||
and r0,r2,r0,lsl#13
|
||||
add r0,r1,r0
|
||||
str r0,memmap_tbl+28
|
||||
b flush
|
||||
;----------------------------------------------------------------------------
|
||||
map89AB_
|
||||
;----------------------------------------------------------------------------
|
||||
ldr r1,rombase ;rom<6F><6D><EFBFBD><EFBFBD>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7>
|
||||
sub r1,r1,#0x8000
|
||||
ldr r2,rommask
|
||||
and r0,r2,r0,lsl#14
|
||||
add r0,r1,r0
|
||||
str r0,memmap_tbl+16
|
||||
str r0,memmap_tbl+20
|
||||
flush ;update m6502_pc & lastbank
|
||||
ldr r1,lastbank
|
||||
sub r9,r9,r1
|
||||
and r1,r9,#0xE000 ;//r9<72><39>0xe000<30><30>λ<EFBFBD><CEBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
adr r2,memmap_tbl ;//<2F>Ѵ洢<D1B4><E6B4A2>ӳ<EFBFBD><D3B3><EFBFBD><EFBFBD>ַ<EFBFBD><D6B7><EFBFBD>ص<EFBFBD>r2
|
||||
lsr r1,r1,#11 ;//>>11λ r1/2048
|
||||
ldr r0,[r2,r1] ;//<2F><>ȡr2<72><32>ַ+r1ƫ<31>Ƶ<EFBFBD><C6B5><EFBFBD><EFBFBD>ݵ<EFBFBD>r0
|
||||
|
||||
str r0,lastbank ;//<2F><><EFBFBD><EFBFBD>6502PC<50><43> ROM<4F><4D><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƫ<EFBFBD><C6AB><EFBFBD><EFBFBD>
|
||||
add r9,r9,r0 ;//m6502_pc+r0
|
||||
orr lr,#0x01 ;lr<6C><72><EFBFBD><EFBFBD>λ<EFBFBD><CEBB>1<EFBFBD><31>ֹ<EFBFBD><D6B9><EFBFBD><EFBFBD>arm״̬
|
||||
bx lr
|
||||
|
||||
;----------------------------------------------------------------------------
|
||||
mapCDEF_
|
||||
;----------------------------------------------------------------------------
|
||||
ldr r1,rombase
|
||||
sub r1,r1,#0xc000
|
||||
ldr r2,rommask
|
||||
and r0,r2,r0,lsl#14
|
||||
add r0,r1,r0
|
||||
str r0,memmap_tbl+24
|
||||
str r0,memmap_tbl+28
|
||||
b flush
|
||||
;----------------------------------------------------------------------------
|
||||
map89ABCDEF_
|
||||
;----------------------------------------------------------------------------
|
||||
ldr r1,rombase
|
||||
sub r1,r1,#0x8000
|
||||
ldr r2,rommask
|
||||
and r0,r2,r0,lsl#15
|
||||
add r0,r1,r0
|
||||
str r0,memmap_tbl+16
|
||||
str r0,memmap_tbl+20
|
||||
str r0,memmap_tbl+24
|
||||
str r0,memmap_tbl+28
|
||||
b flush
|
||||
;*************************************************************************************
|
||||
IMPORT asm_Mapper_Write;
|
||||
Mapper_W
|
||||
;-------------------------------------------
|
||||
stmfd sp!,{r3,lr} ;LR <20>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD>ջ
|
||||
mov r1,r12
|
||||
bl asm_Mapper_Write
|
||||
ldmfd sp!,{r3,lr}
|
||||
orr lr,#0x01 ;lr<6C><72><EFBFBD><EFBFBD>λ<EFBFBD><CEBB>1<EFBFBD><31>ֹ<EFBFBD><D6B9><EFBFBD><EFBFBD>arm״̬
|
||||
bx lr
|
||||
; nop
|
||||
;---------------------------------------------------------------------------------------
|
||||
|
||||
END
|
||||
|
||||
|
||||
|
||||
|
||||
|
@@ -1,33 +0,0 @@
|
||||
|
||||
globalptr RN r10 ;//=wram_globals* ptr
|
||||
;//cpu_zpage RN r11 ;=CPU_RAM
|
||||
;----------------------------------------------------------------------------
|
||||
|
||||
|
||||
MAP 0,globalptr ;//MAP <20><><EFBFBD>ڶ<EFBFBD><DAB6><EFBFBD>һ<EFBFBD><D2BB><EFBFBD>ṹ<EFBFBD><E1B9B9><EFBFBD><EFBFBD><EFBFBD>ڴ<EFBFBD><DAB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||
;//6502.s ;//<2F><><EFBFBD><EFBFBD><EFBFBD>ڴ<EFBFBD><DAB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַΪglobalptr
|
||||
opz # 4 ;opz # 256*4 ;//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||
readmem_tbl # 8*4 ;//8*4
|
||||
writemem_tbl # 8*4 ;//8*4
|
||||
memmap_tbl # 8*4 ;//<2F>洢<EFBFBD><E6B4A2>ӳ<EFBFBD><D3B3> ram+rom
|
||||
cpuregs # 7*4 ;//1208<30><38><EFBFBD><EFBFBD>6502<30>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ŀ<EFBFBD>ʼ<EFBFBD><CABC>ַ
|
||||
m6502_s # 4 ;//
|
||||
lastbank # 4 ;//6502PC<50><43> ROM<4F><4D><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƫ<EFBFBD><C6AB><EFBFBD><EFBFBD>
|
||||
nexttimeout # 4
|
||||
|
||||
rombase # 4 ;//ROM<4F><4D>ʼ<EFBFBD><CABC>ַ
|
||||
romnumber # 4 ;// ROM<4F><4D>С
|
||||
rommask # 4 ;//ROM<4F><4D>Ĥ rommask=romsize-1
|
||||
|
||||
joy0data # 4 ;//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
joy1data # 4 ;//<2F>ֱ<EFBFBD>1<EFBFBD><31><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
clocksh # 4 ;//ִ<>е<EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD> apu<70><75>
|
||||
cpunmif # 4 ;cpu<70>жϱ<D0B6>־
|
||||
cpuirqf # 4 ;cpu<70>жϱ<D0B6>־
|
||||
;------------------------------------------------------------------------------------------
|
||||
|
||||
|
||||
;// # 2 ;align
|
||||
|
||||
END
|
@@ -1,5 +1,6 @@
|
||||
#include "main.h"
|
||||
#include "nes_apu.h"
|
||||
#include "nes_main.h"
|
||||
//////////////////////////////////////////////////////////////////////////////////
|
||||
//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֲ<EFBFBD><D6B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ye781205<30><35>NESģ<53><C4A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
//ALIENTEK STM32F407<30><37><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
@@ -1,14 +1,3 @@
|
||||
#include "main.h"
|
||||
#include "stm32f4xx.h"
|
||||
#include "nes_main.h"
|
||||
#include "nes_ppu.h"
|
||||
#include "nes_mapper.h"
|
||||
#include "nes_apu.h"
|
||||
#include "mymem.h"
|
||||
#include "dac.h"
|
||||
|
||||
#include "ff.h"
|
||||
#include "string.h"
|
||||
//////////////////////////////////////////////////////////////////////////////////
|
||||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֲ<EFBFBD><D6B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ye781205<30><35>NESģ<53><C4A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
// ALIENTEK STM32F407<30><37><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
@@ -19,92 +8,104 @@
|
||||
// <20>汾<EFBFBD><E6B1BE>V1.0
|
||||
//////////////////////////////////////////////////////////////////////////////////
|
||||
|
||||
#include "nes_main.h"
|
||||
#include "dac.h"
|
||||
#include "main.h"
|
||||
#include "mymem.h"
|
||||
#include "nes_apu.h"
|
||||
#include "nes_mapper.h"
|
||||
#include "nes_ppu.h"
|
||||
#include "stm32f4xx.h"
|
||||
|
||||
u8 nes_frame_cnt; //nes֡<73><D6A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#include "ff.h"
|
||||
#include "string.h"
|
||||
|
||||
uint8_t nes_frame_cnt; // nes֡<73><D6A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
int MapperNo; // map<61><70><EFBFBD><EFBFBD>
|
||||
int NES_scanline; // nesɨ<73><C9A8><EFBFBD><EFBFBD>
|
||||
int VROM_1K_SIZE;
|
||||
int VROM_8K_SIZE;
|
||||
|
||||
u8 PADdata; //<2F>ֱ<EFBFBD>1<EFBFBD><31>ֵ [7:0]<5D><>7 <20><>6 <20><>5 <20><>4 Start3 Select2 B1 A0
|
||||
u8 PADdata1; //<2F>ֱ<EFBFBD>2<EFBFBD><32>ֵ [7:0]<5D><>7 <20><>6 <20><>5 <20><>4 Start3 Select2 B1 A0
|
||||
u8 *NES_RAM; //<2F><><EFBFBD><EFBFBD>1024<32>ֽڶ<D6BD><DAB6><EFBFBD>
|
||||
u8 *NES_SRAM;
|
||||
uint8_t PADdata; // <EFBFBD>ֱ<EFBFBD>1<EFBFBD><EFBFBD>ֵ [7:0]<5D><>7 <20><>6 <20><>5 <20><>4 Start3 Select2 B1 A0
|
||||
uint8_t PADdata1; // <EFBFBD>ֱ<EFBFBD>2<EFBFBD><EFBFBD>ֵ [7:0]<5D><>7 <20><>6 <20><>5 <20><>4 Start3 Select2 B1 A0
|
||||
uint8_t *NES_RAM; // <EFBFBD><EFBFBD><EFBFBD><EFBFBD>1024<EFBFBD>ֽڶ<EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t *NES_SRAM;
|
||||
NES_header *RomHeader; // rom<6F>ļ<EFBFBD>ͷ
|
||||
MAPPER *NES_Mapper;
|
||||
MapperCommRes *MAPx;
|
||||
|
||||
|
||||
u8* spr_ram; //<2F><><EFBFBD><EFBFBD>RAM,256<35>ֽ<EFBFBD>
|
||||
uint8_t *spr_ram; // <20><><EFBFBD><EFBFBD>RAM,256<35>ֽ<EFBFBD>
|
||||
ppu_data *ppu; // ppuָ<75><D6B8>
|
||||
u8* VROM_banks;
|
||||
u8* VROM_tiles;
|
||||
uint8_t *VROM_banks;
|
||||
uint8_t *VROM_tiles;
|
||||
|
||||
apu_t *apu; // apuָ<75><D6B8>
|
||||
u16 *wave_buffers;
|
||||
u16 *i2sbuf1; //<2F><>Ƶ<EFBFBD><C6B5><EFBFBD><EFBFBD>֡,ռ<><D5BC><EFBFBD>ڴ<EFBFBD><DAB4><EFBFBD> 367*4 <20>ֽ<EFBFBD>@22050Hz
|
||||
u16 *i2sbuf2; //<2F><>Ƶ<EFBFBD><C6B5><EFBFBD><EFBFBD>֡,ռ<><D5BC><EFBFBD>ڴ<EFBFBD><DAB4><EFBFBD> 367*4 <20>ֽ<EFBFBD>@22050Hz
|
||||
uint16_t *wave_buffers;
|
||||
uint16_t *i2sbuf1; // <EFBFBD><EFBFBD>Ƶ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>֡,ռ<><D5BC><EFBFBD>ڴ<EFBFBD><DAB4><EFBFBD> 367*4 <20>ֽ<EFBFBD>@22050Hz
|
||||
uint16_t *i2sbuf2; // <EFBFBD><EFBFBD>Ƶ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>֡,ռ<><D5BC><EFBFBD>ڴ<EFBFBD><DAB4><EFBFBD> 367*4 <20>ֽ<EFBFBD>@22050Hz
|
||||
|
||||
u8* romfile; //nes<65>ļ<EFBFBD>ָ<EFBFBD><D6B8>,ָ<><D6B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>nes<65>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ַ.
|
||||
uint8_t *romfile; // nes<EFBFBD>ļ<EFBFBD>ָ<EFBFBD><EFBFBD>,ָ<><D6B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>nes<65>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ַ.
|
||||
//////////////////////////////////////////////////////////////////////////////////////
|
||||
|
||||
// <20><>¼nes<65>Ƿ<EFBFBD><C7B7><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD>
|
||||
static u8 g_nes_break=0;
|
||||
|
||||
|
||||
|
||||
static uint8_t g_nes_break = 0;
|
||||
|
||||
// <20><><EFBFBD><EFBFBD>ROM
|
||||
// <20><><EFBFBD><EFBFBD>ֵ:0,<2C>ɹ<EFBFBD>
|
||||
// 1,<2C>ڴ<EFBFBD><DAB4><EFBFBD><EFBFBD><EFBFBD>
|
||||
// 3,map<61><70><EFBFBD><EFBFBD>
|
||||
u8 nes_load_rom(void)
|
||||
{
|
||||
u8* p;
|
||||
u8 i;
|
||||
u8 res=0;
|
||||
p=(u8*)romfile;
|
||||
if(strncmp((char*)p,"NES",3)==0)
|
||||
{
|
||||
uint8_t nes_load_rom(void) {
|
||||
uint8_t *p;
|
||||
uint8_t i;
|
||||
uint8_t res = 0;
|
||||
p = (uint8_t *)romfile;
|
||||
if (strncmp((char *)p, "NES", 3) == 0) {
|
||||
RomHeader->ctrl_z = p[3];
|
||||
RomHeader->num_16k_rom_banks = p[4];
|
||||
RomHeader->num_8k_vrom_banks = p[5];
|
||||
RomHeader->flags_1 = p[6];
|
||||
RomHeader->flags_2 = p[7];
|
||||
if(RomHeader->flags_1&0x04)p+=512; //<2F><>512<31>ֽڵ<D6BD>trainer:
|
||||
if (RomHeader->flags_1 & 0x04)
|
||||
p += 512; // <20><>512<31>ֽڵ<D6BD>trainer:
|
||||
if (RomHeader->num_8k_vrom_banks > 0) // <20><><EFBFBD><EFBFBD>VROM,<2C><><EFBFBD><EFBFBD>Ԥ<EFBFBD><D4A4><EFBFBD><EFBFBD>
|
||||
{
|
||||
VROM_banks = p + 16 + (RomHeader->num_16k_rom_banks * 0x4000);
|
||||
#if NES_RAM_SPEED == 1 // 1:<3A>ڴ<EFBFBD>ռ<EFBFBD><D5BC>С 0:<3A>ٶȿ<D9B6>
|
||||
VROM_tiles = VROM_banks;
|
||||
#else
|
||||
VROM_tiles=mymalloc(RomHeader->num_8k_vrom_banks*8*1024);//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>1MB<4D>ڴ<EFBFBD>!!!
|
||||
if(VROM_tiles==0)VROM_tiles=VROM_banks;//<2F>ڴ治<EFBFBD><EFBFBD><EFBFBD>õ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>,<EFBFBD><EFBFBD><EFBFBD><EFBFBD>VROM_titles<EFBFBD><EFBFBD>VROM_banks<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ڴ<EFBFBD>
|
||||
compile(RomHeader->num_8k_vrom_banks*8*1024/16,VROM_banks,VROM_tiles);
|
||||
VROM_tiles = mymalloc(RomHeader->num_8k_vrom_banks * 8 *
|
||||
1024); // <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>1MB<EFBFBD>ڴ<EFBFBD>!!!
|
||||
if (VROM_tiles == 0)
|
||||
VROM_tiles =
|
||||
VROM_banks; // <20>ڴ治<DAB4><E6B2BB><EFBFBD>õ<EFBFBD><C3B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>,<2C><><EFBFBD><EFBFBD>VROM_titles<65><73>VROM_banks<6B><73><EFBFBD><EFBFBD><EFBFBD>ڴ<EFBFBD>
|
||||
compile(RomHeader->num_8k_vrom_banks * 8 * 1024 / 16, VROM_banks,
|
||||
VROM_tiles);
|
||||
#endif
|
||||
}else
|
||||
{
|
||||
} else {
|
||||
VROM_banks = mymalloc(8 * 1024);
|
||||
VROM_tiles = mymalloc(8 * 1024);
|
||||
if(!VROM_banks||!VROM_tiles)res=1;
|
||||
if (!VROM_banks || !VROM_tiles)
|
||||
res = 1;
|
||||
}
|
||||
VROM_1K_SIZE = RomHeader->num_8k_vrom_banks * 8;
|
||||
VROM_8K_SIZE = RomHeader->num_8k_vrom_banks;
|
||||
MapperNo = (RomHeader->flags_1 >> 4) | (RomHeader->flags_2 & 0xf0);
|
||||
if(RomHeader->flags_2 & 0x0E)MapperNo=RomHeader->flags_1>>4;//<2F><><EFBFBD>Ը<EFBFBD><D4B8><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
if (RomHeader->flags_2 & 0x0E)
|
||||
MapperNo = RomHeader->flags_1 >> 4; // <20><><EFBFBD>Ը<EFBFBD><D4B8><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
// printf("use map:%d\r\n",MapperNo);
|
||||
for (i = 0; i < 255; i++) // <20><><EFBFBD><EFBFBD>֧<EFBFBD>ֵ<EFBFBD>Mapper<65><72>
|
||||
{
|
||||
if (MapTab[i]==MapperNo)break;
|
||||
if (MapTab[i]==-1)res=3;
|
||||
if (MapTab[i] == MapperNo)
|
||||
break;
|
||||
if (MapTab[i] == -1)
|
||||
res = 3;
|
||||
}
|
||||
if(res==0)
|
||||
{
|
||||
switch(MapperNo)
|
||||
{
|
||||
if (res == 0) {
|
||||
switch (MapperNo) {
|
||||
case 1:
|
||||
MAP1 = mymalloc(sizeof(Mapper1Res));
|
||||
if(!MAP1)res=1;
|
||||
if (!MAP1)
|
||||
res = 1;
|
||||
break;
|
||||
case 4:
|
||||
case 6:
|
||||
@@ -123,7 +124,8 @@ u8 nes_load_rom(void)
|
||||
case 85:
|
||||
case 189:
|
||||
MAPx = mymalloc(sizeof(MapperCommRes));
|
||||
if(!MAPx)res=1;
|
||||
if (!MAPx)
|
||||
res = 1;
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
@@ -135,8 +137,7 @@ u8 nes_load_rom(void)
|
||||
// <20><><EFBFBD><EFBFBD>NES_RAM<41><4D><EFBFBD><EFBFBD><EFBFBD>ڴ<EFBFBD>ʱ<EFBFBD>ĸ<EFBFBD><C4B8><EFBFBD>ָ<EFBFBD><D6B8>
|
||||
void *nes_ram_alignment;
|
||||
// <20>ͷ<EFBFBD><CDB7>ڴ<EFBFBD>
|
||||
void nes_sram_free(void)
|
||||
{
|
||||
void nes_sram_free(void) {
|
||||
// myfree(NES_RAM);
|
||||
myfree(nes_ram_alignment);
|
||||
myfree(NES_SRAM);
|
||||
@@ -149,7 +150,8 @@ void nes_sram_free(void)
|
||||
myfree(i2sbuf1);
|
||||
myfree(i2sbuf2);
|
||||
myfree(romfile);
|
||||
if((VROM_tiles!=VROM_banks)&&VROM_banks&&VROM_tiles)//<2F><><EFBFBD><EFBFBD><EFBFBD>ֱ<EFBFBD>ΪVROM_banks<6B><73>VROM_tiles<65><73><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ڴ<EFBFBD>,<2C><><EFBFBD>ͷ<EFBFBD>
|
||||
if ((VROM_tiles != VROM_banks) && VROM_banks &&
|
||||
VROM_tiles) // <20><><EFBFBD><EFBFBD><EFBFBD>ֱ<EFBFBD>ΪVROM_banks<6B><73>VROM_tiles<65><73><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ڴ<EFBFBD>,<2C><><EFBFBD>ͷ<EFBFBD>
|
||||
{
|
||||
myfree(VROM_banks);
|
||||
myfree(VROM_tiles);
|
||||
@@ -175,8 +177,10 @@ void nes_sram_free(void)
|
||||
case 69:
|
||||
case 85:
|
||||
case 189:
|
||||
myfree(MAPx);break; //<2F>ͷ<EFBFBD><CDB7>ڴ<EFBFBD>
|
||||
default:break;
|
||||
myfree(MAPx);
|
||||
break; // <20>ͷ<EFBFBD><CDB7>ڴ<EFBFBD>
|
||||
default:
|
||||
break;
|
||||
}
|
||||
NES_RAM = 0;
|
||||
NES_SRAM = 0;
|
||||
@@ -198,13 +202,12 @@ void nes_sram_free(void)
|
||||
// romsize:nes<65>ļ<EFBFBD><C4BC><EFBFBD>С
|
||||
// <20><><EFBFBD><EFBFBD>ֵ:0,<2C><><EFBFBD><EFBFBD><EFBFBD>ɹ<EFBFBD>
|
||||
// 1,<2C><><EFBFBD><EFBFBD>ʧ<EFBFBD><CAA7>
|
||||
u8 nes_sram_malloc(u32 romsize)
|
||||
{
|
||||
u16 i=0;
|
||||
uint8_t nes_sram_malloc(uint32_t romsize) {
|
||||
uint16_t i = 0;
|
||||
|
||||
// NES_RAM<41><4D>Ҫ0x800<30><30>С<EFBFBD><D0A1><EFBFBD>ڴ棬<DAB4><E6A3AC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>0x400<30><30><EFBFBD>ڴ棬<DAB4><E6A3AC><EFBFBD><EFBFBD>1024<32>ֽڶ<D6BD><DAB6><EFBFBD>
|
||||
nes_ram_alignment = mymalloc(0x800 + 0x400);
|
||||
NES_RAM=(void*)(((u32)nes_ram_alignment+0x400)&0xfffffc00);
|
||||
NES_RAM = (void *)(((uint32_t)nes_ram_alignment + 0x400) & 0xfffffc00);
|
||||
|
||||
NES_SRAM = mymalloc(0X2000);
|
||||
RomHeader = mymalloc(sizeof(NES_header));
|
||||
@@ -216,8 +219,9 @@ u8 nes_sram_malloc(u32 romsize)
|
||||
i2sbuf1 = mymalloc(APU_PCMBUF_SIZE * 4 + 10);
|
||||
i2sbuf2 = mymalloc(APU_PCMBUF_SIZE * 4 + 10);
|
||||
romfile = mymalloc(romsize); // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϸrom<6F>ռ<EFBFBD>,<2C><><EFBFBD><EFBFBD>nes<65>ļ<EFBFBD><C4BC><EFBFBD>С
|
||||
if(i==64||!NES_RAM||!NES_SRAM||!RomHeader||!NES_Mapper||!spr_ram||!ppu||!apu||!wave_buffers||!i2sbuf1||!i2sbuf2||!romfile)
|
||||
{
|
||||
if (i == 64 || !NES_RAM || !NES_SRAM || !RomHeader || !NES_Mapper ||
|
||||
!spr_ram || !ppu || !apu || !wave_buffers || !i2sbuf1 || !i2sbuf2 ||
|
||||
!romfile) {
|
||||
nes_sram_free();
|
||||
return 1;
|
||||
}
|
||||
@@ -234,24 +238,9 @@ u8 nes_sram_malloc(u32 romsize)
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
int nes_xoff = 0; // <20><>ʾ<EFBFBD><CABE>x<EFBFBD>᷽<EFBFBD><E1B7BD><EFBFBD><EFBFBD>ƫ<EFBFBD><C6AB><EFBFBD><EFBFBD>(ʵ<><CAB5><EFBFBD><EFBFBD>ʾ<EFBFBD><CABE><EFBFBD><EFBFBD>=256-2*nes_xoff)
|
||||
int nes_yoff = 0;
|
||||
|
||||
|
||||
|
||||
// <20><>ʼnes<65><73>Ϸ
|
||||
// pname:nes<65><73>Ϸ·<CFB7><C2B7>
|
||||
// <20><><EFBFBD><EFBFBD>ֵ:
|
||||
@@ -259,22 +248,18 @@ int nes_yoff=0;
|
||||
// 1,<2C>ڴ<EFBFBD><DAB4><EFBFBD><EFBFBD><EFBFBD>
|
||||
// 2,<2C>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD>
|
||||
// 3,<2C><>֧<EFBFBD>ֵ<EFBFBD>map
|
||||
u8 nes_load(u8* pname,void *lcd_addr,int x,int y)
|
||||
{
|
||||
uint8_t nes_load(uint8_t *pname, void *lcd_addr, int x, int y) {
|
||||
nes_xoff = x;
|
||||
nes_yoff = y;
|
||||
FIL *file;
|
||||
FILINFO *file_info;
|
||||
UINT br;
|
||||
u8 res=0;
|
||||
// app_wm8978_volset(wm8978set.mvol);
|
||||
// WM8978_ADDA_Cfg(1,0); //<2F><><EFBFBD><EFBFBD>DAC
|
||||
// WM8978_Input_Cfg(0,0,0);//<2F>ر<EFBFBD><D8B1><EFBFBD><EFBFBD><EFBFBD>ͨ<EFBFBD><CDA8>
|
||||
// WM8978_Output_Cfg(1,0); //<2F><><EFBFBD><EFBFBD>DAC<41><43><EFBFBD><EFBFBD>
|
||||
uint8_t res = 0;
|
||||
g_nes_break = 0;
|
||||
file = mymalloc(sizeof(FIL));
|
||||
file_info = mymalloc(sizeof(FILINFO));
|
||||
if(file==0)return 1; //<2F>ڴ<EFBFBD><DAB4><EFBFBD><EFBFBD><EFBFBD>ʧ<EFBFBD><CAA7>.
|
||||
if (file == 0)
|
||||
return 1; // <20>ڴ<EFBFBD><DAB4><EFBFBD><EFBFBD><EFBFBD>ʧ<EFBFBD><CAA7>.
|
||||
|
||||
res = f_stat((char *)pname, file_info);
|
||||
if (res != FR_OK) // <20><><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD>ʧ<EFBFBD><CAA7>
|
||||
@@ -284,13 +269,11 @@ u8 nes_load(u8* pname,void *lcd_addr,int x,int y)
|
||||
return 2;
|
||||
}
|
||||
res = nes_sram_malloc(file_info->fsize); // <20><><EFBFBD><EFBFBD><EFBFBD>ڴ<EFBFBD>
|
||||
if(res==0)
|
||||
{
|
||||
if (res == 0) {
|
||||
f_open(file, (char *)pname, FA_READ);
|
||||
f_read(file, romfile, file_info->fsize, &br); // <20><>ȡnes<65>ļ<EFBFBD>
|
||||
res = nes_load_rom(); // <20><><EFBFBD><EFBFBD>ROM
|
||||
if(res==0)
|
||||
{
|
||||
if (res == 0) {
|
||||
Mapper_Init(); // map<61><70>ʼ<EFBFBD><CABC>
|
||||
cpu6502_init(); // <20><>ʼ<EFBFBD><CABC>6502,<2C><><EFBFBD><EFBFBD>λ
|
||||
PPU_reset(lcd_addr); // ppu<70><75>λ
|
||||
@@ -307,27 +290,18 @@ u8 nes_load(u8* pname,void *lcd_addr,int x,int y)
|
||||
return res;
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
// <20><><EFBFBD><EFBFBD><EFBFBD>Ѿ<EFBFBD><D1BE><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ڴ<EFBFBD><DAB4>е<EFBFBD><D0B5><EFBFBD>Ϸ
|
||||
u8 nes_start(u8* file,int fileSize,void *lcd_addr,int x,int y)
|
||||
{
|
||||
uint8_t nes_start(uint8_t *file, int fileSize, void *lcd_addr, int x, int y) {
|
||||
nes_xoff = x;
|
||||
nes_yoff = y;
|
||||
u8 res=0;
|
||||
uint8_t res = 0;
|
||||
g_nes_break = 0;
|
||||
res = nes_sram_malloc(fileSize); // <20><><EFBFBD><EFBFBD><EFBFBD>ڴ<EFBFBD>
|
||||
|
||||
if(res==0)
|
||||
{
|
||||
if (res == 0) {
|
||||
mymemcpy(romfile, file, fileSize); // <20><><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>пռ<D0BF>
|
||||
res = nes_load_rom(); // <20><><EFBFBD><EFBFBD>ROM
|
||||
if(res==0)
|
||||
{
|
||||
if (res == 0) {
|
||||
Mapper_Init(); // map<61><70>ʼ<EFBFBD><CABC>
|
||||
cpu6502_init(); // <20><>ʼ<EFBFBD><CABC>6502,<2C><><EFBFBD><EFBFBD>λ
|
||||
PPU_reset(lcd_addr); // ppu<70><75>λ
|
||||
@@ -341,45 +315,33 @@ u8 nes_start(u8* file,int fileSize,void *lcd_addr,int x,int y)
|
||||
return res;
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϸ<EFBFBD><CFB7>ʾ<EFBFBD><CABE><EFBFBD><EFBFBD>
|
||||
void nes_set_window(void)
|
||||
{
|
||||
}
|
||||
void nes_set_window(void) {}
|
||||
|
||||
// <20><>ȡ<EFBFBD><C8A1>Ϸ<EFBFBD>ֱ<EFBFBD><D6B1><EFBFBD><EFBFBD><EFBFBD>
|
||||
void nes_get_gamepadval(void)
|
||||
{
|
||||
void nes_get_gamepadval(void) {
|
||||
#include "usart.h"
|
||||
PADdata = USART3_GetKey();
|
||||
PADdata1 = 0;
|
||||
}
|
||||
|
||||
// nesģ<73><C4A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ѭ<EFBFBD><D1AD>
|
||||
void nes_emulate_frame(void)
|
||||
{
|
||||
u8 nes_frame;
|
||||
void nes_emulate_frame(void) {
|
||||
uint8_t nes_frame;
|
||||
// TIM3_Int_Init(10000-1,8400-1);//<2F><><EFBFBD><EFBFBD>TIM3 ,1s<31>ж<EFBFBD>һ<EFBFBD><D2BB>
|
||||
nes_set_window(); // <20><><EFBFBD>ô<EFBFBD><C3B4><EFBFBD>
|
||||
while(1)
|
||||
{
|
||||
while (1) {
|
||||
// LINES 0-239
|
||||
PPU_start_frame();
|
||||
// LCD_SwitchLayerBuff();//<2F>л<EFBFBD>֡
|
||||
for(NES_scanline = 0; NES_scanline< 240; NES_scanline++)
|
||||
{
|
||||
for (NES_scanline = 0; NES_scanline < 240; NES_scanline++) {
|
||||
run6502(113 * 256);
|
||||
NES_Mapper->HSync(NES_scanline);
|
||||
// ɨ<><C9A8>һ<EFBFBD><D2BB>
|
||||
if(nes_frame==0)scanline_draw(NES_scanline);
|
||||
else do_scanline_and_dont_draw(NES_scanline);
|
||||
if (nes_frame == 0)
|
||||
scanline_draw(NES_scanline);
|
||||
else
|
||||
do_scanline_and_dont_draw(NES_scanline);
|
||||
}
|
||||
// LCD_ExitLayerBuff ();
|
||||
|
||||
@@ -387,15 +349,13 @@ void nes_emulate_frame(void)
|
||||
run6502(113 * 256); // <20><><EFBFBD><EFBFBD>1<EFBFBD><31>
|
||||
NES_Mapper->HSync(NES_scanline);
|
||||
start_vblank();
|
||||
if(NMI_enabled())
|
||||
{
|
||||
if (NMI_enabled()) {
|
||||
cpunmi = 1;
|
||||
run6502(7 * 256); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
|
||||
}
|
||||
NES_Mapper->VSync();
|
||||
// LINES 242-261
|
||||
for(NES_scanline=241;NES_scanline<262;NES_scanline++)
|
||||
{
|
||||
for (NES_scanline = 241; NES_scanline < 262; NES_scanline++) {
|
||||
run6502(113 * 256);
|
||||
NES_Mapper->HSync(NES_scanline);
|
||||
}
|
||||
@@ -404,26 +364,23 @@ void nes_emulate_frame(void)
|
||||
apu_soundoutput(); // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϸ<EFBFBD><CFB7><EFBFBD><EFBFBD>
|
||||
nes_frame_cnt++;
|
||||
nes_frame++;
|
||||
if(nes_frame>NES_SKIP_FRAME)nes_frame=0;//<2F><>֡
|
||||
u8 nesBreak (void);
|
||||
if (nesBreak()) break;
|
||||
if (Touch_GetState()->x[1]!=0) break;
|
||||
if (nes_frame > NES_SKIP_FRAME)
|
||||
nes_frame = 0; // <20><>֡
|
||||
uint8_t nesBreak(void);
|
||||
if (nesBreak())
|
||||
break;
|
||||
if (Touch_GetState()->x[1] != 0)
|
||||
break;
|
||||
}
|
||||
// TIM3->CR1&=~(1<<0);//<2F>رն<D8B1>ʱ<EFBFBD><CAB1>3
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
u8 nesBreak (void)
|
||||
{
|
||||
u8 t=0;
|
||||
if ((PADdata&0x0c)==0x0c)
|
||||
{
|
||||
uint8_t nesBreak(void) {
|
||||
uint8_t t = 0;
|
||||
if ((PADdata & 0x0c) == 0x0c) {
|
||||
g_nes_break = 0x0c;
|
||||
}
|
||||
if ((g_nes_break)&&(t=USART3_GetKeyPressed(),t&0x0c))
|
||||
{
|
||||
if ((g_nes_break) && (t = USART3_GetKeyPressed(), t & 0x0c)) {
|
||||
g_nes_break &= ~t;
|
||||
if (g_nes_break == 0)
|
||||
return 1;
|
||||
@@ -431,81 +388,56 @@ u8 nesBreak (void)
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
// <20><>6502.s<><73><EFBFBD>汻<EFBFBD><E6B1BB><EFBFBD><EFBFBD>
|
||||
void debug_6502(u16 reg0,u8 reg1)
|
||||
{
|
||||
void debug_6502(uint16_t reg0, uint8_t reg1) {
|
||||
// printf("6502 error:%x,%d\r\n",reg0,reg1);
|
||||
}
|
||||
|
||||
|
||||
|
||||
//////////////////////////////////////////////////////////////////////////////////
|
||||
// nes,<2C><>Ƶ<EFBFBD><C6B5><EFBFBD><EFBFBD>֧<EFBFBD>ֲ<EFBFBD><D6B2><EFBFBD>
|
||||
|
||||
|
||||
|
||||
static vu8 g_buff_Invalid = 0; // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ЧʱҪ<CAB1><D2AA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
static vu8 g_buff_useing; // <20><>ǰDMA<4D><41>ʹ<EFBFBD><CAB9><EFBFBD>ĸ<EFBFBD><C4B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
static DAC_UserStruct g_dac;
|
||||
|
||||
|
||||
|
||||
static void dma_tx_callback(DAC_UserStruct *dac)
|
||||
{
|
||||
u16 i;
|
||||
static void dma_tx_callback(DAC_UserStruct *dac) {
|
||||
uint16_t i;
|
||||
g_buff_useing = dac->buff_useing;
|
||||
g_buff_Invalid = 1;
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
// NES<45><53><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ƶ<EFBFBD><C6B5><EFBFBD><EFBFBD>
|
||||
int nes_sound_open(int samples_per_sync,int sample_rate)
|
||||
{
|
||||
int nes_sound_open(int samples_per_sync, int sample_rate) {
|
||||
|
||||
// <20><>ʼ<EFBFBD><CABC>DAC
|
||||
g_dac.buff1=(u32 *)i2sbuf1;
|
||||
g_dac.buff2=(u32 *)i2sbuf2;
|
||||
g_dac.buff1 = (uint32_t *)i2sbuf1;
|
||||
g_dac.buff2 = (uint32_t *)i2sbuf2;
|
||||
g_dac.buff_size = APU_PCMBUF_SIZE * 4;
|
||||
g_dac.rate = RATE22050;
|
||||
g_dac.call_back = dma_tx_callback;
|
||||
DAC_NormalInit(&g_dac);
|
||||
return 1;
|
||||
}
|
||||
//NES<45>ر<EFBFBD><D8B1><EFBFBD>Ƶ<EFBFBD><C6B5><EFBFBD><EFBFBD>
|
||||
void nes_sound_close(void)
|
||||
{
|
||||
DAC_NormalDeInit (&g_dac);
|
||||
}
|
||||
//NES<45><53>Ƶ<EFBFBD><C6B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD>I2S<32><53><EFBFBD><EFBFBD>
|
||||
void nes_apu_fill_buffer(int samples,u16* wavebuf)
|
||||
{
|
||||
|
||||
if (DAC_GetDacHander()!=&g_dac) return;
|
||||
u16 i;
|
||||
u16 *p;
|
||||
// NES<45>ر<EFBFBD><D8B1><EFBFBD>Ƶ<EFBFBD><C6B5><EFBFBD><EFBFBD>
|
||||
void nes_sound_close(void) { DAC_NormalDeInit(&g_dac); }
|
||||
|
||||
void nes_apu_fill_buffer(int samples, uint16_t *wavebuf) {
|
||||
if (DAC_GetDacHander() != &g_dac)
|
||||
return;
|
||||
uint16_t i;
|
||||
uint16_t *p;
|
||||
while (g_buff_Invalid == 0) // <20>ȴ<EFBFBD><C8B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
rt_thread_delay(5);//
|
||||
rt_thread_delay(5);
|
||||
};
|
||||
if(g_buff_useing==0)
|
||||
{
|
||||
p=(u16*)i2sbuf2;
|
||||
}else
|
||||
{
|
||||
p=(u16*)i2sbuf1;
|
||||
if (g_buff_useing == 0) {
|
||||
p = (uint16_t *)i2sbuf2;
|
||||
} else {
|
||||
p = (uint16_t *)i2sbuf1;
|
||||
}
|
||||
{
|
||||
for(i=0;i<APU_PCMBUF_SIZE;i++)
|
||||
{
|
||||
for (i = 0; i < APU_PCMBUF_SIZE; i++) {
|
||||
p[2 * i] = ((wavebuf[i] + 0x8000) >> 4);
|
||||
p[2 * i + 1] = p[2 * i];
|
||||
}
|
||||
@@ -513,22 +445,3 @@ void nes_apu_fill_buffer(int samples,u16* wavebuf)
|
||||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>֮<EFBFBD><D6AE><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA>Ч
|
||||
g_buff_Invalid = 0;
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
@@ -1,6 +1,3 @@
|
||||
#ifndef __NES_MAIN_H
|
||||
#define __NES_MAIN_H
|
||||
|
||||
//////////////////////////////////////////////////////////////////////////////////
|
||||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֲ<EFBFBD><D6B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ye781205<30><35>NESģ<53><C4A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
// ALIENTEK STM32F407<30><37><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
@@ -11,23 +8,18 @@
|
||||
// <20>汾<EFBFBD><E6B1BE>V1.0
|
||||
//////////////////////////////////////////////////////////////////////////////////
|
||||
|
||||
#ifndef __NES_MAIN_H
|
||||
#define __NES_MAIN_H
|
||||
|
||||
#include "stdint.h"
|
||||
|
||||
#define NES_SKIP_FRAME 2 // <20><><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>֡<EFBFBD><D6A1>,Ĭ<><C4AC><EFBFBD><EFBFBD>2֡
|
||||
|
||||
|
||||
#define INLINE static inline
|
||||
#define int8 char
|
||||
#define int16 short
|
||||
#define int32 int
|
||||
#define uint8 unsigned char
|
||||
#define uint16 unsigned short
|
||||
#define uint32 unsigned int
|
||||
#define boolean uint8
|
||||
|
||||
|
||||
#define boolean uint8_t
|
||||
|
||||
// nes<65><73>Ϣͷ<CFA2>ṹ<EFBFBD><E1B9B9>
|
||||
typedef struct
|
||||
{
|
||||
typedef struct {
|
||||
unsigned char id[3]; // 'NES'
|
||||
unsigned char ctrl_z; // control-z
|
||||
unsigned char num_16k_rom_banks;
|
||||
@@ -37,49 +29,40 @@ typedef struct
|
||||
unsigned char reserved[8];
|
||||
} NES_header;
|
||||
|
||||
extern u8 nes_frame_cnt; //nes֡<73><D6A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
extern uint8_t nes_frame_cnt; // nes֡<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
extern int MapperNo; // map<61><70><EFBFBD><EFBFBD>
|
||||
extern int NES_scanline; // ɨ<><C9A8><EFBFBD><EFBFBD>
|
||||
extern NES_header *RomHeader; // rom<6F>ļ<EFBFBD>ͷ
|
||||
extern int VROM_1K_SIZE;
|
||||
extern int VROM_8K_SIZE;
|
||||
extern u8 cpunmi; //cpu<70>жϱ<D0B6>־ <20><> 6502.s<><73><EFBFBD><EFBFBD>
|
||||
extern u8 cpuirq;
|
||||
extern u8 PADdata; //<2F>ֱ<EFBFBD>1<EFBFBD><31>ֵ
|
||||
extern u8 PADdata1; //<2F>ֱ<EFBFBD>1<EFBFBD><31>ֵ
|
||||
extern u8 lianan_biao; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־
|
||||
extern uint8_t cpunmi; // cpu<EFBFBD>жϱ<EFBFBD>־ <20><> 6502.s<><73><EFBFBD><EFBFBD>
|
||||
extern uint8_t cpuirq;
|
||||
extern uint8_t PADdata; // <EFBFBD>ֱ<EFBFBD>1<EFBFBD><EFBFBD>ֵ
|
||||
extern uint8_t PADdata1; // <EFBFBD>ֱ<EFBFBD>1<EFBFBD><EFBFBD>ֵ
|
||||
extern uint8_t lianan_biao; // <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־
|
||||
#define CPU_NMI cpunmi = 1;
|
||||
#define CPU_IRQ cpuirq = 1;
|
||||
#define NES_RAM_SPEED 0 // 1:<3A>ڴ<EFBFBD>ռ<EFBFBD><D5BC>С 0:<3A>ٶȿ<D9B6>
|
||||
|
||||
|
||||
// ʹ<><CAB9><EFBFBD>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϸ
|
||||
u8 nes_load(u8* pname,void *lcd_addr,int x,int y);
|
||||
uint8_t nes_load(uint8_t *pname, void *lcd_addr, int x, int y);
|
||||
|
||||
// <20><><EFBFBD><EFBFBD><EFBFBD>Ѿ<EFBFBD><D1BE><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ڴ<EFBFBD><DAB4>е<EFBFBD><D0B5><EFBFBD>Ϸ
|
||||
u8 nes_start(u8* file,int fileSize,void *lcd_addr,int x,int y);
|
||||
|
||||
|
||||
uint8_t nes_start(uint8_t *file, int fileSize, void *lcd_addr, int x, int y);
|
||||
|
||||
void cpu6502_init(void); // <20><> cart.s
|
||||
void run6502(u32); //<2F><> 6502.s
|
||||
u8 nes_load_rom(void);
|
||||
void run6502(uint32_t); // <EFBFBD><EFBFBD> 6502.s
|
||||
uint8_t nes_load_rom(void);
|
||||
void nes_sram_free(void);
|
||||
u8 nes_sram_malloc(u32 romsize);
|
||||
uint8_t nes_sram_malloc(uint32_t romsize);
|
||||
void nes_set_window(void);
|
||||
void nes_get_gamepadval(void);
|
||||
void nes_emulate_frame(void);
|
||||
void debug_6502(u16 reg0,u8 reg1);
|
||||
void debug_6502(uint16_t reg0, uint8_t reg1);
|
||||
|
||||
void nes_i2s_dma_tx_callback(void);
|
||||
int nes_sound_open(int samples_per_sync, int sample_rate);
|
||||
void nes_sound_close(void);
|
||||
void nes_apu_fill_buffer(int samples,u16* wavebuf);
|
||||
void nes_apu_fill_buffer(int samples, uint16_t *wavebuf);
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
@@ -1,7 +1,3 @@
|
||||
#include "stm32f4xx.h"
|
||||
#include "nes_main.h"
|
||||
#include "nes_ppu.h"
|
||||
#include "nes_mapper.h"
|
||||
//////////////////////////////////////////////////////////////////////////////////
|
||||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֲ<EFBFBD><D6B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ye781205<30><35>NESģ<53><C4A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
// ALIENTEK STM32F407<30><37><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
@@ -12,6 +8,34 @@
|
||||
// <20>汾<EFBFBD><E6B1BE>V1.0
|
||||
//////////////////////////////////////////////////////////////////////////////////
|
||||
|
||||
#include "nes_mapper.h"
|
||||
#include "nes_main.h"
|
||||
#include "nes_ppu.h"
|
||||
|
||||
|
||||
#ifndef u8
|
||||
#define u8 uint8_t
|
||||
#endif
|
||||
#ifndef u16
|
||||
#define u16 uint16_t
|
||||
#endif
|
||||
#ifndef u32
|
||||
#define u32 uint32_t
|
||||
#endif
|
||||
#ifndef uint8
|
||||
#define uint8 uint8_t
|
||||
#endif
|
||||
#ifndef uint16
|
||||
#define uint16 uint16_t
|
||||
#endif
|
||||
#ifndef uint32
|
||||
#define uint32 uint32_t
|
||||
#endif
|
||||
#ifndef int32
|
||||
#define int32 int32_t
|
||||
#endif
|
||||
|
||||
|
||||
// <20><><EFBFBD><EFBFBD><EFBFBD>Լ<EFBFBD><D4BC><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>map<61>ļ<EFBFBD><C4BC><EFBFBD>.
|
||||
#include "mapper/000.cpp"
|
||||
#include "mapper/001.cpp"
|
||||
@@ -62,32 +86,30 @@
|
||||
|
||||
|
||||
// ֧<>ֵ<EFBFBD>Mapper<65><72>,<2C>Լ<EFBFBD><D4BC><EFBFBD><EFBFBD><EFBFBD>
|
||||
const int MapTab[] =
|
||||
{
|
||||
0,1,2,3,4,6,7,8,11,13,15,16,17,18,19,21,22,23,24,25,32,33,34,
|
||||
64,65,66,67,69,70,71,72,73,75,76,78,79,85,87,88,99,113,
|
||||
189,225,227,240,245,
|
||||
const int MapTab[] = {
|
||||
0, 1, 2, 3, 4, 6, 7, 8, 11, 13, 15, 16, 17, 18, 19, 21,
|
||||
22, 23, 24, 25, 32, 33, 34, 64, 65, 66, 67, 69, 70, 71, 72, 73,
|
||||
75, 76, 78, 79, 85, 87, 88, 99, 113, 189, 225, 227, 240, 245,
|
||||
-1, // <20><><EFBFBD><EFBFBD>һ<EFBFBD><D2BB>,-1,<2C><>ʾ<EFBFBD><CABE>֧<EFBFBD>ֵ<EFBFBD>map<61><70>
|
||||
};
|
||||
#define MASK_BANK(bank, mask) (bank) = ((bank) & (mask))
|
||||
#define VALIDATE_VROM_BANK(bank) \
|
||||
MASK_BANK(bank, VROM_mask); \
|
||||
if((bank) >= VROM_1K_SIZE) return;
|
||||
if ((bank) >= VROM_1K_SIZE) \
|
||||
return;
|
||||
|
||||
|
||||
uint32 VROM_mask;
|
||||
uint32_t VROM_mask;
|
||||
|
||||
void Mapper_Reset(void) {}
|
||||
uint8 Mapper_ReadLow(uint16 addr){ return 0;}
|
||||
void Mapper_WriteLow(uint16 addr,uint8 data){}
|
||||
void Mapper_Write( uint16 addr , uint8 data){}
|
||||
void Mapper_Read( uint8 data,uint16 addr ){}
|
||||
uint8_t Mapper_ReadLow(uint16_t addr) { return 0; }
|
||||
void Mapper_WriteLow(uint16_t addr, uint8_t data) {}
|
||||
void Mapper_Write(uint16_t addr, uint8_t data) {}
|
||||
void Mapper_Read(uint8_t data, uint16_t addr) {}
|
||||
void Mapper_HSync(int scanline) {}
|
||||
void Mapper_VSync(void) {}
|
||||
|
||||
void Mapper_Init(void)
|
||||
{
|
||||
uint32 probe;
|
||||
void Mapper_Init(void) {
|
||||
uint32_t probe;
|
||||
NES_Mapper->Reset = Mapper_Reset;
|
||||
NES_Mapper->Write = Mapper_Write;
|
||||
NES_Mapper->Read = Mapper_Read;
|
||||
@@ -96,74 +118,164 @@ void Mapper_VSync(void) {}
|
||||
NES_Mapper->HSync = Mapper_HSync;
|
||||
NES_Mapper->VSync = Mapper_VSync;
|
||||
VROM_mask = 0xFFFF;
|
||||
for(probe = 0x8000; probe; probe >>= 1)
|
||||
{
|
||||
if((VROM_1K_SIZE-1) & probe) break;
|
||||
for (probe = 0x8000; probe; probe >>= 1) {
|
||||
if ((VROM_1K_SIZE - 1) & probe)
|
||||
break;
|
||||
VROM_mask >>= 1;
|
||||
}
|
||||
|
||||
switch (MapperNo)
|
||||
{
|
||||
case 0 :MAP0_Init();break;
|
||||
case 1 :MAP1_Init();break;
|
||||
case 2 :MAP2_Init();break;
|
||||
case 3 :MAP3_Init();break;
|
||||
case 4 :MAP4_Init();break;
|
||||
case 6 :MAP6_Init();break;
|
||||
case 7 :MAP7_Init();break;
|
||||
case 8 :MAP8_Init();break;
|
||||
case 11:MAP11_Init();break;
|
||||
case 13:MAP13_Init();break;
|
||||
case 15:MAP15_Init();break;
|
||||
case 16:MAP16_Init();break;
|
||||
case 17:MAP17_Init();break;
|
||||
case 18:MAP18_Init();break;
|
||||
case 19:MAP19_Init();break;
|
||||
case 21:MAP21_Init();break;
|
||||
case 22:MAP22_Init();break;
|
||||
case 23:MAP23_Init();break;
|
||||
case 24:MAP24_Init();break;
|
||||
case 25:MAP25_Init();break;
|
||||
case 32:MAP32_Init();break;
|
||||
case 33:MAP33_Init();break;
|
||||
case 34:MAP34_Init();break;
|
||||
case 64:MAP64_Init();break;
|
||||
case 65:MAP65_Init();break;
|
||||
case 66:MAP66_Init();break;
|
||||
case 67:MAP67_Init();break;
|
||||
case 69:MAP69_Init();break;
|
||||
case 70:MAP70_Init();break;
|
||||
case 71:MAP71_Init();break;
|
||||
case 72:MAP72_Init();break;
|
||||
case 73:MAP73_Init();break;
|
||||
case 75:MAP75_Init();break;
|
||||
case 76:MAP76_Init();break;
|
||||
case 78:MAP78_Init();break;
|
||||
case 79:MAP79_Init();break;
|
||||
case 85:MAP85_Init();break;
|
||||
case 87:MAP87_Init();break;
|
||||
case 88:MAP88_Init();break;
|
||||
case 99:MAP99_Init();break;
|
||||
case 113:MAP113_Init();break;
|
||||
case 189:MAP189_Init();break;
|
||||
case 225:MAP225_Init();break;
|
||||
case 227:MAP227_Init();break;
|
||||
case 240:MAP240_Init();break;
|
||||
case 245:MAP245_Init();break;
|
||||
default:break;
|
||||
switch (MapperNo) {
|
||||
case 0:
|
||||
MAP0_Init();
|
||||
break;
|
||||
case 1:
|
||||
MAP1_Init();
|
||||
break;
|
||||
case 2:
|
||||
MAP2_Init();
|
||||
break;
|
||||
case 3:
|
||||
MAP3_Init();
|
||||
break;
|
||||
case 4:
|
||||
MAP4_Init();
|
||||
break;
|
||||
case 6:
|
||||
MAP6_Init();
|
||||
break;
|
||||
case 7:
|
||||
MAP7_Init();
|
||||
break;
|
||||
case 8:
|
||||
MAP8_Init();
|
||||
break;
|
||||
case 11:
|
||||
MAP11_Init();
|
||||
break;
|
||||
case 13:
|
||||
MAP13_Init();
|
||||
break;
|
||||
case 15:
|
||||
MAP15_Init();
|
||||
break;
|
||||
case 16:
|
||||
MAP16_Init();
|
||||
break;
|
||||
case 17:
|
||||
MAP17_Init();
|
||||
break;
|
||||
case 18:
|
||||
MAP18_Init();
|
||||
break;
|
||||
case 19:
|
||||
MAP19_Init();
|
||||
break;
|
||||
case 21:
|
||||
MAP21_Init();
|
||||
break;
|
||||
case 22:
|
||||
MAP22_Init();
|
||||
break;
|
||||
case 23:
|
||||
MAP23_Init();
|
||||
break;
|
||||
case 24:
|
||||
MAP24_Init();
|
||||
break;
|
||||
case 25:
|
||||
MAP25_Init();
|
||||
break;
|
||||
case 32:
|
||||
MAP32_Init();
|
||||
break;
|
||||
case 33:
|
||||
MAP33_Init();
|
||||
break;
|
||||
case 34:
|
||||
MAP34_Init();
|
||||
break;
|
||||
case 64:
|
||||
MAP64_Init();
|
||||
break;
|
||||
case 65:
|
||||
MAP65_Init();
|
||||
break;
|
||||
case 66:
|
||||
MAP66_Init();
|
||||
break;
|
||||
case 67:
|
||||
MAP67_Init();
|
||||
break;
|
||||
case 69:
|
||||
MAP69_Init();
|
||||
break;
|
||||
case 70:
|
||||
MAP70_Init();
|
||||
break;
|
||||
case 71:
|
||||
MAP71_Init();
|
||||
break;
|
||||
case 72:
|
||||
MAP72_Init();
|
||||
break;
|
||||
case 73:
|
||||
MAP73_Init();
|
||||
break;
|
||||
case 75:
|
||||
MAP75_Init();
|
||||
break;
|
||||
case 76:
|
||||
MAP76_Init();
|
||||
break;
|
||||
case 78:
|
||||
MAP78_Init();
|
||||
break;
|
||||
case 79:
|
||||
MAP79_Init();
|
||||
break;
|
||||
case 85:
|
||||
MAP85_Init();
|
||||
break;
|
||||
case 87:
|
||||
MAP87_Init();
|
||||
break;
|
||||
case 88:
|
||||
MAP88_Init();
|
||||
break;
|
||||
case 99:
|
||||
MAP99_Init();
|
||||
break;
|
||||
case 113:
|
||||
MAP113_Init();
|
||||
break;
|
||||
case 189:
|
||||
MAP189_Init();
|
||||
break;
|
||||
case 225:
|
||||
MAP225_Init();
|
||||
break;
|
||||
case 227:
|
||||
MAP227_Init();
|
||||
break;
|
||||
case 240:
|
||||
MAP240_Init();
|
||||
break;
|
||||
case 245:
|
||||
MAP245_Init();
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
NES_Mapper->Reset();
|
||||
}
|
||||
void asm_Mapper_Write(uint8 byData,uint16 wAddr)
|
||||
{
|
||||
void asm_Mapper_Write(uint8_t byData, uint16_t wAddr) {
|
||||
NES_Mapper->Write(wAddr, byData);
|
||||
}
|
||||
void asm_Mapper_ReadLow( uint16 wAddr) //<2F><><EFBFBD>ӵ<EFBFBD>
|
||||
void asm_Mapper_ReadLow(uint16_t wAddr) // <EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD>
|
||||
{
|
||||
NES_Mapper->ReadLow(wAddr);
|
||||
}
|
||||
void asm_Mapper_WriteLow( uint8 byData ,uint16 wAddr)
|
||||
{
|
||||
void asm_Mapper_WriteLow(uint8_t byData, uint16_t wAddr) {
|
||||
NES_Mapper->WriteLow(wAddr, byData);
|
||||
}
|
||||
|
||||
@@ -172,18 +284,15 @@ void set_CPU_bank4(signed char page ) {map89_(page) ;}
|
||||
void set_CPU_bank5(signed char page) { mapAB_(page); }
|
||||
void set_CPU_bank6(signed char page) { mapCD_(page); }
|
||||
void set_CPU_bank7(signed char page) { mapEF_(page); }
|
||||
void set_CPU_banks(int bank0_num,int bank1_num,int bank2_num, int bank3_num)
|
||||
{
|
||||
void set_CPU_banks(int bank0_num, int bank1_num, int bank2_num, int bank3_num) {
|
||||
map89_(bank0_num);
|
||||
mapAB_(bank1_num);
|
||||
mapCD_(bank2_num);
|
||||
mapEF_(bank3_num);
|
||||
}
|
||||
void set_PPU_banks(uint32 bank0_num, uint32 bank1_num,
|
||||
uint32 bank2_num, uint32 bank3_num,
|
||||
uint32 bank4_num, uint32 bank5_num,
|
||||
uint32 bank6_num, uint32 bank7_num)
|
||||
{
|
||||
void set_PPU_banks(uint32_t bank0_num, uint32_t bank1_num, uint32_t bank2_num,
|
||||
uint32_t bank3_num, uint32_t bank4_num, uint32_t bank5_num,
|
||||
uint32_t bank6_num, uint32_t bank7_num) {
|
||||
VALIDATE_VROM_BANK(bank0_num);
|
||||
VALIDATE_VROM_BANK(bank1_num);
|
||||
VALIDATE_VROM_BANK(bank2_num);
|
||||
@@ -202,112 +311,81 @@ void set_PPU_banks(uint32 bank0_num, uint32 bank1_num,
|
||||
ppu->PPU_VRAM_banks[6] = VROM_banks + (bank6_num << 10);
|
||||
ppu->PPU_VRAM_banks[7] = VROM_banks + (bank7_num << 10);
|
||||
|
||||
set_tile_banks( VROM_tiles + bank0_num * 0x400 ,
|
||||
VROM_tiles + bank1_num * 0x400 ,
|
||||
VROM_tiles + bank2_num * 0x400 ,
|
||||
VROM_tiles + bank3_num * 0x400 ,
|
||||
VROM_tiles + bank4_num * 0x400 ,
|
||||
VROM_tiles + bank5_num * 0x400 ,
|
||||
set_tile_banks(VROM_tiles + bank0_num * 0x400, VROM_tiles + bank1_num * 0x400,
|
||||
VROM_tiles + bank2_num * 0x400, VROM_tiles + bank3_num * 0x400,
|
||||
VROM_tiles + bank4_num * 0x400, VROM_tiles + bank5_num * 0x400,
|
||||
VROM_tiles + bank6_num * 0x400,
|
||||
VROM_tiles + bank7_num * 0x400);
|
||||
}
|
||||
void set_PPU_bank0(uint32 bank_num)
|
||||
{
|
||||
void set_PPU_bank0(uint32_t bank_num) {
|
||||
VALIDATE_VROM_BANK(bank_num);
|
||||
ppu->PPU_VRAM_banks[0] = VROM_banks + (bank_num << 10); // * 0x400
|
||||
set_tile_bank(0, VROM_tiles + bank_num * 0x400);
|
||||
}
|
||||
|
||||
void set_PPU_bank1(uint32 bank_num)
|
||||
{
|
||||
void set_PPU_bank1(uint32_t bank_num) {
|
||||
VALIDATE_VROM_BANK(bank_num);
|
||||
ppu->PPU_VRAM_banks[1] = VROM_banks + (bank_num << 10); // * 0x400
|
||||
set_tile_bank(1, VROM_tiles + bank_num * 0x400);
|
||||
}
|
||||
|
||||
void set_PPU_bank2(uint32 bank_num)
|
||||
{
|
||||
void set_PPU_bank2(uint32_t bank_num) {
|
||||
VALIDATE_VROM_BANK(bank_num);
|
||||
ppu->PPU_VRAM_banks[2] = VROM_banks + (bank_num << 10); // * 0x400
|
||||
set_tile_bank(2, VROM_tiles + bank_num * 0x400);
|
||||
}
|
||||
|
||||
void set_PPU_bank3(uint32 bank_num)
|
||||
{
|
||||
void set_PPU_bank3(uint32_t bank_num) {
|
||||
VALIDATE_VROM_BANK(bank_num);
|
||||
ppu->PPU_VRAM_banks[3] = VROM_banks + (bank_num << 10); // * 0x400
|
||||
set_tile_bank(3, VROM_tiles + bank_num * 0x400);
|
||||
}
|
||||
|
||||
void set_PPU_bank4(uint32 bank_num)
|
||||
{
|
||||
void set_PPU_bank4(uint32_t bank_num) {
|
||||
VALIDATE_VROM_BANK(bank_num);
|
||||
ppu->PPU_VRAM_banks[4] = VROM_banks + (bank_num << 10); // * 0x400
|
||||
set_tile_bank(4, VROM_tiles + bank_num * 0x400);
|
||||
}
|
||||
void set_PPU_bank5(uint32 bank_num)
|
||||
{
|
||||
void set_PPU_bank5(uint32_t bank_num) {
|
||||
VALIDATE_VROM_BANK(bank_num);
|
||||
ppu->PPU_VRAM_banks[5] = VROM_banks + (bank_num << 10); // * 0x400
|
||||
set_tile_bank(5, VROM_tiles + bank_num * 0x400);
|
||||
}
|
||||
|
||||
void set_PPU_bank6(uint32 bank_num)
|
||||
{
|
||||
void set_PPU_bank6(uint32_t bank_num) {
|
||||
VALIDATE_VROM_BANK(bank_num);
|
||||
ppu->PPU_VRAM_banks[6] = VROM_banks + (bank_num << 10); // * 0x400
|
||||
set_tile_bank(6, VROM_tiles + bank_num * 0x400);
|
||||
}
|
||||
|
||||
void set_PPU_bank7(uint32 bank_num)
|
||||
{
|
||||
void set_PPU_bank7(uint32_t bank_num) {
|
||||
VALIDATE_VROM_BANK(bank_num);
|
||||
ppu->PPU_VRAM_banks[7] = VROM_banks + (bank_num << 10); // * 0x400
|
||||
set_tile_bank(7, VROM_tiles + bank_num * 0x400);
|
||||
}
|
||||
// for mapper 19,68,90
|
||||
void set_PPU_bank8(uint32 bank_num)
|
||||
{
|
||||
void set_PPU_bank8(uint32_t bank_num) {
|
||||
VALIDATE_VROM_BANK(bank_num);
|
||||
ppu->PPU_VRAM_banks[8] = VROM_banks + (bank_num << 10);
|
||||
}
|
||||
void set_PPU_bank9(uint32 bank_num)
|
||||
{
|
||||
void set_PPU_bank9(uint32_t bank_num) {
|
||||
VALIDATE_VROM_BANK(bank_num);
|
||||
ppu->PPU_VRAM_banks[9] = VROM_banks + (bank_num << 10);
|
||||
}
|
||||
void set_PPU_bank10(uint32 bank_num)
|
||||
{
|
||||
void set_PPU_bank10(uint32_t bank_num) {
|
||||
VALIDATE_VROM_BANK(bank_num);
|
||||
ppu->PPU_VRAM_banks[10] = VROM_banks + (bank_num << 10);
|
||||
}
|
||||
void set_PPU_bank11(uint32 bank_num)
|
||||
{
|
||||
void set_PPU_bank11(uint32_t bank_num) {
|
||||
VALIDATE_VROM_BANK(bank_num);
|
||||
ppu->PPU_VRAM_banks[11] = VROM_banks + (bank_num << 10);
|
||||
}
|
||||
|
||||
// for mapper 1,4,5,6,13,19,80,85,96,119
|
||||
void set_VRAM_bank(uint8 bank, uint32 bank_num)
|
||||
{
|
||||
if(bank < 8)
|
||||
{
|
||||
void set_VRAM_bank(uint8_t bank, uint32_t bank_num) {
|
||||
if (bank < 8) {
|
||||
ppu->PPU_VRAM_banks[bank] = PPU_patterntables + ((bank_num & 0x0f) << 10);
|
||||
}
|
||||
else if(bank < 12)
|
||||
{
|
||||
} else if (bank < 12) {
|
||||
set_name_table(bank, bank_num);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
@@ -1,5 +1,3 @@
|
||||
#ifndef __NES_MAPPER_H
|
||||
#define __NES_MAPPER_H
|
||||
//////////////////////////////////////////////////////////////////////////////////
|
||||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֲ<EFBFBD><D6B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ye781205<30><35>NESģ<53><C4A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
// ALIENTEK STM32F407<30><37><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
@@ -9,83 +7,74 @@
|
||||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:2014/7/1
|
||||
// <20>汾<EFBFBD><E6B1BE>V1.0
|
||||
//////////////////////////////////////////////////////////////////////////////////
|
||||
#ifndef uint16
|
||||
#define uint16 u16
|
||||
#define uint8 u8
|
||||
#define uint32 u32
|
||||
#endif
|
||||
|
||||
#ifndef __NES_MAPPER_H
|
||||
#define __NES_MAPPER_H
|
||||
|
||||
#include "stdint.h"
|
||||
|
||||
#define num_8k_ROM_banks VROM_8K_SIZE
|
||||
#define num_1k_VROM_banks VROM_1K_SIZE
|
||||
//////////////////////////////////////////////////////////////////////////////////
|
||||
typedef struct
|
||||
{
|
||||
|
||||
typedef struct {
|
||||
void (*Reset)();
|
||||
void (*Write)( uint16 addr,uint8 data);
|
||||
void (*Read)( uint8 data,uint16 addr);
|
||||
uint8 (*ReadLow)( uint16 addr);
|
||||
void (*WriteLow)(uint16 addr,uint8 data);
|
||||
void (*Write)(uint16_t addr, uint8_t data);
|
||||
void (*Read)(uint8_t data, uint16_t addr);
|
||||
uint8_t (*ReadLow)(uint16_t addr);
|
||||
void (*WriteLow)(uint16_t addr, uint8_t data);
|
||||
void (*HSync)(int scanline);
|
||||
void (*VSync)(void);
|
||||
} MAPPER;
|
||||
///////////////////////////////////////////////////////////////
|
||||
typedef enum
|
||||
{
|
||||
MMC1_SMALL,
|
||||
MMC1_512K,
|
||||
MMC1_1024K
|
||||
}MMC1_Size_t;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint32 write_count;
|
||||
uint8 bits;
|
||||
uint8 regs[4];
|
||||
uint32 last_write_addr;
|
||||
typedef enum { MMC1_SMALL, MMC1_512K, MMC1_1024K } MMC1_Size_t;
|
||||
|
||||
typedef struct {
|
||||
uint32_t write_count;
|
||||
uint8_t bits;
|
||||
uint8_t regs[4];
|
||||
uint32_t last_write_addr;
|
||||
|
||||
MMC1_Size_t MMC1_Size;
|
||||
uint32 MMC1_256K_base;
|
||||
uint32 MMC1_swap;
|
||||
uint32_t MMC1_256K_base;
|
||||
uint32_t MMC1_swap;
|
||||
|
||||
// these are the 4 ROM banks currently selected
|
||||
uint32 MMC1_bank1;
|
||||
uint32 MMC1_bank2;
|
||||
uint32 MMC1_bank3;
|
||||
uint32 MMC1_bank4;
|
||||
uint32_t MMC1_bank1;
|
||||
uint32_t MMC1_bank2;
|
||||
uint32_t MMC1_bank3;
|
||||
uint32_t MMC1_bank4;
|
||||
|
||||
uint32 MMC1_HI1;
|
||||
uint32 MMC1_HI2;
|
||||
uint32_t MMC1_HI1;
|
||||
uint32_t MMC1_HI2;
|
||||
} Mapper1Res;
|
||||
|
||||
// ͨ<><CDA8>map<61><70><EFBFBD><EFBFBD><EFBFBD>ṹ<EFBFBD><E1B9B9>
|
||||
typedef struct
|
||||
{
|
||||
uint8 patch;
|
||||
uint8 regs[11];
|
||||
typedef struct {
|
||||
uint8_t patch;
|
||||
uint8_t regs[11];
|
||||
|
||||
uint32 prg0,prg1;
|
||||
uint32 chr01,chr23,chr4,chr5,chr6,chr7;
|
||||
uint32_t prg0, prg1;
|
||||
uint32_t chr01, chr23, chr4, chr5, chr6, chr7;
|
||||
|
||||
uint8 irq_enabled; // IRQs enabled
|
||||
uint32 irq_counter; // IRQ scanline counter, decreasing
|
||||
uint32 irq_latch; // IRQ scanline counter latch
|
||||
uint8_t irq_enabled; // IRQs enabled
|
||||
uint32_t irq_counter; // IRQ scanline counter, decreasing
|
||||
uint32_t irq_latch; // IRQ scanline counter latch
|
||||
} MapperCommRes;
|
||||
|
||||
extern uint32 ROM_mask;
|
||||
extern uint32 VROM_mask;
|
||||
extern uint32_t ROM_mask;
|
||||
extern uint32_t VROM_mask;
|
||||
extern const int MapTab[];
|
||||
extern MAPPER *NES_Mapper;
|
||||
extern uint32 VROM_mask;
|
||||
extern uint32_t VROM_mask;
|
||||
|
||||
extern Mapper1Res *MAP1;
|
||||
extern MapperCommRes *MAPx;
|
||||
|
||||
|
||||
//////////////////////////////////////////////////////////////////////////////////
|
||||
void Mapper_Init(void);
|
||||
void asm_Mapper_Write(uint8 byData,uint16 wAddr);
|
||||
void asm_Mapper_ReadLow( uint16 wAddr);
|
||||
void asm_Mapper_WriteLow( uint8 byData ,uint16 wAddr);
|
||||
void asm_Mapper_Write(uint8_t byData, uint16_t wAddr);
|
||||
void asm_Mapper_ReadLow(uint16_t wAddr);
|
||||
void asm_Mapper_WriteLow(uint8_t byData, uint16_t wAddr);
|
||||
|
||||
void map67_(signed char page); // 6502.s
|
||||
void map89_(signed char page);
|
||||
@@ -100,23 +89,21 @@ void set_CPU_bank6(signed char page );
|
||||
void set_CPU_bank7(signed char page);
|
||||
void set_CPU_banks(int bank0_num, int bank1_num, int bank2_num, int bank3_num);
|
||||
|
||||
void set_PPU_banks( uint32 bank0_num, uint32 bank1_num,
|
||||
uint32 bank2_num, uint32 bank3_num,
|
||||
uint32 bank4_num, uint32 bank5_num,
|
||||
uint32 bank6_num, uint32 bank7_num);
|
||||
void set_PPU_bank0(uint32 bank_num);
|
||||
void set_PPU_bank1(uint32 bank_num);
|
||||
void set_PPU_bank2(uint32 bank_num);
|
||||
void set_PPU_bank3(uint32 bank_num);
|
||||
void set_PPU_bank4(uint32 bank_num);
|
||||
void set_PPU_bank5(uint32 bank_num);
|
||||
void set_PPU_bank6(uint32 bank_num);
|
||||
void set_PPU_bank7(uint32 bank_num);
|
||||
void set_PPU_bank8(uint32 bank_num);
|
||||
void set_PPU_bank9(uint32 bank_num);
|
||||
void set_PPU_bank10(uint32 bank_num);
|
||||
void set_PPU_bank11(uint32 bank_num);
|
||||
void set_VRAM_bank(uint8 bank, uint32 bank_num);
|
||||
|
||||
void set_PPU_banks(uint32_t bank0_num, uint32_t bank1_num, uint32_t bank2_num,
|
||||
uint32_t bank3_num, uint32_t bank4_num, uint32_t bank5_num,
|
||||
uint32_t bank6_num, uint32_t bank7_num);
|
||||
void set_PPU_bank0(uint32_t bank_num);
|
||||
void set_PPU_bank1(uint32_t bank_num);
|
||||
void set_PPU_bank2(uint32_t bank_num);
|
||||
void set_PPU_bank3(uint32_t bank_num);
|
||||
void set_PPU_bank4(uint32_t bank_num);
|
||||
void set_PPU_bank5(uint32_t bank_num);
|
||||
void set_PPU_bank6(uint32_t bank_num);
|
||||
void set_PPU_bank7(uint32_t bank_num);
|
||||
void set_PPU_bank8(uint32_t bank_num);
|
||||
void set_PPU_bank9(uint32_t bank_num);
|
||||
void set_PPU_bank10(uint32_t bank_num);
|
||||
void set_PPU_bank11(uint32_t bank_num);
|
||||
void set_VRAM_bank(uint8_t bank, uint32_t bank_num);
|
||||
|
||||
#endif
|
||||
|
File diff suppressed because it is too large
Load Diff
@@ -1,6 +1,3 @@
|
||||
#ifndef __NES_PPU_H
|
||||
#define __NES_PPU_H
|
||||
#include "nes_main.h"
|
||||
//////////////////////////////////////////////////////////////////////////////////
|
||||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֲ<EFBFBD><D6B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ye781205<30><35>NESģ<53><C4A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
// ALIENTEK STM32F407<30><37><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
@@ -11,6 +8,10 @@
|
||||
// <20>汾<EFBFBD><E6B1BE>V1.0
|
||||
//////////////////////////////////////////////////////////////////////////////////
|
||||
|
||||
#ifndef __NES_PPU_H
|
||||
#define __NES_PPU_H
|
||||
|
||||
#include "nes_main.h"
|
||||
|
||||
#undef NULL
|
||||
#define NULL 0
|
||||
@@ -22,8 +23,7 @@
|
||||
#define FALSE 0
|
||||
#endif
|
||||
|
||||
static const unsigned int NES_Palette[64]=
|
||||
{
|
||||
static const unsigned int NES_Palette[64] = {
|
||||
0x73AE, 0x20D1, 0x0015, 0x4013, 0x880E, 0xA802, 0xA000, 0x7840,
|
||||
0x4160, 0x0220, 0x0280, 0x01E2, 0x19EB, 0x0000, 0x0000, 0x0000,
|
||||
0xBDF7, 0x039D, 0x21DD, 0x801E, 0xB817, 0xE00B, 0xD940, 0xCA61,
|
||||
@@ -31,8 +31,7 @@ static const unsigned int NES_Palette[64]=
|
||||
0xF79E, 0x3DFF, 0x5CBF, 0xA45F, 0xF3DF, 0xFBB6, 0xFBAC, 0xFCC7,
|
||||
0xF5E7, 0x8682, 0x4EE9, 0x5FD3, 0x075B, 0x0000, 0x0000, 0x0000,
|
||||
0xF79E, 0xAF3F, 0xC6BF, 0xD65F, 0xFE3F, 0xFE3B, 0xFDF6, 0xFED5,
|
||||
0xFF34,0xE7F4,0xAF97,0xB7F9,0x9FFE,0x0000,0x0000,0x0000
|
||||
};
|
||||
0xFF34, 0xE7F4, 0xAF97, 0xB7F9, 0x9FFE, 0x0000, 0x0000, 0x0000};
|
||||
|
||||
/*
|
||||
static unsigned int NES_Palette[64]=
|
||||
@@ -48,96 +47,82 @@ static unsigned int NES_Palette[64]=
|
||||
};
|
||||
*/
|
||||
|
||||
extern uint8_t
|
||||
*VROM_banks; // VROM<4F><4D>ʼ<EFBFBD><CABC>ַ ͼ<><CDBC><EFBFBD><EFBFBD>*************************************
|
||||
extern uint8_t *VROM_tiles;
|
||||
extern uint8_t *PPU_VRAM_banks[12];
|
||||
extern uint8_t *PPU_tile_banks[8];
|
||||
extern uint8_t *PPU_patterntables; // 8192//VROM<4F><4D>ʼ<EFBFBD><CABC>ַ
|
||||
// ͼ<><CDBC><EFBFBD><EFBFBD>*************************************
|
||||
extern uint8_t *spr_ram; // sprite ram
|
||||
|
||||
|
||||
extern u8* VROM_banks; //VROM<4F><4D>ʼ<EFBFBD><CABC>ַ ͼ<><CDBC><EFBFBD><EFBFBD>*************************************
|
||||
extern u8* VROM_tiles;
|
||||
extern uint8* PPU_VRAM_banks[12];
|
||||
extern uint8* PPU_tile_banks[8];
|
||||
extern uint8* PPU_patterntables; //8192//VROM<4F><4D>ʼ<EFBFBD><CABC>ַ ͼ<><CDBC><EFBFBD><EFBFBD>*************************************
|
||||
extern uint8* spr_ram; //sprite ram
|
||||
|
||||
enum
|
||||
{
|
||||
enum {
|
||||
NES_SCREEN_WIDTH = 256,
|
||||
NES_SCREEN_HEIGHT = 240,
|
||||
SIDE_MARGIN = 8,
|
||||
NES_SCREEN_WIDTH_VIEWABLE = NES_SCREEN_WIDTH,
|
||||
NES_BACKBUF_WIDTH = NES_SCREEN_WIDTH + (2 * SIDE_MARGIN)
|
||||
};
|
||||
enum
|
||||
{
|
||||
BG_WRITTEN_FLAG = 0x01,
|
||||
SPR_WRITTEN_FLAG = 0x02
|
||||
};
|
||||
enum { BG_WRITTEN_FLAG = 0x01, SPR_WRITTEN_FLAG = 0x02 };
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint32 in_vblank;
|
||||
uint32 current_frame_line;
|
||||
uint16 bg_pattern_table_addr;
|
||||
uint16 spr_pattern_table_addr;
|
||||
uint16 ppu_addr_inc;
|
||||
uint16 loopy_v; // vram address -- used for reading/writing through $2007
|
||||
typedef struct {
|
||||
uint32_t in_vblank;
|
||||
uint32_t current_frame_line;
|
||||
uint16_t bg_pattern_table_addr;
|
||||
uint16_t spr_pattern_table_addr;
|
||||
uint16_t ppu_addr_inc;
|
||||
uint16_t loopy_v; // vram address -- used for reading/writing through $2007
|
||||
// see loopy-2005.txt
|
||||
uint16 loopy_t; // temp vram address
|
||||
uint8 loopy_x; // 3-bit subtile x-offset
|
||||
uint8 toggle_2005_2006;
|
||||
uint8 spr_ram_rw_ptr; // sprite ram read/write pointer<65>ڴ<EFBFBD><DAB4><EFBFBD>/дָ<D0B4><D6B8>
|
||||
uint8 read_2007_buffer;
|
||||
uint8 LowRegs[0x08];
|
||||
uint8 bg_pal[0x10]; //extern BYTE BGPal[0x20]; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɫ<EFBFBD><C9AB>
|
||||
uint8 spr_pal[0x10]; //extern BYTE SPPal[0x20]; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɫ<EFBFBD><C9AB>
|
||||
uint16_t loopy_t; // temp vram address
|
||||
uint8_t loopy_x; // 3-bit subtile x-offset
|
||||
uint8_t toggle_2005_2006;
|
||||
uint8_t spr_ram_rw_ptr; // sprite ram read/write pointer<65>ڴ<EFBFBD><DAB4><EFBFBD>/дָ<D0B4><D6B8>
|
||||
uint8_t read_2007_buffer;
|
||||
uint8_t LowRegs[0x08];
|
||||
uint8_t bg_pal[0x10]; // extern BYTE BGPal[0x20];
|
||||
// //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɫ<EFBFBD><C9AB>
|
||||
uint8_t spr_pal[0x10]; // extern BYTE SPPal[0x20];
|
||||
// //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɫ<EFBFBD><C9AB>
|
||||
|
||||
uint8 PPU_nametables[4*0x400]; //4096 PPU<50><55><EFBFBD><EFBFBD><EFBFBD>ĵ<EFBFBD>RAM
|
||||
uint8_t PPU_nametables[4 * 0x400]; // 4096 PPU<50><55><EFBFBD><EFBFBD><EFBFBD>ĵ<EFBFBD>RAM
|
||||
// Rick
|
||||
uint8* PPU_VRAM_banks[12];
|
||||
uint8* PPU_tile_banks[8];
|
||||
uint8* PPU_tile_tables;
|
||||
uint8 solid_buf[NES_BACKBUF_WIDTH]; // <20><>ǰ<EFBFBD><C7B0><EFBFBD>ص<EFBFBD>λ<EFBFBD><CEBB>־<EFBFBD><D6BE>
|
||||
uint8 dummy_buffer[NES_BACKBUF_WIDTH]; // used to do sprite 0 hit detection when we aren't supposed to draw
|
||||
|
||||
uint8_t *PPU_VRAM_banks[12];
|
||||
uint8_t *PPU_tile_banks[8];
|
||||
uint8_t *PPU_tile_tables;
|
||||
uint8_t solid_buf[NES_BACKBUF_WIDTH]; // <20><>ǰ<EFBFBD><C7B0><EFBFBD>ص<EFBFBD>λ<EFBFBD><CEBB>־<EFBFBD><D6BE>
|
||||
uint8_t dummy_buffer[NES_BACKBUF_WIDTH]; // used to do sprite 0 hit detection
|
||||
// when we aren't supposed to draw
|
||||
|
||||
} ppu_data;
|
||||
|
||||
|
||||
extern ppu_data *ppu;
|
||||
extern u8 *spr_ram;
|
||||
extern uint8_t *spr_ram;
|
||||
|
||||
|
||||
|
||||
uint32 spr_enabled(void);
|
||||
uint32 bg_enabled(void);
|
||||
void set_name_table(uint8 bank, int bank_num);
|
||||
void set_tile_bank(int i, uint8 *bank);
|
||||
void compile(int count, uint8 *src, uint8 *dest);
|
||||
void set_tile_banks(uint8 *bank0, uint8 *bank1, uint8 *bank2, uint8 *bank3,
|
||||
uint8 *bank4, uint8 *bank5, uint8 *bank6, uint8 *bank7);
|
||||
uint32_t spr_enabled(void);
|
||||
uint32_t bg_enabled(void);
|
||||
void set_name_table(uint8_t bank, int bank_num);
|
||||
void set_tile_bank(int i, uint8_t *bank);
|
||||
void compile(int count, uint8_t *src, uint8_t *dest);
|
||||
void set_tile_banks(uint8_t *bank0, uint8_t *bank1, uint8_t *bank2, uint8_t *bank3,
|
||||
uint8_t *bank4, uint8_t *bank5, uint8_t *bank6, uint8_t *bank7);
|
||||
void PPU_reset(void *lcd_addr);
|
||||
void PPU_start_frame(void);
|
||||
void set_mirroring(uint32 nt0, uint32 nt1, uint32 nt2, uint32 nt3);//<2F><><EFBFBD>ô<EFBFBD>ֱˮƽ<CBAE><C6BD><EFBFBD><EFBFBD>
|
||||
uint8 ReadLowRegs(uint32 addr);
|
||||
void WriteLowRegs(uint32 addr, uint8 data);
|
||||
void set_mirroring(uint32_t nt0, uint32_t nt1, uint32_t nt2,
|
||||
uint32_t nt3); // <20><><EFBFBD>ô<EFBFBD>ֱˮƽ<CBAE><C6BD><EFBFBD><EFBFBD>
|
||||
uint8_t ReadLowRegs(uint32_t addr);
|
||||
void WriteLowRegs(uint32_t addr, uint8_t data);
|
||||
void scanline_draw(int LineNo);
|
||||
void do_scanline_and_draw(uint8* buf);
|
||||
void do_scanline_and_draw(uint8_t *buf);
|
||||
|
||||
// Rick
|
||||
void start_frame(uint8 *buf, int ypitch);
|
||||
void end_frame(uint8 *buf);
|
||||
void start_frame(uint8_t *buf, int ypitch);
|
||||
void end_frame(uint8_t *buf);
|
||||
void do_scanline_and_dont_draw(int LineNo);
|
||||
uint32 NMI_enabled(void);
|
||||
uint32_t NMI_enabled(void);
|
||||
void start_vblank(void);
|
||||
void end_vblank(void);
|
||||
void render_bg(uint8* buf);
|
||||
void render_spr(uint8* buf);
|
||||
void update_tile(int byteOffset, uint8 data);
|
||||
void render_bg(uint8_t *buf);
|
||||
void render_spr(uint8_t *buf);
|
||||
void update_tile(int byteOffset, uint8_t data);
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
@@ -22,7 +22,7 @@ CFLAG=[
|
||||
'-mthumb',
|
||||
'-mfpu=fpv4-sp-d16',
|
||||
'-mfloat-abi=hard',
|
||||
'-Og',
|
||||
'-O3',
|
||||
'-Wall',
|
||||
'-fdata-sections',
|
||||
'-ffunction-sections',
|
||||
@@ -70,7 +70,8 @@ INC=[
|
||||
'-ISrc/rt-thread',
|
||||
'-ISrc/rt-thread/include',
|
||||
# '-ISrc/sqlite3',
|
||||
'-ISrc/zlib'
|
||||
'-ISrc/zlib',
|
||||
'-ISrc/NES'
|
||||
]
|
||||
|
||||
SRC_DIR=[
|
||||
@@ -128,6 +129,13 @@ SRC=[
|
||||
'Src/MP3/helix/arm/asmmisc_gcc.s',
|
||||
'Src/MP3/helix/arm/asmpoly_thumb2_gcc.s',
|
||||
'Src/MY/syscalls.c',
|
||||
|
||||
'Src/NES/6502_gcc.S',
|
||||
'Src/NES/6502cart_gcc.S',
|
||||
'Src/NES/nes_apu.c',
|
||||
'Src/NES/nes_main.c',
|
||||
'Src/NES/nes_ppu.c',
|
||||
'Src/NES/nes_mapper.c',
|
||||
]
|
||||
|
||||
LD_FILE="stm32f429ighx_flash.ld"
|
||||
@@ -303,7 +311,7 @@ def build_target(src:list):
|
||||
if(check_rebuild(dst,obj_list)):
|
||||
rsp=f"{' '.join(obj_list)} -o {dst} {flags} \
|
||||
-T{LD_FILE} -lc -lm -lnosys -Wl,-Map={OUTPUT}/{TARGET}.map,--cref -Wl,--gc-sections \
|
||||
-Wl,--no-warn-rwx-segments -Wl,-print-memory-usage"
|
||||
-Wl,-print-memory-usage"
|
||||
print(f"链接 {dst}")
|
||||
with open(f"{OUTPUT}/{TARGET}.rsp",'w+') as f:
|
||||
f.write(rsp.replace('\\','/'))
|
||||
@@ -339,7 +347,7 @@ def main():
|
||||
if build_target(SRC):
|
||||
os.system(f"{OBJCPY} -O binary -S {OUTPUT}/{TARGET}.elf {OUTPUT}/{TARGET}.bin")
|
||||
os.system(f"{OBJCPY} -O ihex {OUTPUT}/{TARGET}.elf {OUTPUT}/{TARGET}.hex")
|
||||
os.system(f"{OBJDUMP} -d {OUTPUT}/{TARGET}.elf > {OUTPUT}/{TARGET}.lst")
|
||||
os.system(f"{OBJDUMP} -D {OUTPUT}/{TARGET}.elf > {OUTPUT}/{TARGET}.lst")
|
||||
|
||||
|
||||
|
||||
|
@@ -1,26 +0,0 @@
|
||||
del *.bak /s
|
||||
del *.ddk /s
|
||||
del *.edk /s
|
||||
del *.lst /s
|
||||
del *.lnp /s
|
||||
del *.mpf /s
|
||||
del *.mpj /s
|
||||
del *.obj /s
|
||||
del *.omf /s
|
||||
::del *.opt /s ::不允许删除JLINK的设置
|
||||
del *.plg /s
|
||||
del *.rpt /s
|
||||
del *.tmp /s
|
||||
del *.__i /s
|
||||
del *.crf /s
|
||||
del *.o /s
|
||||
del *.d /s
|
||||
del *.axf /s
|
||||
del *.tra /s
|
||||
del *.dep /s
|
||||
del JLinkLog.txt /s
|
||||
|
||||
del *.iex /s
|
||||
del *.htm /s
|
||||
del *.map /s
|
||||
exit
|
Reference in New Issue
Block a user