49 lines
		
	
	
		
			1.5 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			49 lines
		
	
	
		
			1.5 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * File      : mips_cfg.h
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|  * This file is part of RT-Thread RTOS
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|  * COPYRIGHT (C) 2008 - 2012, RT-Thread Development Team
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|  *
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|  *  This program is free software; you can redistribute it and/or modify
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|  *  it under the terms of the GNU General Public License as published by
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|  *  the Free Software Foundation; either version 2 of the License, or
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|  *  (at your option) any later version.
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|  *
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|  *  This program is distributed in the hope that it will be useful,
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|  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
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|  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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|  *  GNU General Public License for more details.
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|  *
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|  *  You should have received a copy of the GNU General Public License along
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|  *  with this program; if not, write to the Free Software Foundation, Inc.,
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|  *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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|  *
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|  * Change Logs:
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|  * Date           Author       Notes
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|  * 2016年9月10日     Urey         the first version
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|  */
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| 
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| #ifndef _MIPS_CFG_H_
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| #define _MIPS_CFG_H_
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| 
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| #ifndef __ASSEMBLY__
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| #include <stdint.h>
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| typedef struct mips32_core_cfg
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| {
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|     uint16_t icache_line_size;
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| //    uint16_t icache_lines_per_way;
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| //    uint16_t icache_ways;
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|     uint16_t icache_size;
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|     uint16_t dcache_line_size;
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| //    uint16_t dcache_lines_per_way;
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| //    uint16_t dcache_ways;
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|     uint16_t dcache_size;
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| 
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|     uint16_t max_tlb_entries;	/* number of tlb entry */
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| } mips32_core_cfg_t;
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| 
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| extern mips32_core_cfg_t g_mips_core;
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| 
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| #endif /* __ASSEMBLY__ */
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| 
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| #endif /* _MIPS_CFG_H_ */
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