275 lines
5.1 KiB
C++
275 lines
5.1 KiB
C++
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/////////////////////////////////////////////////////////////////////
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// Mapper 119
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void NES_mapper119::Reset()
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{
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// clear registers FIRST!!!
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for(int i = 0; i < 8; i++) regs[i] = 0x00;
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// set CPU bank pointers
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prg0 = 0;
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prg1 = 1;
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MMC3_set_CPU_banks();
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// set VROM banks
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chr01 = 0;
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chr23 = 2;
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chr4 = 4;
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chr5 = 5;
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chr6 = 6;
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chr7 = 7;
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MMC3_set_PPU_banks();
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irq_enabled = 0;
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irq_counter = 0;
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irq_latch = 0;
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parent_NES->ppu->vram_write_protect = 0;
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}
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void NES_mapper119::MemoryWrite(uint32 addr, uint8 data)
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{
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switch(addr & 0xE001)
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{
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case 0x8000:
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{
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regs[0] = data;
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MMC3_set_PPU_banks();
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MMC3_set_CPU_banks();
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}
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break;
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case 0x8001:
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{
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uint32 bank_num;
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regs[1] = data;
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bank_num = regs[1];
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switch(regs[0] & 0x07)
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{
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case 0x00:
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{
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if(num_1k_VROM_banks)
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{
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bank_num &= 0xfe;
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chr01 = bank_num;
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MMC3_set_PPU_banks();
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}
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}
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break;
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case 0x01:
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{
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if(num_1k_VROM_banks)
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{
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bank_num &= 0xfe;
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chr23 = bank_num;
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MMC3_set_PPU_banks();
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}
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}
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break;
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case 0x02:
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{
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if(num_1k_VROM_banks)
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{
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chr4 = bank_num;
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MMC3_set_PPU_banks();
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}
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}
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break;
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case 0x03:
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{
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if(num_1k_VROM_banks)
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{
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chr5 = bank_num;
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MMC3_set_PPU_banks();
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}
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}
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break;
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case 0x04:
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{
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if(num_1k_VROM_banks)
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{
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chr6 = bank_num;
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MMC3_set_PPU_banks();
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}
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}
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break;
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case 0x05:
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{
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if(num_1k_VROM_banks)
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{
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chr7 = bank_num;
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MMC3_set_PPU_banks();
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}
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}
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break;
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case 0x06:
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{
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prg0 = bank_num;
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MMC3_set_CPU_banks();
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}
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break;
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case 0x07:
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{
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prg1 = bank_num;
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MMC3_set_CPU_banks();
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}
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break;
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}
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}
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break;
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case 0xA000:
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{
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regs[2] = data;
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if(parent_NES->ROM->get_mirroring() != NES_PPU::MIRROR_FOUR_SCREEN)
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{
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if(data & 0x01)
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{
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set_mirroring(NES_PPU::MIRROR_HORIZ);
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}
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else
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{
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set_mirroring(NES_PPU::MIRROR_VERT);
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}
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}
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}
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break;
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case 0xA001:
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{
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regs[3] = data;
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}
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break;
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case 0xC000:
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regs[4] = data;
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irq_counter = regs[4];
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break;
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case 0xC001:
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regs[5] = data;
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irq_latch = regs[5];
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break;
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case 0xE000:
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regs[6] = data;
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irq_enabled = 0;
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break;
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case 0xE001:
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regs[7] = data;
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irq_enabled = 1;
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break;
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}
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}
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void NES_mapper119::HSync(uint32 scanline)
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{
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if(irq_enabled)
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{
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if((scanline >= 0) && (scanline <= 239))
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{
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if(parent_NES->ppu->spr_enabled() || parent_NES->ppu->bg_enabled())
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{
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if(!(irq_counter--))
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{
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irq_counter = irq_latch;
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parent_NES->cpu->DoIRQ();
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}
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}
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}
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}
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}
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void NES_mapper119::MMC3_set_CPU_banks()
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{
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if(prg_swap())
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{
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set_CPU_banks(num_8k_ROM_banks-2,prg1,prg0,num_8k_ROM_banks-1);
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}
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else
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{
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set_CPU_banks(prg0,prg1,num_8k_ROM_banks-2,num_8k_ROM_banks-1);
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}
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}
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void NES_mapper119::MMC3_set_PPU_banks()
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{
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uint8 chr_bank[8];
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if(chr_swap())
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{
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chr_bank[0] = chr4;
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chr_bank[1] = chr5;
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chr_bank[2] = chr6;
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chr_bank[3] = chr7;
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chr_bank[4] = chr01+0;
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chr_bank[5] = chr01+1;
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chr_bank[6] = chr23+0;
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chr_bank[7] = chr23+1;
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}
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else
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{
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chr_bank[0] = chr01+0;
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chr_bank[1] = chr01+1;
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chr_bank[2] = chr23+0;
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chr_bank[3] = chr23+1;
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chr_bank[4] = chr4;
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chr_bank[5] = chr5;
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chr_bank[6] = chr6;
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chr_bank[7] = chr7;
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}
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if(chr_bank[0] & 0x40)
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set_VRAM_bank(0, chr_bank[0] & 0x07);
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else
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set_PPU_bank0(chr_bank[0]);
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if(chr_bank[1] & 0x40)
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set_VRAM_bank(1, chr_bank[1] & 0x07);
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else
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set_PPU_bank1(chr_bank[1]);
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if(chr_bank[2] & 0x40)
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set_VRAM_bank(2, chr_bank[2] & 0x07);
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else
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set_PPU_bank2(chr_bank[2]);
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if(chr_bank[3] & 0x40)
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set_VRAM_bank(3, chr_bank[3] & 0x07);
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else
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set_PPU_bank3(chr_bank[3]);
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if(chr_bank[4] & 0x40)
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set_VRAM_bank(4, chr_bank[4] & 0x07);
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else
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set_PPU_bank4(chr_bank[4]);
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if(chr_bank[5] & 0x40)
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set_VRAM_bank(5, chr_bank[5] & 0x07);
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else
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set_PPU_bank5(chr_bank[5]);
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if(chr_bank[6] & 0x40)
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set_VRAM_bank(6, chr_bank[6] & 0x07);
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else
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set_PPU_bank6(chr_bank[6]);
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if(chr_bank[7] & 0x40)
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set_VRAM_bank(7, chr_bank[7] & 0x07);
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else
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set_PPU_bank7(chr_bank[7]);
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}
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/////////////////////////////////////////////////////////////////////
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