242 lines
4.9 KiB
ArmAsm
242 lines
4.9 KiB
ArmAsm
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; Copyright (c) 2006-2018, RT-Thread Development Team
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;
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; SPDX-License-Identifier: Apache-2.0
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;
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; Change Logs:
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; Date Author Notes
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; 2018-09-01 xuzhuoyi the first version.
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;
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.ref _rt_interrupt_to_thread
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.ref _rt_interrupt_from_thread
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.ref _rt_thread_switch_interrupt_flag
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.def _RTOSINT_Handler
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.def _rt_hw_get_st0
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.def _rt_hw_get_st1
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.def _rt_hw_context_switch_interrupt
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.def _rt_hw_context_switch
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.def _rt_hw_context_switch_to
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.def _rt_hw_interrupt_thread_switch
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.def _rt_hw_interrupt_disable
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.def _rt_hw_interrupt_enable
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RT_CTX_SAVE .macro
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PUSH AR1H:AR0H
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PUSH XAR2
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PUSH XAR3
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PUSH XAR4
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PUSH XAR5
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PUSH XAR6
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PUSH XAR7
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PUSH XT
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PUSH RPC
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.endm
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RT_CTX_RESTORE .macro
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POP RPC
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POP XT
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POP XAR7
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POP XAR6
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POP XAR5
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POP XAR4
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POP XAR3
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POP XAR2
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MOVZ AR0 , @SP
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SUBB XAR0, #6
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MOVL ACC , *XAR0
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AND ACC, #0xFFFF << 16
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MOV AL, IER
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MOVL *XAR0, ACC
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POP AR1H:AR0H
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.endm
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.text
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.newblock
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;
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; rt_base_t rt_hw_interrupt_disable();
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;
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.asmfunc
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_rt_hw_interrupt_disable:
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DINT
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LRETR
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.endasmfunc
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;
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; void rt_hw_interrupt_enable(rt_base_t level);
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;
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.asmfunc
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_rt_hw_interrupt_enable:
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EINT
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LRETR
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.endasmfunc
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;
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; void rt_hw_context_switch(rt_uint32 from, rt_uint32 to);
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; r0 --> from
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; r4 --> to
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.asmfunc
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_rt_hw_context_switch_interrupt:
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_rt_hw_context_switch:
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MOVL XAR0, #0
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MOV AR0, AL
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MOVL XAR4, *-SP[4]
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; set rt_thread_switch_interrupt_flag to 1
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MOVL XAR5, #_rt_thread_switch_interrupt_flag
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MOVL XAR6, *XAR5
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MOVL ACC, XAR6
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CMPB AL, #1
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B _reswitch, EQ
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MOVL XAR6, #1
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MOVL *XAR5, XAR6
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MOVL XAR5, #_rt_interrupt_from_thread ; set rt_interrupt_from_thread
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MOVL *XAR5, XAR0
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_reswitch:
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MOVL XAR5, #_rt_interrupt_to_thread ; set rt_interrupt_to_thread
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MOVL *XAR5, XAR4
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TRAP #16
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LRETR
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.endasmfunc
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.asmfunc
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_RTOSINT_Handler:
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; disable interrupt to protect context switch
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DINT
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; get rt_thread_switch_interrupt_flag
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MOV AR0, #_rt_thread_switch_interrupt_flag
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MOV AL, *AR0
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MOV AR1, AL
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CMP AR1, #0
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B rtosint_exit, EQ ; pendsv already handled
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; clear rt_thread_switch_interrupt_flag to 0
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MOV AR1, #0x00
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MOV *AR0, AR1
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MOV AR0, #_rt_interrupt_from_thread
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MOV AL, *AR0
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MOV AR1, AL
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CMP AR1, #0
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B switch_to_thread, EQ ; skip register save at the first time
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;MOVZ AR1, @SP ; get from thread stack pointer
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;#if defined (__VFP_FP__) && !defined(__SOFTFP__)
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; TST lr, #0x10 ; if(!EXC_RETURN[4])
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; VSTMDBEQ r1!, {d8 - d15} ; push FPU register s16~s31
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;#endif
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RT_CTX_SAVE ; push r4 - r11 register
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;#if defined (__VFP_FP__) && !defined(__SOFTFP__)
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; MOV r4, #0x00 ; flag = 0
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; TST lr, #0x10 ; if(!EXC_RETURN[4])
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; MOVEQ r4, #0x01 ; flag = 1
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; STMFD r1!, {r4} ; push flag
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;#endif
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MOV AL, *AR0
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MOV AR1, AL
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MOVZ AR1, @SP ; get from thread stack pointer
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MOV *AR0, AR1 ; update from thread stack pointer
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switch_to_thread:
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MOV AR1, #_rt_interrupt_to_thread
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MOV AL, *AR1
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MOV AR1, AL
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MOV AL, *AR1
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MOV AR1, AL ; load thread stack pointer
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;#if defined (__VFP_FP__) && !defined(__SOFTFP__)
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; LDMFD r1!, {r3} ; pop flag
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;#endif
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MOV @SP, AR1
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INC SP
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RT_CTX_RESTORE ; pop r4 - r11 register
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rtosint_exit:
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; restore interrupt
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EINT
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IRET
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.endasmfunc
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.asmfunc
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_rt_hw_get_st0:
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PUSH ST0
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POP AL
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LRETR
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.endasmfunc
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.asmfunc
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_rt_hw_get_st1:
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PUSH ST1
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POP AL
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LRETR
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.endasmfunc
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;
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; * void rt_hw_context_switch_to(rt_uint32 to);
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; * r0 --> to
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.asmfunc
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_rt_hw_context_switch_to:
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MOV AR1, #_rt_interrupt_to_thread
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MOV *AR1, AL
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;#if defined (__VFP_FP__) && !defined(__SOFTFP__)
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; CLEAR CONTROL.FPCA
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; MRS r2, CONTROL ; read
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; BIC r2, #0x04 ; modify
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; MSR CONTROL, r2 ; write-back
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;#endif
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; set from thread to 0
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MOV AR1, #_rt_interrupt_from_thread
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MOV AR0, #0x0
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MOV *AR1, AR0
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; set interrupt flag to 1
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MOV AR1, #_rt_thread_switch_interrupt_flag
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MOV AR0, #1
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MOV *AR1, AR0
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TRAP #16
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; never reach here!
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.endasmfunc
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; compatible with old version
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.asmfunc
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_rt_hw_interrupt_thread_switch:
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LRETR
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NOP
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.endasmfunc
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.end
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