2020-01-14 23:30:39 -05:00
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/*
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* The MIT License (MIT)
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*
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* Copyright (c) 2019 Ha Thach (tinyusb.org)
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*
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* This file is part of the TinyUSB stack.
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*/
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#include "tusb_option.h"
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2022-02-23 21:49:11 +07:00
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#if CFG_TUH_ENABLED || CFG_TUD_ENABLED
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2020-01-14 23:30:39 -05:00
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#include "tusb.h"
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2022-03-09 17:17:27 +07:00
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#include "common/tusb_private.h"
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2020-01-14 23:30:39 -05:00
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2022-02-23 21:46:40 +07:00
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#if CFG_TUD_ENABLED
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2020-01-14 23:30:39 -05:00
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#include "device/usbd_pvt.h"
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#endif
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2022-12-22 00:34:35 +07:00
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#if CFG_TUH_ENABLED
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2023-08-15 22:51:21 +07:00
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#include "host/usbh_pvt.h"
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2022-12-22 00:34:35 +07:00
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#endif
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2024-11-14 10:25:52 +07:00
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tusb_role_t _tusb_rhport_role[TUP_USBIP_CONTROLLER_NUM] = { TUSB_ROLE_INVALID };
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2024-11-04 17:20:58 +07:00
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//--------------------------------------------------------------------
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// Weak/Default API, can be overwritten by Application
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//--------------------------------------------------------------------
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TU_ATTR_WEAK void tusb_time_delay_ms_api(uint32_t ms) {
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#if CFG_TUSB_OS != OPT_OS_NONE
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osal_task_delay(ms);
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#else
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// delay using millis() (if implemented) and/or frame number if possible
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const uint32_t time_ms = tusb_time_millis_api();
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while ((tusb_time_millis_api() - time_ms) < ms) {}
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#endif
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}
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2024-10-10 16:22:12 +07:00
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2022-12-22 00:34:35 +07:00
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//--------------------------------------------------------------------+
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// Public API
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//--------------------------------------------------------------------+
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2024-10-14 18:27:52 +07:00
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bool tusb_rhport_init(uint8_t rhport, const tusb_rhport_init_t* rh_init) {
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2024-10-10 16:22:12 +07:00
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// backward compatible called with tusb_init(void)
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#if defined(TUD_OPT_RHPORT) || defined(TUH_OPT_RHPORT)
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2024-10-11 12:58:18 +07:00
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if (rh_init == NULL) {
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2024-10-10 16:22:12 +07:00
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#if CFG_TUD_ENABLED && defined(TUD_OPT_RHPORT)
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// init device stack CFG_TUSB_RHPORTx_MODE must be defined
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2024-10-11 12:58:18 +07:00
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const tusb_rhport_init_t dev_init = {
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.role = TUSB_ROLE_DEVICE,
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.speed = TUD_OPT_HIGH_SPEED ? TUSB_SPEED_HIGH : TUSB_SPEED_FULL
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};
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2024-10-25 14:38:09 +02:00
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TU_ASSERT ( tud_rhport_init(TUD_OPT_RHPORT, &dev_init) );
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2024-11-10 12:55:13 +07:00
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_tusb_rhport_role[TUD_OPT_RHPORT] = TUSB_ROLE_DEVICE;
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2024-10-10 16:22:12 +07:00
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#endif
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#if CFG_TUH_ENABLED && defined(TUH_OPT_RHPORT)
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// init host stack CFG_TUSB_RHPORTx_MODE must be defined
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2024-10-11 12:58:18 +07:00
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const tusb_rhport_init_t host_init = {
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.role = TUSB_ROLE_HOST,
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.speed = TUH_OPT_HIGH_SPEED ? TUSB_SPEED_HIGH : TUSB_SPEED_FULL
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};
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2024-10-14 18:27:52 +07:00
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TU_ASSERT( tuh_rhport_init(TUH_OPT_RHPORT, &host_init) );
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2024-11-04 17:20:58 +07:00
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_tusb_rhport_role[TUH_OPT_RHPORT] = TUSB_ROLE_HOST;
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2024-10-10 16:22:12 +07:00
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#endif
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return true;
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}
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#endif
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// new API with explicit rhport and role
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2024-10-14 18:27:52 +07:00
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TU_ASSERT(rhport < TUP_USBIP_CONTROLLER_NUM && rh_init->role != TUSB_ROLE_INVALID);
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2024-11-04 17:20:58 +07:00
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_tusb_rhport_role[rhport] = rh_init->role;
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2024-10-10 16:22:12 +07:00
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#if CFG_TUD_ENABLED
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2024-10-11 12:58:18 +07:00
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if (rh_init->role == TUSB_ROLE_DEVICE) {
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2024-10-14 18:27:52 +07:00
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TU_ASSERT(tud_rhport_init(rhport, rh_init));
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2024-10-10 16:22:12 +07:00
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}
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2024-03-22 12:30:14 +07:00
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#endif
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2020-01-14 23:30:39 -05:00
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2024-10-10 16:22:12 +07:00
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#if CFG_TUH_ENABLED
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2024-10-11 12:58:18 +07:00
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if (rh_init->role == TUSB_ROLE_HOST) {
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2024-10-14 18:27:52 +07:00
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TU_ASSERT(tuh_rhport_init(rhport, rh_init));
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2024-10-10 16:22:12 +07:00
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}
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2024-03-22 12:30:14 +07:00
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#endif
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2020-01-14 23:30:39 -05:00
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2020-11-23 13:12:51 +07:00
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return true;
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2020-01-14 23:30:39 -05:00
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}
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2024-03-22 12:30:14 +07:00
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bool tusb_inited(void) {
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2021-05-11 17:32:52 +07:00
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bool ret = false;
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2024-03-22 12:30:14 +07:00
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#if CFG_TUD_ENABLED
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2021-05-11 17:32:52 +07:00
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ret = ret || tud_inited();
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2024-03-22 12:30:14 +07:00
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#endif
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2021-05-11 17:32:52 +07:00
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2024-03-22 12:30:14 +07:00
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#if CFG_TUH_ENABLED
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2021-05-11 17:32:52 +07:00
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ret = ret || tuh_inited();
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2024-03-22 12:30:14 +07:00
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#endif
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2021-05-11 17:32:52 +07:00
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return ret;
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2020-01-14 23:30:39 -05:00
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}
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2024-10-10 16:22:12 +07:00
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void tusb_int_handler(uint8_t rhport, bool in_isr) {
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TU_VERIFY(rhport < TUP_USBIP_CONTROLLER_NUM,);
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#if CFG_TUD_ENABLED
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2024-11-04 17:20:58 +07:00
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if (_tusb_rhport_role[rhport] == TUSB_ROLE_DEVICE) {
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2024-10-10 16:22:12 +07:00
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(void) in_isr;
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2024-10-11 12:58:18 +07:00
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dcd_int_handler(rhport);
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2024-10-10 16:22:12 +07:00
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}
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#endif
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#if CFG_TUH_ENABLED
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2024-11-04 17:20:58 +07:00
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if (_tusb_rhport_role[rhport] == TUSB_ROLE_HOST) {
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2024-10-11 12:58:18 +07:00
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hcd_int_handler(rhport, in_isr);
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2024-10-10 16:22:12 +07:00
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}
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#endif
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}
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2023-01-20 15:30:24 +07:00
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//--------------------------------------------------------------------+
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// Descriptor helper
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//--------------------------------------------------------------------+
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2024-03-22 12:30:14 +07:00
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uint8_t const* tu_desc_find(uint8_t const* desc, uint8_t const* end, uint8_t byte1) {
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while (desc + 1 < end) {
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2025-02-23 22:21:55 +07:00
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if (desc[1] == byte1) {
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return desc;
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}
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2023-01-20 15:30:24 +07:00
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desc += desc[DESC_OFFSET_LEN];
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}
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return NULL;
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}
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2024-03-22 12:30:14 +07:00
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uint8_t const* tu_desc_find2(uint8_t const* desc, uint8_t const* end, uint8_t byte1, uint8_t byte2) {
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while (desc + 2 < end) {
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2025-02-23 22:21:55 +07:00
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if (desc[1] == byte1 && desc[2] == byte2) {
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return desc;
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}
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2023-01-20 15:30:24 +07:00
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desc += desc[DESC_OFFSET_LEN];
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}
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return NULL;
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}
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2024-03-22 12:30:14 +07:00
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uint8_t const* tu_desc_find3(uint8_t const* desc, uint8_t const* end, uint8_t byte1, uint8_t byte2, uint8_t byte3) {
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while (desc + 3 < end) {
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2025-02-23 22:21:55 +07:00
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if (desc[1] == byte1 && desc[2] == byte2 && desc[3] == byte3) {
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return desc;
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}
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2023-01-20 15:30:24 +07:00
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desc += desc[DESC_OFFSET_LEN];
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}
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return NULL;
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}
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2021-08-20 18:01:10 +07:00
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//--------------------------------------------------------------------+
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2022-12-22 00:34:35 +07:00
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// Endpoint Helper for both Host and Device stack
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2021-08-20 18:01:10 +07:00
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//--------------------------------------------------------------------+
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2024-03-04 16:15:26 +07:00
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bool tu_edpt_claim(tu_edpt_state_t* ep_state, osal_mutex_t mutex) {
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2022-03-09 17:17:27 +07:00
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(void) mutex;
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// pre-check to help reducing mutex lock
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TU_VERIFY((ep_state->busy == 0) && (ep_state->claimed == 0));
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2022-12-15 18:03:01 +07:00
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(void) osal_mutex_lock(mutex, OSAL_TIMEOUT_WAIT_FOREVER);
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2022-03-09 17:17:27 +07:00
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// can only claim the endpoint if it is not busy and not claimed yet.
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bool const available = (ep_state->busy == 0) && (ep_state->claimed == 0);
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2024-03-04 16:15:26 +07:00
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if (available) {
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2022-03-09 17:17:27 +07:00
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ep_state->claimed = 1;
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}
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2022-12-15 18:03:01 +07:00
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(void) osal_mutex_unlock(mutex);
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2022-03-09 17:17:27 +07:00
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return available;
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}
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2024-03-04 16:15:26 +07:00
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bool tu_edpt_release(tu_edpt_state_t* ep_state, osal_mutex_t mutex) {
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2022-03-09 17:26:55 +07:00
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(void) mutex;
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2022-12-15 18:03:01 +07:00
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(void) osal_mutex_lock(mutex, OSAL_TIMEOUT_WAIT_FOREVER);
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2022-03-09 17:26:55 +07:00
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// can only release the endpoint if it is claimed and not busy
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bool const ret = (ep_state->claimed == 1) && (ep_state->busy == 0);
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2024-03-04 16:15:26 +07:00
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if (ret) {
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2022-03-09 17:26:55 +07:00
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ep_state->claimed = 0;
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}
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2022-12-15 18:03:01 +07:00
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(void) osal_mutex_unlock(mutex);
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2022-03-09 17:26:55 +07:00
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return ret;
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}
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2025-03-06 11:03:47 +07:00
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bool tu_edpt_validate(tusb_desc_endpoint_t const* desc_ep, tusb_speed_t speed, bool is_host) {
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2021-10-24 13:11:21 +07:00
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uint16_t const max_packet_size = tu_edpt_packet_size(desc_ep);
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2021-08-20 18:01:10 +07:00
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TU_LOG2(" Open EP %02X with Size = %u\r\n", desc_ep->bEndpointAddress, max_packet_size);
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2024-03-22 12:30:14 +07:00
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switch (desc_ep->bmAttributes.xfer) {
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case TUSB_XFER_ISOCHRONOUS: {
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2021-08-20 18:01:10 +07:00
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uint16_t const spec_size = (speed == TUSB_SPEED_HIGH ? 1024 : 1023);
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TU_ASSERT(max_packet_size <= spec_size);
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2024-03-22 12:30:14 +07:00
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break;
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2021-08-20 18:01:10 +07:00
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}
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case TUSB_XFER_BULK:
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2024-03-22 12:30:14 +07:00
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if (speed == TUSB_SPEED_HIGH) {
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2021-08-20 18:01:10 +07:00
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// Bulk highspeed must be EXACTLY 512
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TU_ASSERT(max_packet_size == 512);
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2024-03-22 12:30:14 +07:00
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} else {
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2025-03-06 11:03:47 +07:00
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// Bulk fullspeed can only be 8, 16, 32, 64
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if (is_host && max_packet_size == 512) {
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// HACK: while in host mode, some device incorrectly always report 512 regardless of link speed
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// overwrite descriptor to force 64
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TU_LOG1(" WARN: EP max packet size is 512 in fullspeed, force to 64\r\n");
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tusb_desc_endpoint_t* hacked_ep = (tusb_desc_endpoint_t*) (uintptr_t) desc_ep;
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hacked_ep->wMaxPacketSize = tu_htole16(64);
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} else {
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TU_ASSERT(max_packet_size == 8 || max_packet_size == 16 ||
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max_packet_size == 32 || max_packet_size == 64);
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}
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2021-08-20 18:01:10 +07:00
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}
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2024-03-22 12:30:14 +07:00
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break;
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2021-08-20 18:01:10 +07:00
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2024-03-22 12:30:14 +07:00
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case TUSB_XFER_INTERRUPT: {
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2021-08-20 18:01:10 +07:00
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uint16_t const spec_size = (speed == TUSB_SPEED_HIGH ? 1024 : 64);
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TU_ASSERT(max_packet_size <= spec_size);
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2024-03-22 12:30:14 +07:00
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break;
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2021-08-20 18:01:10 +07:00
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}
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2024-03-22 12:30:14 +07:00
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default:
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return false;
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2021-08-20 18:01:10 +07:00
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}
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return true;
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}
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2024-03-22 12:30:14 +07:00
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void tu_edpt_bind_driver(uint8_t ep2drv[][2], tusb_desc_interface_t const* desc_itf, uint16_t desc_len,
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uint8_t driver_id) {
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2021-08-20 18:01:10 +07:00
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uint8_t const* p_desc = (uint8_t const*) desc_itf;
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2021-10-15 15:54:32 +07:00
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uint8_t const* desc_end = p_desc + desc_len;
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2021-08-20 18:01:10 +07:00
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2024-03-22 12:30:14 +07:00
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while (p_desc < desc_end) {
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if (TUSB_DESC_ENDPOINT == tu_desc_type(p_desc)) {
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2021-08-20 18:01:10 +07:00
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uint8_t const ep_addr = ((tusb_desc_endpoint_t const*) p_desc)->bEndpointAddress;
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2021-08-23 11:00:21 +07:00
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TU_LOG(2, " Bind EP %02x to driver id %u\r\n", ep_addr, driver_id);
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2021-08-20 18:01:10 +07:00
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ep2drv[tu_edpt_number(ep_addr)][tu_edpt_dir(ep_addr)] = driver_id;
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}
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p_desc = tu_desc_next(p_desc);
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}
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}
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|
|
|
|
2024-03-22 12:30:14 +07:00
|
|
|
uint16_t tu_desc_get_interface_total_len(tusb_desc_interface_t const* desc_itf, uint8_t itf_count, uint16_t max_len) {
|
2021-08-20 19:08:38 +07:00
|
|
|
uint8_t const* p_desc = (uint8_t const*) desc_itf;
|
|
|
|
uint16_t len = 0;
|
|
|
|
|
2024-03-22 12:30:14 +07:00
|
|
|
while (itf_count--) {
|
2021-08-20 19:08:38 +07:00
|
|
|
// Next on interface desc
|
|
|
|
len += tu_desc_len(desc_itf);
|
|
|
|
p_desc = tu_desc_next(p_desc);
|
|
|
|
|
2024-03-22 12:30:14 +07:00
|
|
|
while (len < max_len) {
|
2024-11-27 22:19:42 +01:00
|
|
|
if (tu_desc_len(p_desc) == 0) {
|
|
|
|
// Escape infinite loop
|
|
|
|
break;
|
|
|
|
}
|
2021-08-20 19:08:38 +07:00
|
|
|
// return on IAD regardless of itf count
|
2024-03-22 12:30:14 +07:00
|
|
|
if (tu_desc_type(p_desc) == TUSB_DESC_INTERFACE_ASSOCIATION) {
|
|
|
|
return len;
|
|
|
|
}
|
|
|
|
if ((tu_desc_type(p_desc) == TUSB_DESC_INTERFACE) &&
|
|
|
|
((tusb_desc_interface_t const*) p_desc)->bAlternateSetting == 0) {
|
2021-08-20 19:08:38 +07:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
len += tu_desc_len(p_desc);
|
|
|
|
p_desc = tu_desc_next(p_desc);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return len;
|
|
|
|
}
|
|
|
|
|
2022-12-22 00:34:35 +07:00
|
|
|
//--------------------------------------------------------------------+
|
|
|
|
// Endpoint Stream Helper for both Host and Device stack
|
|
|
|
//--------------------------------------------------------------------+
|
|
|
|
|
|
|
|
bool tu_edpt_stream_init(tu_edpt_stream_t* s, bool is_host, bool is_tx, bool overwritable,
|
2024-03-22 12:30:14 +07:00
|
|
|
void* ff_buf, uint16_t ff_bufsize, uint8_t* ep_buf, uint16_t ep_bufsize) {
|
2022-12-22 00:34:35 +07:00
|
|
|
(void) is_tx;
|
|
|
|
|
|
|
|
s->is_host = is_host;
|
|
|
|
tu_fifo_config(&s->ff, ff_buf, ff_bufsize, 1, overwritable);
|
2024-09-10 20:39:29 +07:00
|
|
|
|
|
|
|
#if OSAL_MUTEX_REQUIRED
|
|
|
|
if (ff_buf && ff_bufsize) {
|
|
|
|
osal_mutex_t new_mutex = osal_mutex_create(&s->ff_mutexdef);
|
|
|
|
tu_fifo_config_mutex(&s->ff, is_tx ? new_mutex : NULL, is_tx ? NULL : new_mutex);
|
|
|
|
}
|
|
|
|
#endif
|
2022-12-22 00:34:35 +07:00
|
|
|
|
|
|
|
s->ep_buf = ep_buf;
|
|
|
|
s->ep_bufsize = ep_bufsize;
|
|
|
|
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
2024-03-22 12:53:31 +07:00
|
|
|
bool tu_edpt_stream_deinit(tu_edpt_stream_t* s) {
|
|
|
|
(void) s;
|
|
|
|
#if OSAL_MUTEX_REQUIRED
|
2024-03-22 16:10:26 +07:00
|
|
|
if (s->ff.mutex_wr) osal_mutex_delete(s->ff.mutex_wr);
|
|
|
|
if (s->ff.mutex_rd) osal_mutex_delete(s->ff.mutex_rd);
|
2024-03-22 12:53:31 +07:00
|
|
|
#endif
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
2024-09-10 17:41:20 +07:00
|
|
|
TU_ATTR_ALWAYS_INLINE static inline bool stream_claim(uint8_t hwid, tu_edpt_stream_t* s) {
|
2024-03-22 12:30:14 +07:00
|
|
|
if (s->is_host) {
|
2022-12-22 11:16:39 +07:00
|
|
|
#if CFG_TUH_ENABLED
|
2024-09-10 17:41:20 +07:00
|
|
|
return usbh_edpt_claim(hwid, s->ep_addr);
|
2022-12-22 11:16:39 +07:00
|
|
|
#endif
|
2024-03-22 12:30:14 +07:00
|
|
|
} else {
|
2022-12-22 11:16:39 +07:00
|
|
|
#if CFG_TUD_ENABLED
|
2024-09-10 17:41:20 +07:00
|
|
|
return usbd_edpt_claim(hwid, s->ep_addr);
|
2022-12-22 11:16:39 +07:00
|
|
|
#endif
|
|
|
|
}
|
|
|
|
return false;
|
|
|
|
}
|
2022-12-22 00:34:35 +07:00
|
|
|
|
2024-09-10 17:41:20 +07:00
|
|
|
TU_ATTR_ALWAYS_INLINE static inline bool stream_xfer(uint8_t hwid, tu_edpt_stream_t* s, uint16_t count) {
|
2024-03-22 12:30:14 +07:00
|
|
|
if (s->is_host) {
|
2022-12-22 11:31:37 +07:00
|
|
|
#if CFG_TUH_ENABLED
|
2024-09-10 17:41:20 +07:00
|
|
|
return usbh_edpt_xfer(hwid, s->ep_addr, count ? s->ep_buf : NULL, count);
|
2022-12-22 11:31:37 +07:00
|
|
|
#endif
|
2024-03-22 12:30:14 +07:00
|
|
|
} else {
|
2022-12-22 11:31:37 +07:00
|
|
|
#if CFG_TUD_ENABLED
|
2024-09-10 17:41:20 +07:00
|
|
|
return usbd_edpt_xfer(hwid, s->ep_addr, count ? s->ep_buf : NULL, count);
|
2022-12-22 11:31:37 +07:00
|
|
|
#endif
|
|
|
|
}
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2024-09-10 17:41:20 +07:00
|
|
|
TU_ATTR_ALWAYS_INLINE static inline bool stream_release(uint8_t hwid, tu_edpt_stream_t* s) {
|
2024-03-22 12:30:14 +07:00
|
|
|
if (s->is_host) {
|
2022-12-22 11:31:37 +07:00
|
|
|
#if CFG_TUH_ENABLED
|
2024-09-10 17:41:20 +07:00
|
|
|
return usbh_edpt_release(hwid, s->ep_addr);
|
2022-12-22 11:31:37 +07:00
|
|
|
#endif
|
2024-03-22 12:30:14 +07:00
|
|
|
} else {
|
2022-12-22 11:31:37 +07:00
|
|
|
#if CFG_TUD_ENABLED
|
2024-09-10 17:41:20 +07:00
|
|
|
return usbd_edpt_release(hwid, s->ep_addr);
|
2022-12-22 11:31:37 +07:00
|
|
|
#endif
|
|
|
|
}
|
|
|
|
return false;
|
|
|
|
}
|
2022-12-22 11:16:39 +07:00
|
|
|
|
|
|
|
//--------------------------------------------------------------------+
|
|
|
|
// Stream Write
|
|
|
|
//--------------------------------------------------------------------+
|
2024-09-10 17:41:20 +07:00
|
|
|
bool tu_edpt_stream_write_zlp_if_needed(uint8_t hwid, tu_edpt_stream_t* s, uint32_t last_xferred_bytes) {
|
2022-12-22 11:16:39 +07:00
|
|
|
// ZLP condition: no pending data, last transferred bytes is multiple of packet size
|
2024-09-10 18:37:53 +07:00
|
|
|
const uint16_t mps = s->is_mps512 ? TUSB_EPSIZE_BULK_HS : TUSB_EPSIZE_BULK_FS;
|
|
|
|
TU_VERIFY(!tu_fifo_count(&s->ff) && last_xferred_bytes && (0 == (last_xferred_bytes & (mps - 1))));
|
2024-09-10 17:41:20 +07:00
|
|
|
TU_VERIFY(stream_claim(hwid, s));
|
|
|
|
TU_ASSERT(stream_xfer(hwid, s, 0));
|
2022-12-22 11:16:39 +07:00
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
2024-09-10 17:41:20 +07:00
|
|
|
uint32_t tu_edpt_stream_write_xfer(uint8_t hwid, tu_edpt_stream_t* s) {
|
2022-12-22 11:16:39 +07:00
|
|
|
// skip if no data
|
2024-03-22 12:30:14 +07:00
|
|
|
TU_VERIFY(tu_fifo_count(&s->ff), 0);
|
2022-12-22 11:16:39 +07:00
|
|
|
|
2024-09-10 17:41:20 +07:00
|
|
|
TU_VERIFY(stream_claim(hwid, s), 0);
|
2022-12-22 11:16:39 +07:00
|
|
|
|
|
|
|
// Pull data from FIFO -> EP buf
|
|
|
|
uint16_t const count = tu_fifo_read_n(&s->ff, s->ep_buf, s->ep_bufsize);
|
|
|
|
|
2024-03-22 12:30:14 +07:00
|
|
|
if (count) {
|
2024-09-10 17:41:20 +07:00
|
|
|
TU_ASSERT(stream_xfer(hwid, s, count), 0);
|
2022-12-22 11:16:39 +07:00
|
|
|
return count;
|
2024-03-22 12:30:14 +07:00
|
|
|
} else {
|
2022-12-22 11:16:39 +07:00
|
|
|
// Release endpoint since we don't make any transfer
|
|
|
|
// Note: data is dropped if terminal is not connected
|
2024-09-10 17:41:20 +07:00
|
|
|
stream_release(hwid, s);
|
2022-12-22 11:16:39 +07:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2024-09-10 17:41:20 +07:00
|
|
|
uint32_t tu_edpt_stream_write(uint8_t hwid, tu_edpt_stream_t* s, void const* buffer, uint32_t bufsize) {
|
2022-12-22 11:16:39 +07:00
|
|
|
TU_VERIFY(bufsize); // TODO support ZLP
|
|
|
|
|
2024-09-10 16:15:51 +07:00
|
|
|
if (0 == tu_fifo_depth(&s->ff)) {
|
|
|
|
// no fifo for buffered
|
2024-09-10 17:41:20 +07:00
|
|
|
TU_VERIFY(stream_claim(hwid, s), 0);
|
2024-09-10 16:15:51 +07:00
|
|
|
const uint32_t xact_len = tu_min32(bufsize, s->ep_bufsize);
|
|
|
|
memcpy(s->ep_buf, buffer, xact_len);
|
2024-09-10 18:47:58 +07:00
|
|
|
TU_ASSERT(stream_xfer(hwid, s, (uint16_t) xact_len), 0);
|
2024-09-10 16:15:51 +07:00
|
|
|
return xact_len;
|
|
|
|
} else {
|
|
|
|
const uint16_t ret = tu_fifo_write_n(&s->ff, buffer, (uint16_t) bufsize);
|
|
|
|
|
|
|
|
// flush if fifo has more than packet size or
|
|
|
|
// in rare case: fifo depth is configured too small (which never reach packet size)
|
2024-09-10 18:37:53 +07:00
|
|
|
const uint16_t mps = s->is_mps512 ? TUSB_EPSIZE_BULK_HS : TUSB_EPSIZE_BULK_FS;
|
|
|
|
if ((tu_fifo_count(&s->ff) >= mps) || (tu_fifo_depth(&s->ff) < mps)) {
|
2024-09-10 17:41:20 +07:00
|
|
|
tu_edpt_stream_write_xfer(hwid, s);
|
2024-09-10 16:15:51 +07:00
|
|
|
}
|
|
|
|
return ret;
|
2022-12-22 11:16:39 +07:00
|
|
|
}
|
2024-09-10 16:15:51 +07:00
|
|
|
}
|
2022-12-22 11:16:39 +07:00
|
|
|
|
2024-09-10 17:41:20 +07:00
|
|
|
uint32_t tu_edpt_stream_write_available(uint8_t hwid, tu_edpt_stream_t* s) {
|
2024-09-10 16:15:51 +07:00
|
|
|
if (tu_fifo_depth(&s->ff)) {
|
|
|
|
return (uint32_t) tu_fifo_remaining(&s->ff);
|
|
|
|
} else {
|
|
|
|
bool is_busy = true;
|
|
|
|
if (s->is_host) {
|
|
|
|
#if CFG_TUH_ENABLED
|
2024-09-10 17:41:20 +07:00
|
|
|
is_busy = usbh_edpt_busy(hwid, s->ep_addr);
|
2024-09-10 16:15:51 +07:00
|
|
|
#endif
|
|
|
|
} else {
|
|
|
|
#if CFG_TUD_ENABLED
|
2024-09-10 17:41:20 +07:00
|
|
|
is_busy = usbd_edpt_busy(hwid, s->ep_addr);
|
2024-09-10 16:15:51 +07:00
|
|
|
#endif
|
|
|
|
}
|
|
|
|
return is_busy ? 0 : s->ep_bufsize;
|
|
|
|
}
|
2022-12-22 11:16:39 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
//--------------------------------------------------------------------+
|
|
|
|
// Stream Read
|
|
|
|
//--------------------------------------------------------------------+
|
2024-09-10 17:41:20 +07:00
|
|
|
uint32_t tu_edpt_stream_read_xfer(uint8_t hwid, tu_edpt_stream_t* s) {
|
2024-09-10 16:15:51 +07:00
|
|
|
if (0 == tu_fifo_depth(&s->ff)) {
|
|
|
|
// no fifo for buffered
|
2024-09-10 17:41:20 +07:00
|
|
|
TU_VERIFY(stream_claim(hwid, s), 0);
|
|
|
|
TU_ASSERT(stream_xfer(hwid, s, s->ep_bufsize), 0);
|
2024-09-10 16:15:51 +07:00
|
|
|
return s->ep_bufsize;
|
2024-03-22 12:30:14 +07:00
|
|
|
} else {
|
2024-09-10 18:37:53 +07:00
|
|
|
const uint16_t mps = s->is_mps512 ? TUSB_EPSIZE_BULK_HS : TUSB_EPSIZE_BULK_FS;
|
2024-09-10 16:15:51 +07:00
|
|
|
uint16_t available = tu_fifo_remaining(&s->ff);
|
|
|
|
|
|
|
|
// Prepare for incoming data but only allow what we can store in the ring buffer.
|
|
|
|
// TODO Actually we can still carry out the transfer, keeping count of received bytes
|
|
|
|
// and slowly move it to the FIFO when read().
|
|
|
|
// This pre-check reduces endpoint claiming
|
2024-09-10 18:37:53 +07:00
|
|
|
TU_VERIFY(available >= mps);
|
2024-09-10 16:15:51 +07:00
|
|
|
|
2024-09-10 17:41:20 +07:00
|
|
|
TU_VERIFY(stream_claim(hwid, s), 0);
|
2024-09-10 16:15:51 +07:00
|
|
|
|
|
|
|
// get available again since fifo can be changed before endpoint is claimed
|
|
|
|
available = tu_fifo_remaining(&s->ff);
|
|
|
|
|
2024-09-10 18:37:53 +07:00
|
|
|
if (available >= mps) {
|
2024-09-10 16:15:51 +07:00
|
|
|
// multiple of packet size limit by ep bufsize
|
2024-09-10 18:37:53 +07:00
|
|
|
uint16_t count = (uint16_t) (available & ~(mps - 1));
|
2024-09-10 16:15:51 +07:00
|
|
|
count = tu_min16(count, s->ep_bufsize);
|
2024-09-10 17:41:20 +07:00
|
|
|
TU_ASSERT(stream_xfer(hwid, s, count), 0);
|
2024-09-10 16:15:51 +07:00
|
|
|
return count;
|
|
|
|
} else {
|
|
|
|
// Release endpoint since we don't make any transfer
|
2024-09-10 17:41:20 +07:00
|
|
|
stream_release(hwid, s);
|
2024-09-10 16:15:51 +07:00
|
|
|
return 0;
|
|
|
|
}
|
2022-12-22 00:34:35 +07:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2024-09-10 17:41:20 +07:00
|
|
|
uint32_t tu_edpt_stream_read(uint8_t hwid, tu_edpt_stream_t* s, void* buffer, uint32_t bufsize) {
|
2022-12-22 00:34:35 +07:00
|
|
|
uint32_t num_read = tu_fifo_read_n(&s->ff, buffer, (uint16_t) bufsize);
|
2024-09-10 17:41:20 +07:00
|
|
|
tu_edpt_stream_read_xfer(hwid, s);
|
2022-12-22 00:34:35 +07:00
|
|
|
return num_read;
|
|
|
|
}
|
|
|
|
|
|
|
|
//--------------------------------------------------------------------+
|
|
|
|
// Debug
|
|
|
|
//--------------------------------------------------------------------+
|
2022-12-22 11:16:39 +07:00
|
|
|
|
2020-01-14 23:30:39 -05:00
|
|
|
#if CFG_TUSB_DEBUG
|
|
|
|
#include <ctype.h>
|
|
|
|
|
2023-12-08 16:59:52 +01:00
|
|
|
#if CFG_TUSB_DEBUG >= CFG_TUH_LOG_LEVEL || CFG_TUSB_DEBUG >= CFG_TUD_LOG_LEVEL
|
2024-03-22 12:30:14 +07:00
|
|
|
char const* const tu_str_speed[] = {"Full", "Low", "High"};
|
|
|
|
char const* const tu_str_std_request[] = {
|
|
|
|
"Get Status",
|
|
|
|
"Clear Feature",
|
|
|
|
"Reserved",
|
|
|
|
"Set Feature",
|
|
|
|
"Reserved",
|
|
|
|
"Set Address",
|
|
|
|
"Get Descriptor",
|
|
|
|
"Set Descriptor",
|
|
|
|
"Get Configuration",
|
|
|
|
"Set Configuration",
|
|
|
|
"Get Interface",
|
|
|
|
"Set Interface",
|
|
|
|
"Synch Frame"
|
2022-03-09 16:42:51 +07:00
|
|
|
};
|
|
|
|
|
2023-05-11 14:26:12 +07:00
|
|
|
char const* const tu_str_xfer_result[] = {
|
2023-05-19 13:32:49 +07:00
|
|
|
"OK", "FAILED", "STALLED", "TIMEOUT"
|
2023-05-11 14:26:12 +07:00
|
|
|
};
|
2022-03-09 16:42:51 +07:00
|
|
|
#endif
|
2022-02-25 22:26:35 +07:00
|
|
|
|
2024-03-22 12:30:14 +07:00
|
|
|
static void dump_str_line(uint8_t const* buf, uint16_t count) {
|
2020-11-01 13:37:56 +07:00
|
|
|
tu_printf(" |");
|
2020-01-14 23:30:39 -05:00
|
|
|
// each line is 16 bytes
|
2024-03-22 12:30:14 +07:00
|
|
|
for (uint16_t i = 0; i < count; i++) {
|
2024-07-17 15:46:35 -05:00
|
|
|
int ch = buf[i];
|
2020-01-14 23:30:39 -05:00
|
|
|
tu_printf("%c", isprint(ch) ? ch : '.');
|
|
|
|
}
|
2020-11-01 13:37:56 +07:00
|
|
|
tu_printf("|\r\n");
|
2020-01-14 23:30:39 -05:00
|
|
|
}
|
|
|
|
|
2020-04-26 14:51:44 +07:00
|
|
|
/* Print out memory contents
|
2020-11-01 13:37:56 +07:00
|
|
|
* - buf : buffer
|
2020-04-26 14:51:44 +07:00
|
|
|
* - count : number of item
|
|
|
|
* - indent: prefix spaces on every line
|
|
|
|
*/
|
2024-03-22 12:30:14 +07:00
|
|
|
void tu_print_mem(void const* buf, uint32_t count, uint8_t indent) {
|
2020-01-14 23:30:39 -05:00
|
|
|
uint8_t const size = 1; // fixed 1 byte for now
|
2024-03-22 12:30:14 +07:00
|
|
|
if (!buf || !count) {
|
2020-01-14 23:30:39 -05:00
|
|
|
tu_printf("NULL\r\n");
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2024-03-22 12:30:14 +07:00
|
|
|
uint8_t const* buf8 = (uint8_t const*) buf;
|
2020-11-01 13:37:56 +07:00
|
|
|
char format[] = "%00X";
|
2024-03-22 12:30:14 +07:00
|
|
|
format[2] += (uint8_t) (2 * size); // 1 byte = 2 hex digits
|
|
|
|
const uint8_t item_per_line = 16 / size;
|
2020-01-14 23:30:39 -05:00
|
|
|
|
2024-03-22 12:30:14 +07:00
|
|
|
for (unsigned int i = 0; i < count; i++) {
|
|
|
|
unsigned int value = 0;
|
2020-01-14 23:30:39 -05:00
|
|
|
|
2024-03-22 12:30:14 +07:00
|
|
|
if (i % item_per_line == 0) {
|
2020-01-14 23:30:39 -05:00
|
|
|
// Print Ascii
|
2024-03-22 12:30:14 +07:00
|
|
|
if (i != 0) dump_str_line(buf8 - 16, 16);
|
|
|
|
for (uint8_t s = 0; s < indent; s++) tu_printf(" ");
|
2020-01-14 23:30:39 -05:00
|
|
|
// print offset or absolute address
|
2024-03-22 12:30:14 +07:00
|
|
|
tu_printf("%04X: ", 16 * i / item_per_line);
|
2020-01-14 23:30:39 -05:00
|
|
|
}
|
|
|
|
|
2023-01-13 13:37:55 -08:00
|
|
|
tu_memcpy_s(&value, sizeof(value), buf8, size);
|
2020-01-14 23:30:39 -05:00
|
|
|
buf8 += size;
|
|
|
|
|
|
|
|
tu_printf(" ");
|
|
|
|
tu_printf(format, value);
|
|
|
|
}
|
|
|
|
|
|
|
|
// fill up last row to 16 for printing ascii
|
2024-03-22 12:30:14 +07:00
|
|
|
const uint32_t remain = count % 16;
|
|
|
|
uint8_t nback = (uint8_t) (remain ? remain : 16);
|
|
|
|
if (remain) {
|
|
|
|
for (uint32_t i = 0; i < 16 - remain; i++) {
|
2020-01-14 23:30:39 -05:00
|
|
|
tu_printf(" ");
|
2024-03-22 12:30:14 +07:00
|
|
|
for (int j = 0; j < 2 * size; j++) tu_printf(" ");
|
2020-01-14 23:30:39 -05:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2024-03-22 12:30:14 +07:00
|
|
|
dump_str_line(buf8 - nback, nback);
|
2020-01-14 23:30:39 -05:00
|
|
|
}
|
|
|
|
|
|
|
|
#endif
|
|
|
|
|
|
|
|
#endif // host or device enabled
|