tinyUSB/hw/bsp/ch32v20x/boards/ch32v203g_r0_1v0/board.cmake

set(MCU_VARIANT D6)

set(LD_FLASH_SIZE 32K)
set(LD_RAM_SIZE 10K)

function(update_board TARGET)
  target_compile_definitions(${TARGET} PUBLIC
    SYSCLK_FREQ_144MHz_HSI=144000000
    CFG_EXAMPLE_MSC_DUAL_READONLY
    )
endfunction()
- update ch203 family to allow to specify flash and ram size. Introduce - add ch32v203_ro_1v0 board - CFG_EXAMPLE_MSC_DUAL_READONLY to build msc_dual_lun for ch32v203 2024-05-20 13:24:24 +07:00			`set(MCU_VARIANT D6)`

add new ch32v203g6u board, sysfreq is defined in board.cmake/mk 2024-06-21 16:08:37 +07:00			`set(LD_FLASH_SIZE 32K)`
			`set(LD_RAM_SIZE 10K)`
add c6 devkit, tested with max3421e 2024-06-06 15:49:20 +07:00
- update ch203 family to allow to specify flash and ram size. Introduce - add ch32v203_ro_1v0 board - CFG_EXAMPLE_MSC_DUAL_READONLY to build msc_dual_lun for ch32v203 2024-05-20 13:24:24 +07:00			`function(update_board TARGET)`
			`target_compile_definitions(${TARGET} PUBLIC`
add new ch32v203g6u board, sysfreq is defined in board.cmake/mk 2024-06-21 16:08:37 +07:00			`SYSCLK_FREQ_144MHz_HSI=144000000`
- update ch203 family to allow to specify flash and ram size. Introduce - add ch32v203_ro_1v0 board - CFG_EXAMPLE_MSC_DUAL_READONLY to build msc_dual_lun for ch32v203 2024-05-20 13:24:24 +07:00			`CFG_EXAMPLE_MSC_DUAL_READONLY`
			`)`
			`endfunction()`