457 lines
17 KiB
C
457 lines
17 KiB
C
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/*
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* @brief Common definitions used in SD/MMC cards
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* @note
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* Copyright(C) NXP Semiconductors, 2012
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* All rights reserved.
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*
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* @par
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* Software that is described herein is for illustrative purposes only
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* which provides customers with programming information regarding the
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* LPC products. This software is supplied "AS IS" without any warranties of
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* any kind, and NXP Semiconductors and its licensor disclaim any and
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* all warranties, express or implied, including all implied warranties of
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* merchantability, fitness for a particular purpose and non-infringement of
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* intellectual property rights. NXP Semiconductors assumes no responsibility
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* or liability for the use of the software, conveys no license or rights under any
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* patent, copyright, mask work right, or any other intellectual property rights in
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* or to any products. NXP Semiconductors reserves the right to make changes
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* in the software without notification. NXP Semiconductors also makes no
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* representation or warranty that such application will be suitable for the
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* specified use without further testing or modification.
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*
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* @par
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* Permission to use, copy, modify, and distribute this software and its
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* documentation is hereby granted, under NXP Semiconductors' and its
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* licensor's relevant copyrights in the software, without fee, provided that it
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* is used in conjunction with NXP Semiconductors microcontrollers. This
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* copyright, permission, and disclaimer notice must appear in all copies of
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* this code.
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*/
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#ifndef __SDMMC_H
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#define __SDMMC_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/** @defgroup CHIP_SDMMC_Definitions CHIP: Common SD/MMC definitions
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* @ingroup CHIP_Common
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* @{
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*/
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/**
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* @brief OCR Register definitions
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*/
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/** Support voltage range 2.0-2.1 (this bit is reserved in SDC)*/
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#define SDC_OCR_20_21 (((uint32_t) 1) << 8)
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/** Support voltage range 2.1-2.2 (this bit is reserved in SDC)*/
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#define SDC_OCR_21_22 (((uint32_t) 1) << 9)
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/** Support voltage range 2.2-2.3 (this bit is reserved in SDC)*/
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#define SDC_OCR_22_23 (((uint32_t) 1) << 10)
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/** Support voltage range 2.3-2.4 (this bit is reserved in SDC)*/
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#define SDC_OCR_23_24 (((uint32_t) 1) << 11)
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/** Support voltage range 2.4-2.5 (this bit is reserved in SDC)*/
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#define SDC_OCR_24_25 (((uint32_t) 1) << 12)
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/** Support voltage range 2.5-2.6 (this bit is reserved in SDC)*/
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#define SDC_OCR_25_26 (((uint32_t) 1) << 13)
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/** Support voltage range 2.6-2.7 (this bit is reserved in SDC)*/
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#define SDC_OCR_26_27 (((uint32_t) 1) << 14)
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/** Support voltage range 2.7-2.8 */
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#define SDC_OCR_27_28 (((uint32_t) 1) << 15)
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/** Support voltage range 2.8-2.9*/
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#define SDC_OCR_28_29 (((uint32_t) 1) << 16)
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/** Support voltage range 2.9-3.0 */
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#define SDC_OCR_29_30 (((uint32_t) 1) << 17)
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/** Support voltage range 3.0-3.1 */
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#define SDC_OCR_30_31 (((uint32_t) 1) << 18)
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/** Support voltage range 3.1-3.2 */
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#define SDC_OCR_31_32 (((uint32_t) 1) << 19)
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/** Support voltage range 3.2-3.3 */
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#define SDC_OCR_32_33 (((uint32_t) 1) << 20)
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/** Support voltage range 3.3-3.4 */
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#define SDC_OCR_33_34 (((uint32_t) 1) << 21)
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/** Support voltage range 3.4-3.5 */
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#define SDC_OCR_34_35 (((uint32_t) 1) << 22)
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/** Support voltage range 3.5-3.6 */
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#define SDC_OCR_35_36 (((uint32_t) 1) << 23)
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/** Support voltage range 2.7-3.6 */
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#define SDC_OCR_27_36 ((uint32_t) 0x00FF8000)
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/** Card Capacity Status (CCS). (this bit is reserved in MMC) */
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#define SDC_OCR_HC_CCS (((uint32_t) 1) << 30)
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/** Card power up status bit */
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#define SDC_OCR_IDLE (((uint32_t) 1) << 31)
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#define SDC_OCR_BUSY (((uint32_t) 0) << 31)
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/* SD/MMC commands - this matrix shows the command, response types, and
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supported card type for that command.
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Command Number Resp SD MMC
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----------------------- ------ ----- --- ---
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Reset (go idle) CMD0 NA x x
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Send op condition CMD1 R3 x
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All send CID CMD2 R2 x x
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Send relative address CMD3 R1 x
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Send relative address CMD3 R6 x
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Program DSR CMD4 NA x
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Select/deselect card CMD7 R1b x
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Select/deselect card CMD7 R1 x
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Send CSD CMD9 R2 x x
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Send CID CMD10 R2 x x
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Read data until stop CMD11 R1 x x
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Stop transmission CMD12 R1/b x x
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Send status CMD13 R1 x x
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Go inactive state CMD15 NA x x
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Set block length CMD16 R1 x x
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Read single block CMD17 R1 x x
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Read multiple blocks CMD18 R1 x x
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Write data until stop CMD20 R1 x
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Setblock count CMD23 R1 x
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Write single block CMD24 R1 x x
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Write multiple blocks CMD25 R1 x x
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Program CID CMD26 R1 x
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Program CSD CMD27 R1 x x
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Set write protection CMD28 R1b x x
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Clear write protection CMD29 R1b x x
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Send write protection CMD30 R1 x x
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Erase block start CMD32 R1 x
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Erase block end CMD33 R1 x
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Erase block start CMD35 R1 x
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Erase block end CMD36 R1 x
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Erase blocks CMD38 R1b x
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Fast IO CMD39 R4 x
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Go IRQ state CMD40 R5 x
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Lock/unlock CMD42 R1b x
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Application command CMD55 R1 x
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General command CMD56 R1b x
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*** SD card application commands - these must be preceded with ***
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*** MMC CMD55 application specific command first ***
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Set bus width ACMD6 R1 x
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Send SD status ACMD13 R1 x
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Send number WR blocks ACMD22 R1 x
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Set WR block erase cnt ACMD23 R1 x
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Send op condition ACMD41 R3 x
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Set clear card detect ACMD42 R1 x
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Send CSR ACMD51 R1 x */
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/**
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* @brief SD/MMC application specific commands for SD cards only - these
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* must be preceded by the SDMMC CMD55 to work correctly
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*/
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typedef enum {
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SD_SET_BUS_WIDTH, /*!< Set the SD bus width */
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SD_SEND_STATUS, /*!< Send the SD card status */
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SD_SEND_WR_BLOCKS, /*!< Send the number of written clocks */
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SD_SET_ERASE_COUNT, /*!< Set the number of blocks to pre-erase */
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SD_SENDOP_COND, /*!< Send the OCR register (init) */
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SD_CLEAR_CARD_DET, /*!< Set or clear the 50K detect pullup */
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SD_SEND_SCR, /*!< Send the SD configuration register */
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SD_INVALID_APP_CMD /*!< Invalid SD application command */
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} SD_APP_CMD_T;
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/**
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* @brief Possible SDMMC response types
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*/
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typedef enum {
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SDMMC_RESPONSE_R1, /*!< Typical status */
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SDMMC_RESPONSE_R1B, /*!< Typical status with busy */
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SDMMC_RESPONSE_R2, /*!< CID/CSD registers (CMD2 and CMD10) */
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SDMMC_RESPONSE_R3, /*!< OCR register (CMD1, ACMD41) */
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SDMMC_RESPONSE_R4, /*!< Fast IO response word */
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SDMMC_RESPONSE_R5, /*!< Go IRQ state response word */
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SDMMC_RESPONSE_R6, /*!< Published RCA response */
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SDMMC_RESPONSE_NONE /*!< No response expected */
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} SDMMC_RESPONSE_T;
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/**
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* @brief Possible SDMMC card state types
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*/
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typedef enum {
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SDMMC_IDLE_ST = 0, /*!< Idle state */
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SDMMC_READY_ST, /*!< Ready state */
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SDMMC_IDENT_ST, /*!< Identification State */
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SDMMC_STBY_ST, /*!< standby state */
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SDMMC_TRAN_ST, /*!< transfer state */
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SDMMC_DATA_ST, /*!< Sending-data State */
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SDMMC_RCV_ST, /*!< Receive-data State */
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SDMMC_PRG_ST, /*!< Programming State */
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SDMMC_DIS_ST /*!< Disconnect State */
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} SDMMC_STATE_T;
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/* Function prototype for event setup function */
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typedef void (*SDMMC_EVSETUP_FUNC_T)(void *);
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/* Function prototype for wait for event function */
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typedef uint32_t (*SDMMC_EVWAIT_FUNC_T)(void);
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/* Function prototype for milliSecond delay function */
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typedef void (*SDMMC_MSDELAY_FUNC_T)(uint32_t);
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/**
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* @brief SD/MMC Card specific setup data structure
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*/
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typedef struct {
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uint32_t response[4]; /*!< Most recent response */
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uint32_t cid[4]; /*!< CID of acquired card */
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uint32_t csd[4]; /*!< CSD of acquired card */
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uint32_t ext_csd[512 / 4]; /*!< Ext CSD */
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uint32_t card_type; /*!< Card Type */
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uint16_t rca; /*!< Relative address assigned to card */
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uint32_t speed; /*!< Speed */
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uint32_t block_len; /*!< Card sector size */
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uint64_t device_size; /*!< Device Size */
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uint32_t blocknr; /*!< Block Number */
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uint32_t clk_rate; /*! Clock rate */
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SDMMC_EVSETUP_FUNC_T evsetup_cb; /*!< Function to setup event information */
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SDMMC_EVWAIT_FUNC_T waitfunc_cb; /*!< Function to wait for event */
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SDMMC_MSDELAY_FUNC_T msdelay_func; /*!< Function to sleep in ms */
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} SDMMC_CARD_T;
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/**
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* @brief SD/MMC commands, arguments and responses
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* Standard SD/MMC commands (3.1) type argument response
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*/
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/* class 1 */
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#define MMC_GO_IDLE_STATE 0 /* bc */
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#define MMC_SEND_OP_COND 1 /* bcr [31:0] OCR R3 */
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#define MMC_ALL_SEND_CID 2 /* bcr R2 */
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#define MMC_SET_RELATIVE_ADDR 3 /* ac [31:16] RCA R1 */
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#define MMC_SET_DSR 4 /* bc [31:16] RCA */
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#define MMC_SELECT_CARD 7 /* ac [31:16] RCA R1 */
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#define MMC_SEND_EXT_CSD 8 /* bc R1 */
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#define MMC_SEND_CSD 9 /* ac [31:16] RCA R2 */
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#define MMC_SEND_CID 10 /* ac [31:16] RCA R2 */
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#define MMC_STOP_TRANSMISSION 12 /* ac R1b */
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#define MMC_SEND_STATUS 13 /* ac [31:16] RCA R1 */
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#define MMC_GO_INACTIVE_STATE 15 /* ac [31:16] RCA */
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/* class 2 */
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#define MMC_SET_BLOCKLEN 16 /* ac [31:0] block len R1 */
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#define MMC_READ_SINGLE_BLOCK 17 /* adtc [31:0] data addr R1 */
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#define MMC_READ_MULTIPLE_BLOCK 18 /* adtc [31:0] data addr R1 */
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/* class 3 */
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#define MMC_WRITE_DAT_UNTIL_STOP 20 /* adtc [31:0] data addr R1 */
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/* class 4 */
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#define MMC_SET_BLOCK_COUNT 23 /* adtc [31:0] data addr R1 */
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#define MMC_WRITE_BLOCK 24 /* adtc [31:0] data addr R1 */
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#define MMC_WRITE_MULTIPLE_BLOCK 25 /* adtc R1 */
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#define MMC_PROGRAM_CID 26 /* adtc R1 */
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#define MMC_PROGRAM_CSD 27 /* adtc R1 */
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/* class 6 */
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#define MMC_SET_WRITE_PROT 28 /* ac [31:0] data addr R1b */
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#define MMC_CLR_WRITE_PROT 29 /* ac [31:0] data addr R1b */
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#define MMC_SEND_WRITE_PROT 30 /* adtc [31:0] wpdata addr R1 */
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/* class 5 */
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#define MMC_ERASE_GROUP_START 35 /* ac [31:0] data addr R1 */
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#define MMC_ERASE_GROUP_END 36 /* ac [31:0] data addr R1 */
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#define MMC_ERASE 37 /* ac R1b */
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#define SD_ERASE_WR_BLK_START 32 /* ac [31:0] data addr R1 */
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#define SD_ERASE_WR_BLK_END 33 /* ac [31:0] data addr R1 */
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#define SD_ERASE 38 /* ac R1b */
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/* class 9 */
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#define MMC_FAST_IO 39 /* ac <Complex> R4 */
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#define MMC_GO_IRQ_STATE 40 /* bcr R5 */
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/* class 7 */
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#define MMC_LOCK_UNLOCK 42 /* adtc R1b */
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/* class 8 */
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#define MMC_APP_CMD 55 /* ac [31:16] RCA R1 */
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#define MMC_GEN_CMD 56 /* adtc [0] RD/WR R1b */
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/* SD commands type argument response */
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/* class 8 */
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/* This is basically the same command as for MMC with some quirks. */
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#define SD_SEND_RELATIVE_ADDR 3 /* ac R6 */
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#define SD_CMD8 8 /* bcr [31:0] OCR R3 */
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/* Application commands */
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#define SD_APP_SET_BUS_WIDTH 6 /* ac [1:0] bus width R1 */
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#define SD_APP_OP_COND 41 /* bcr [31:0] OCR R1 (R4) */
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#define SD_APP_SEND_SCR 51 /* adtc R1 */
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/**
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* @brief MMC status in R1<br>
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* Type<br>
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* e : error bit<br>
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* s : status bit<br>
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* r : detected and set for the actual command response<br>
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* x : detected and set during command execution. the host must poll
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* the card by sending status command in order to read these bits.
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* Clear condition<br>
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* a : according to the card state<br>
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* b : always related to the previous command. Reception of
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* a valid command will clear it (with a delay of one command)<br>
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* c : clear by read<br>
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*/
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#define R1_OUT_OF_RANGE (1UL << 31) /* er, c */
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#define R1_ADDRESS_ERROR (1 << 30) /* erx, c */
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#define R1_BLOCK_LEN_ERROR (1 << 29) /* er, c */
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#define R1_ERASE_SEQ_ERROR (1 << 28) /* er, c */
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#define R1_ERASE_PARAM (1 << 27) /* ex, c */
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#define R1_WP_VIOLATION (1 << 26) /* erx, c */
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#define R1_CARD_IS_LOCKED (1 << 25) /* sx, a */
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#define R1_LOCK_UNLOCK_FAILED (1 << 24) /* erx, c */
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#define R1_COM_CRC_ERROR (1 << 23) /* er, b */
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#define R1_ILLEGAL_COMMAND (1 << 22) /* er, b */
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#define R1_CARD_ECC_FAILED (1 << 21) /* ex, c */
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#define R1_CC_ERROR (1 << 20) /* erx, c */
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#define R1_ERROR (1 << 19) /* erx, c */
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#define R1_UNDERRUN (1 << 18) /* ex, c */
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#define R1_OVERRUN (1 << 17) /* ex, c */
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#define R1_CID_CSD_OVERWRITE (1 << 16) /* erx, c, CID/CSD overwrite */
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#define R1_WP_ERASE_SKIP (1 << 15) /* sx, c */
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#define R1_CARD_ECC_DISABLED (1 << 14) /* sx, a */
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#define R1_ERASE_RESET (1 << 13) /* sr, c */
|
||
|
|
#define R1_STATUS(x) (x & 0xFFFFE000)
|
||
|
|
#define R1_CURRENT_STATE(x) ((x & 0x00001E00) >> 9) /* sx, b (4 bits) */
|
||
|
|
#define R1_READY_FOR_DATA (1 << 8) /* sx, a */
|
||
|
|
#define R1_APP_CMD (1 << 5) /* sr, c */
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @brief SD/MMC card OCR register bits
|
||
|
|
*/
|
||
|
|
#define OCR_ALL_READY (1UL << 31) /* Card Power up status bit */
|
||
|
|
#define OCR_HC_CCS (1 << 30) /* High capacity card */
|
||
|
|
#define OCR_VOLTAGE_RANGE_MSK (0x00FF8000)
|
||
|
|
|
||
|
|
#define SD_SEND_IF_ARG 0x000001AA
|
||
|
|
#define SD_SEND_IF_ECHO_MSK 0x000000FF
|
||
|
|
#define SD_SEND_IF_RESP 0x000000AA
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @brief R3 response definitions
|
||
|
|
*/
|
||
|
|
#define CMDRESP_R3_OCR_VAL(n) (((uint32_t) n) & 0xFFFFFF)
|
||
|
|
#define CMDRESP_R3_S18A (((uint32_t) 1 ) << 24)
|
||
|
|
#define CMDRESP_R3_HC_CCS (((uint32_t) 1 ) << 30)
|
||
|
|
#define CMDRESP_R3_INIT_COMPLETE (((uint32_t) 1 ) << 31)
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @brief R6 response definitions
|
||
|
|
*/
|
||
|
|
#define CMDRESP_R6_RCA_VAL(n) (((uint32_t) (n >> 16)) & 0xFFFF)
|
||
|
|
#define CMDRESP_R6_CARD_STATUS(n) (((uint32_t) (n & 0x1FFF)) | \
|
||
|
|
((n & (1 << 13)) ? (1 << 19) : 0) | \
|
||
|
|
((n & (1 << 14)) ? (1 << 22) : 0) | \
|
||
|
|
((n & (1 << 15)) ? (1 << 23) : 0))
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @brief R7 response definitions
|
||
|
|
*/
|
||
|
|
/** Echo-back of check-pattern */
|
||
|
|
#define CMDRESP_R7_CHECK_PATTERN(n) (((uint32_t) n ) & 0xFF)
|
||
|
|
/** Voltage accepted */
|
||
|
|
#define CMDRESP_R7_VOLTAGE_ACCEPTED (((uint32_t) 1 ) << 8)
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @brief CMD3 command definitions
|
||
|
|
*/
|
||
|
|
/** Card Address */
|
||
|
|
#define CMD3_RCA(n) (((uint32_t) (n & 0xFFFF) ) << 16)
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @brief CMD7 command definitions
|
||
|
|
*/
|
||
|
|
/** Card Address */
|
||
|
|
#define CMD7_RCA(n) (((uint32_t) (n & 0xFFFF) ) << 16)
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @brief CMD8 command definitions
|
||
|
|
*/
|
||
|
|
/** Check pattern */
|
||
|
|
#define CMD8_CHECKPATTERN(n) (((uint32_t) (n & 0xFF) ) << 0)
|
||
|
|
/** Recommended pattern */
|
||
|
|
#define CMD8_DEF_PATTERN (0xAA)
|
||
|
|
/** Voltage supplied.*/
|
||
|
|
#define CMD8_VOLTAGESUPPLIED_27_36 (((uint32_t) 1 ) << 8)
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @brief CMD9 command definitions
|
||
|
|
*/
|
||
|
|
#define CMD9_RCA(n) (((uint32_t) (n & 0xFFFF) ) << 16)
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @brief CMD13 command definitions
|
||
|
|
*/
|
||
|
|
#define CMD13_RCA(n) (((uint32_t) (n & 0xFFFF) ) << 16)
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @brief APP_CMD command definitions
|
||
|
|
*/
|
||
|
|
#define CMD55_RCA(n) (((uint32_t) (n & 0xFFFF) ) << 16)
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @brief ACMD41 command definitions
|
||
|
|
*/
|
||
|
|
#define ACMD41_OCR(n) (((uint32_t) n) & 0xFFFFFF)
|
||
|
|
#define ACMD41_S18R (((uint32_t) 1 ) << 24)
|
||
|
|
#define ACMD41_XPC (((uint32_t) 1 ) << 28)
|
||
|
|
#define ACMD41_HCS (((uint32_t) 1 ) << 30)
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @brief ACMD6 command definitions
|
||
|
|
*/
|
||
|
|
#define ACMD6_BUS_WIDTH(n) ((uint32_t) n & 0x03)
|
||
|
|
#define ACMD6_BUS_WIDTH_1 (0)
|
||
|
|
#define ACMD6_BUS_WIDTH_4 (2)
|
||
|
|
|
||
|
|
/** @brief Card type defines
|
||
|
|
*/
|
||
|
|
#define CARD_TYPE_SD (1 << 0)
|
||
|
|
#define CARD_TYPE_4BIT (1 << 1)
|
||
|
|
#define CARD_TYPE_8BIT (1 << 2)
|
||
|
|
#define CARD_TYPE_HC (OCR_HC_CCS)/*!< high capacity card > 2GB */
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @brief SD/MMC sector size in bytes
|
||
|
|
*/
|
||
|
|
#define MMC_SECTOR_SIZE 512
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @brief Typical enumeration clock rate
|
||
|
|
*/
|
||
|
|
#define SD_MMC_ENUM_CLOCK 400000
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @brief Max MMC clock rate
|
||
|
|
*/
|
||
|
|
#define MMC_MAX_CLOCK 20000000
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @brief Type 0 MMC card max clock rate
|
||
|
|
*/
|
||
|
|
#define MMC_LOW_BUS_MAX_CLOCK 26000000
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @brief Type 1 MMC card max clock rate
|
||
|
|
*/
|
||
|
|
#define MMC_HIGH_BUS_MAX_CLOCK 52000000
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @brief Max SD clock rate
|
||
|
|
*/
|
||
|
|
#define SD_MAX_CLOCK 25000000
|
||
|
|
|
||
|
|
#ifdef __cplusplus
|
||
|
|
}
|
||
|
|
#endif
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @}
|
||
|
|
*/
|
||
|
|
|
||
|
|
#endif /* __SDMMC_H */
|
||
|
|
|
||
|
|
|
||
|
|
|
||
|
|
|
||
|
|
|
||
|
|
|