244 lines
8.5 KiB
C
244 lines
8.5 KiB
C
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/*
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* @brief LPC13xx basic chip inclusion file
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*
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* Copyright(C) NXP Semiconductors, 2013
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* All rights reserved.
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*
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* Software that is described herein is for illustrative purposes only
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* which provides customers with programming information regarding the
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* LPC products. This software is supplied "AS IS" without any warranties of
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* any kind, and NXP Semiconductors and its licensor disclaim any and
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* all warranties, express or implied, including all implied warranties of
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* merchantability, fitness for a particular purpose and non-infringement of
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* intellectual property rights. NXP Semiconductors assumes no responsibility
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* or liability for the use of the software, conveys no license or rights under any
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* patent, copyright, mask work right, or any other intellectual property rights in
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* or to any products. NXP Semiconductors reserves the right to make changes
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* in the software without notification. NXP Semiconductors also makes no
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* representation or warranty that such application will be suitable for the
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* specified use without further testing or modification.
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*
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* Permission to use, copy, modify, and distribute this software and its
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* documentation is hereby granted, under NXP Semiconductors' and its
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* licensor's relevant copyrights in the software, without fee, provided that it
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* is used in conjunction with NXP Semiconductors microcontrollers. This
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* copyright, permission, and disclaimer notice must appear in all copies of
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* this code.
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*/
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#ifndef __CHIP_H_
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#define __CHIP_H_
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#include "lpc_types.h"
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#include "sys_config.h"
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#include "cmsis.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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#ifndef CORE_M3
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#error CORE_M3 is not defined for the LPC13xx architecture
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#error CORE_M3 should be defined as part of your compiler define list
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#endif
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#if !defined(CHIP_LPC1343) && !defined(CHIP_LPC1347)
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#error CHIP_LPC1343 or CHIP_LPC1347 is not defined!
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#endif
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/* Peripheral mapping per device
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Peripheral Device(s)
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---------------------------- ------------------------------------------------------------------------------
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I2C(40000000) CHIP_LPC1343/CHIP_LPC1347
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WDT(40004000) CHIP_LPC1343/CHIP_LPC1347
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TIMER0_16(4000C000) CHIP_LPC1343/CHIP_LPC1347
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TIMER1_16(40010000) CHIP_LPC1343/CHIP_LPC1347
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TIMER0_32(40014000) CHIP_LPC1343/CHIP_LPC1347
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TIMER1_32(40018000) CHIP_LPC1343/CHIP_LPC1347
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PMU(40038000) CHIP_LPC1343/CHIP_LPC1347
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FLASH_CTRL(4003C000) CHIP_LPC1343/CHIP_LPC1347
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SSP0(40040000) CHIP_LPC1343/CHIP_LPC1347
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IOCONF(40044000) CHIP_LPC1343/CHIP_LPC1347
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SYSCTL(40048000) CHIP_LPC1343/CHIP_LPC1347
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SSP1(40058000) CHIP_LPC1347
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ADC(4001C000) CHIP_LPC1343/CHIP_LPC1347
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UART(40008000) CHIP_LPC1343 only
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USB(40020000) CHIP_LPC1343 only
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GPIO_PORT(50000000) CHIP_LPC1343 only
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GPIO_PIO0(50000000) CHIP_LPC1343 only
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GPIO_PIO1(50010000) CHIP_LPC1343 only
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GPIO_PIO2(50020000) CHIP_LPC1343 only
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GPIO_PIO3(50030000) CHIP_LPC1343 only
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USART/SMARTCARD(40008000) CHIP_LPC1347 only
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FLASH_EEPROM(4003C000) CHIP_LPC1347 only
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GPIO_INT(4004C000) CHIP_LPC1347 only
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GPIO_GRP0_INT(4005C000) CHIP_LPC1347 only
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GPIO_GRP1_INT(40060000) CHIP_LPC1347 only
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RITIMER(40064000) CHIP_LPC1347 only
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*/
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/** @defgroup PERIPH_13XX_BASE CHIP: LPC13xx Peripheral addresses and register set declarations
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* @ingroup CHIP_13XX_Drivers
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* @{
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*/
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#define LPC_I2C_BASE 0x40000000
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#define LPC_WWDT_BASE 0x40004000
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#define LPC_USART_BASE 0x40008000
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#define LPC_TIMER16_0_BASE 0x4000C000
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#define LPC_TIMER16_1_BASE 0x40010000
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#define LPC_TIMER32_0_BASE 0x40014000
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#define LPC_TIMER32_1_BASE 0x40018000
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#define LPC_ADC_BASE 0x4001C000
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#define LPC_PMU_BASE 0x40038000
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#define LPC_FLASH_BASE 0x4003C000
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#define LPC_SSP0_BASE 0x40040000
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#define LPC_SSP1_BASE 0x40058000
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#define LPC_IOCON_BASE 0x40044000
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#define LPC_SYSCTL_BASE 0x40048000
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#if defined(CHIP_LPC1347)
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#define LPC_GPIO_PIN_INT_BASE 0x4004C000
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#define LPC_GPIO_GROUP_INT0_BASE 0x4005C000
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#define LPC_GPIO_GROUP_INT1_BASE 0x40060000
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#define LPC_GPIO_PORT_BASE 0x50000000
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#define LPC_USB0_BASE 0x40080000
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#define LPC_RITIMER_BASE 0x40064000
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#define IAP_ENTRY_LOCATION 0X1FFF1FF1
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#define LPC_ROM_API_BASE_LOC 0x1FFF1FF8
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#else /*CHIP_LPC1343*/
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#define LPC_GPIO_PORT0_BASE 0x50000000
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#define LPC_GPIO_PORT1_BASE 0x50010000
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#define LPC_GPIO_PORT2_BASE 0x50020000
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#define LPC_GPIO_PORT3_BASE 0x50030000
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#define LPC_USB0_BASE 0x40020000
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#endif
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#define LPC_ADC ((LPC_ADC_T *) LPC_ADC_BASE)
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#define LPC_I2C ((LPC_I2C_T *) LPC_I2C_BASE)
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#define LPC_WWDT ((LPC_WWDT_T *) LPC_WWDT_BASE)
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#define LPC_USART ((LPC_USART_T *) LPC_USART_BASE)
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#define LPC_TIMER16_0 ((LPC_TIMER_T *) LPC_TIMER16_0_BASE)
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#define LPC_TIMER16_1 ((LPC_TIMER_T *) LPC_TIMER16_1_BASE)
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#define LPC_TIMER32_0 ((LPC_TIMER_T *) LPC_TIMER32_0_BASE)
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#define LPC_TIMER32_1 ((LPC_TIMER_T *) LPC_TIMER32_1_BASE)
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#define LPC_PMU ((LPC_PMU_T *) LPC_PMU_BASE)
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#define LPC_FMC ((LPC_FMC_T *) LPC_FLASH_BASE)
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#define LPC_SSP0 ((LPC_SSP_T *) LPC_SSP0_BASE)
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#define LPC_SSP1 ((LPC_SSP_T *) LPC_SSP1_BASE)
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#define LPC_IOCON ((LPC_IOCON_T *) LPC_IOCON_BASE)
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#define LPC_SYSCTL ((LPC_SYSCTL_T *) LPC_SYSCTL_BASE)
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#if defined(CHIP_LPC1347)
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#define LPC_PININT ((LPC_PIN_INT_T *) LPC_GPIO_PIN_INT_BASE)
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#define LPC_GPIO_GROUP_INT0 ((LPC_GPIOGROUPINT_T *) LPC_GPIO_GROUP_INT0_BASE)
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#define LPC_GPIO_GROUP_INT1 ((LPC_GPIOGROUPINT_T *) LPC_GPIO_GROUP_INT1_BASE)
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#define LPC_GPIO_PORT ((LPC_GPIO_T *) LPC_GPIO_PORT_BASE)
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#define LPC_RITIMER ((LPC_RITIMER_T *) LPC_RITIMER_BASE)
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#define LPC_USB ((LPC_USB_T *) LPC_USB0_BASE)
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#define LPC_ROM_API (*((LPC_ROM_API_T * *) LPC_ROM_API_BASE_LOC))
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#else
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#define LPC_GPIO_PORT ((LPC_GPIO_T *) LPC_GPIO_PORT0_BASE)
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#endif
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/**
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* @}
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*/
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/** @ingroup CHIP_13XX_DRIVER_OPTIONS
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* @{
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*/
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/**
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* @brief System oscillator rate
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* This value is defined externally to the chip layer and contains
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* the value in Hz for the external oscillator for the board. If using the
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* internal oscillator, this rate can be 0.
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*/
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extern const uint32_t OscRateIn;
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/**
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* @brief Clock rate on the CLKIN pin
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* This value is defined externally to the chip layer and contains
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* the value in Hz for the CLKIN pin for the board. If this pin isn't used,
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* this rate can be 0.
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*/
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extern const uint32_t ExtRateIn;
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/**
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* @}
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*/
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#include "sysctl_13xx.h"
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#include "clock_13xx.h"
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#include "fmc_13xx.h"
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#include "iocon_13xx.h"
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#include "adc_13xx.h"
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#include "i2c_13xx.h"
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#include "i2cm_13xx.h"
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#include "pmu_13xx.h"
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#include "ssp_13xx.h"
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#include "timer_13xx.h"
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#include "uart_13xx.h"
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#include "wwdt_13xx.h"
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#include "flash_13xx.h"
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#if defined(CHIP_LPC1347)
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#include "gpio_13xx_1.h"
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#include "gpiogroup_13xx.h"
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#include "ritimer_13xx.h"
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#include "usbd_13xx.h"
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#include "romapi_13xx.h"
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#include "pinint_13xx.h"
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#else
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#include "gpio_13xx_2.h"
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#endif
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/** @defgroup SUPPORT_13XX_FUNC CHIP: LPC13xx support functions
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* @ingroup CHIP_13XX_Drivers
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* @{
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*/
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/**
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* @brief Current system clock rate, mainly used for sysTick
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*/
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extern uint32_t SystemCoreClock;
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/**
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* @brief Update system core clock rate, should be called if the
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* system has a clock rate change
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* @return None
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*/
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void SystemCoreClockUpdate(void);
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/**
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* @brief USB Pin and clock initialization
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* Calling this function will initialize the USB pins and the clock
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* @return None
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* @note This function will assume that the chip is clocked by an
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* external crystal oscillator of frequency 12MHz and the Oscillator
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* is running.
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*/
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void Chip_USB_Init(void);
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/**
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* @brief Clock and PLL initialization based on the external oscillator
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* @return None
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* @note This function assumes an external crystal oscillator
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* frequency of 12MHz.
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*/
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void Chip_SetupXtalClocking(void);
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/**
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* @brief Clock and PLL initialization based on the internal oscillator
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* @return None
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*/
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void Chip_SetupIrcClocking(void);
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/**
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* @}
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*/
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#ifdef __cplusplus
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}
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#endif
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#endif /* __CHIP_H_ */
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