402 lines
12 KiB
C
402 lines
12 KiB
C
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/**********************************************************************
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* $Id$ lpc43xx_sdif.c 2012-Aug-15
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*//**
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* @file lpc43xx_sdif.c
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* @brief LPC43xx SD interface driver
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* @version 1.0
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* @date 15. Aug. 2012
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* @author NXP MCU SW Application Team
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*
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* Copyright(C) 2011, NXP Semiconductor
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* All rights reserved.
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*
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***********************************************************************
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* Software that is described herein is for illustrative purposes only
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* which provides customers with programming information regarding the
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* products. This software is supplied "AS IS" without any warranties.
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* NXP Semiconductors assumes no responsibility or liability for the
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* use of the software, conveys no license or title under any patent,
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* copyright, or mask work right to the product. NXP Semiconductors
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* reserves the right to make changes in the software without
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* notification. NXP Semiconductors also make no representation or
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* warranty that such application will be suitable for the specified
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* use without further testing or modification.
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* Permission to use, copy, modify, and distribute this software and its
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* documentation is hereby granted, under NXP Semiconductors'
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* relevant copyright in the software, without fee, provided that it
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* is used in conjunction with NXP Semiconductors microcontrollers. This
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* copyright, permission, and disclaimer notice must appear in all copies of
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* this code.
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**********************************************************************/
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/* Peripheral group ----------------------------------------------------------- */
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/** @addtogroup SDIF
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* @{
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*/
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/* Includes ------------------------------------------------------------------- */
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#include "LPC43xx.h" /* LPC43xx definitions */
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#include "system_LPC43xx.h"
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#include "lpc_sdmmc.h"
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#include "lpc43xx_sdif.h"
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#include "lpc43xx_cgu.h"
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/* If this source file built with example, the lpc43xx FW library configuration
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* file in each example directory ("lpc43xx_libcfg.h") must be included,
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* otherwise the default FW library configuration file must be included instead
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*/
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#ifdef __BUILD_WITH_EXAMPLE__
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#include "lpc43xx_libcfg.h"
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#else
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#include "lpc43xx_libcfg_default.h"
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#endif /* __BUILD_WITH_EXAMPLE__ */
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#ifdef _SDIF
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/* Local data structure for the SDIF driver */
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struct _sdif_device {
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MCI_IRQ_CB_FUNC_T irq_cb;
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LPC_SDMMC_DMA_Type mci_dma_dd[1 + (0x10000 / MCI_DMADES1_MAXTR)];
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uint32_t sdio_clk_rate;
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uint32_t sdif_slot_clk_rate;
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int32_t clock_enabled;
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};
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static struct _sdif_device sdif_dev;
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/*********************************************************************//**
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* @brief Enables the SDIO controller clock
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* @param[in] None
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* @return None
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**********************************************************************/
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static void sdif_enable_clock(void)
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{
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if (!sdif_dev.clock_enabled)
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{
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/* Enable SD MMC clock */
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CGU_ConfigPWR(CGU_PERIPHERAL_SDIO, ENABLE);
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sdif_dev.clock_enabled = 1;
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}
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}
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/*********************************************************************//**
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* @brief Disables the SDIO controller clock
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* @param[in] None
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* @return None
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**********************************************************************/
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static void sdif_disable_clock(void)
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{
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if (!sdif_dev.clock_enabled)
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{
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/* Disable SD MMC clock */
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CGU_ConfigPWR(CGU_PERIPHERAL_SDIO, (FunctionalState)FALSE);
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sdif_dev.clock_enabled = 0;
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}
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}
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/* Public Functions ----------------------------------------------------------- */
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/** @defgroup SDIF_Public_Functions
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* @ingroup SDIF
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* @{
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*/
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/*********************************************************************//**
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* @brief Setup DMA descriptors
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* @param[in] addr Address of buffer (source or destination)
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* @param[in] size size of buffer in bytes (64K max)
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* @return None
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**********************************************************************/
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void sdif_dma_setup(uint32_t addr, uint32_t size)
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{
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int i = 0;
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uint32_t ctrl, maxs;
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/* Reset DMA */
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LPC_SDMMC->CTRL |= MCI_CTRL_DMA_RESET | MCI_CTRL_FIFO_RESET;
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while (LPC_SDMMC->CTRL & MCI_CTRL_DMA_RESET);
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/* Build a descriptor list using the chained DMA method */
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while (size > 0)
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{
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/* Limit size of the transfer to maximum buffer size */
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maxs = size;
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if (maxs > MCI_DMADES1_MAXTR)
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maxs = MCI_DMADES1_MAXTR;
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size -= maxs;
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/* Set buffer size */
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sdif_dev.mci_dma_dd[i].des1 = MCI_DMADES1_BS1(maxs);
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/* Setup buffer address (chained) */
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sdif_dev.mci_dma_dd[i].des2 = addr + (i * MCI_DMADES1_MAXTR);
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/* Setup basic control */
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ctrl = MCI_DMADES0_OWN | MCI_DMADES0_CH;
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if (i == 0)
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ctrl |= MCI_DMADES0_FS; /* First DMA buffer */
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/* No more data? Then this is the last descriptor */
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if (!size)
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ctrl |= MCI_DMADES0_LD;
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else
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ctrl |= MCI_DMADES0_DIC;
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/* Another descriptor is needed */
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sdif_dev.mci_dma_dd[i].des3 = (uint32_t) &sdif_dev.mci_dma_dd[i + 1];
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sdif_dev.mci_dma_dd[i].des0 = ctrl;
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i++;
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}
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/* Set DMA derscriptor base address */
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LPC_SDMMC->DBADDR = (uint32_t) &sdif_dev.mci_dma_dd[0];
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}
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/*********************************************************************//**
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* @brief Function to send command to Card interface unit (CIU)
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* @param[in] cmd Command with all flags set
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* @param[in] arg Argument for the command
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* @return TRUE on times-out, otherwise FALSE
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**********************************************************************/
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int32_t sdif_send_cmd(uint32_t cmd, uint32_t arg)
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{
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volatile int32_t tmo = 50;
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volatile int delay;
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/* set command arg reg*/
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LPC_SDMMC->CMDARG = arg;
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LPC_SDMMC->CMD = MCI_CMD_START | cmd;
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/* poll untill command is accepted by the CIU */
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while (--tmo && (LPC_SDMMC->CMD & MCI_CMD_START))
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{
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if (tmo & 1)
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delay = 50;
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else
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delay = 18000;
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while (--delay > 1);
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}
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return (tmo < 1) ? 1 : 0;
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}
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/*********************************************************************//**
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* @brief Function to retrieve command response
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* @param[in] pdev Pointer to card info structure
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* @return None
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**********************************************************************/
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void sdif_get_response(uint32_t *resp)
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{
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/* on this chip response is not a fifo so read all 4 regs */
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resp[0] = LPC_SDMMC->RESP0;
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resp[1] = LPC_SDMMC->RESP1;
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resp[2] = LPC_SDMMC->RESP2;
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resp[3] = LPC_SDMMC->RESP3;
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}
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/*********************************************************************//**
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* @brief Function to set speed of the clock going to card
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* @param[in] speed Desired clock speed to the card
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* @return None
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**********************************************************************/
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void sdif_set_clock(uint32_t speed)
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{
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/* compute SD/MMC clock dividers */
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uint32_t div;
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/* Exit if the clock is already set at the passed speed */
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if (sdif_dev.sdif_slot_clk_rate == speed)
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return;
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div = ((sdif_dev.sdio_clk_rate / speed) + 2) >> 1;
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sdif_dev.sdif_slot_clk_rate = speed;
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if ((div == LPC_SDMMC->CLKDIV) && LPC_SDMMC->CLKENA)
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return; /* Closest speed is already set */
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/* disable clock */
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LPC_SDMMC->CLKENA = 0;
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/* User divider 0 */
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LPC_SDMMC->CLKSRC = MCI_CLKSRC_CLKDIV0;
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/* inform CIU */
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sdif_send_cmd(MCI_CMD_UPD_CLK | MCI_CMD_PRV_DAT_WAIT, 0);
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/* set divider 0 to desired value */
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LPC_SDMMC->CLKDIV = MCI_CLOCK_DIVIDER(0, div);
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/* inform CIU */
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sdif_send_cmd(MCI_CMD_UPD_CLK | MCI_CMD_PRV_DAT_WAIT, 0);
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/* enable clock */
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LPC_SDMMC->CLKENA = MCI_CLKEN_ENABLE;
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/* inform CIU */
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sdif_send_cmd(MCI_CMD_UPD_CLK | MCI_CMD_PRV_DAT_WAIT, 0);
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}
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/*********************************************************************//**
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* @brief Detect if an SD card is inserted
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* @param[in] None
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* @return Returns 0 if a card is detected, otherwise 1
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**********************************************************************/
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int32_t sdif_card_ndetect(void)
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{
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/* No card = high state in regsiter */
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if (LPC_SDMMC->CDETECT & 1)
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return 0;
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return 1;
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}
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/*********************************************************************//**
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* @brief Detect if write protect is enabled
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* @param[in] None
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* @return Returns 1 if card is write protected, otherwise 0
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**********************************************************************/
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int32_t sdif_card_wp_on(void)
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{
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if (LPC_SDMMC->WRTPRT & 1)
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return 1;
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return 0;
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}
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/*********************************************************************//**
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* @brief Enable or disable slot power
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* @param[in] enable !0 to enable, or 0 to disable
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* @return None
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**********************************************************************/
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void sdif_power_onoff(int32_t enable)
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{
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if (enable)
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LPC_SDMMC->PWREN = 1;
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else
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LPC_SDMMC->PWREN = 0;
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}
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/*********************************************************************//**
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* @brief Reset card in slot
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* @param[in] reset Sets SD_RST to passed state
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* @return None
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**********************************************************************/
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void sdif_reset(int32_t reset)
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{
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if (reset)
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LPC_SDMMC->RST_N = 1;
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else
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LPC_SDMMC->RST_N = 0;
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}
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/*********************************************************************//**
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* @brief Set block size for transfer
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* @param[in] bytes Lock size in bytes
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* @return None
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**********************************************************************/
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void sdif_set_blksize(uint32_t bytes)
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{
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LPC_SDMMC->BLKSIZ = bytes;
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}
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/*********************************************************************//**
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* @brief Enter or exit low power mode (disables clocking)
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* @param[in] lpmode !0 to enable low power mode, 0 = exit
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* @return None
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**********************************************************************/
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void sdif_set_lowpower_mode(int32_t lpmode)
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{
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/* Once in low power mode, no SDIF functions should ever be
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called, as it can hang the chip. Always exit low power mode
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prior to resuming SDIF functions */
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if (lpmode)
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sdif_disable_clock();
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else
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sdif_enable_clock();
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}
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/*********************************************************************//**
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* @brief Initializes the MCI card controller
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* @param[in] waitfunc Pointer to wait function to be used during for poll command status
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* @param[in] irq_callback Pointer to IRQ callback function
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* @return None
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**********************************************************************/
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void sdif_init(uint32_t sdio_clock, MCI_IRQ_CB_FUNC_T irq_callback)
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{
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volatile uint32_t i;
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sdif_dev.sdio_clk_rate = sdio_clock;
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sdif_dev.irq_cb = irq_callback;
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/* enable SD/MMC clock */
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sdif_enable_clock();
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/* Software reset */
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LPC_SDMMC->BMOD = MCI_BMOD_SWR;
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/* reset all blocks */
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LPC_SDMMC->CTRL = MCI_CTRL_RESET | MCI_CTRL_FIFO_RESET |
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MCI_CTRL_DMA_RESET;
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while (LPC_SDMMC->CTRL &
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(MCI_CTRL_RESET | MCI_CTRL_FIFO_RESET | MCI_CTRL_DMA_RESET));
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/* Internal DMA setup for control register */
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LPC_SDMMC->CTRL = MCI_CTRL_USE_INT_DMAC | MCI_CTRL_INT_ENABLE;
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LPC_SDMMC->INTMASK = 0;
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/* Clear the interrupts for the host controller */
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LPC_SDMMC->RINTSTS = 0xFFFFFFFF;
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/* Put in max timeout */
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LPC_SDMMC->TMOUT = 0xFFFFFFFF;
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/* FIFO threshold settings for DMA, DMA burst of 4,
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FIFO watermark at 16 */
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LPC_SDMMC->FIFOTH = MCI_FIFOTH_DMA_MTS_4 |
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MCI_FIFOTH_RX_WM((SD_FIFO_SZ / 2) - 1) |
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MCI_FIFOTH_TX_WM(SD_FIFO_SZ / 2);
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/* Enable internal DMA, burst size of 4, fixed burst */
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LPC_SDMMC->BMOD = MCI_BMOD_DE | MCI_BMOD_PBL4 | MCI_BMOD_DSL(4);
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/* disable clock to CIU (needs latch) */
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LPC_SDMMC->CLKENA = 0;
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LPC_SDMMC->CLKSRC = 0;
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}
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/*********************************************************************//**
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* @brief Close the MCI
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* @param[in] None
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* @return None
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**********************************************************************/
|
||
|
|
void sdif_deinit(void)
|
||
|
|
{
|
||
|
|
/* clear mmc structure*/
|
||
|
|
sdif_disable_clock();
|
||
|
|
}
|
||
|
|
|
||
|
|
/*********************************************************************//**
|
||
|
|
* @brief SDIO controller interrupt handler
|
||
|
|
* @param[in] None
|
||
|
|
* @return None
|
||
|
|
**********************************************************************/
|
||
|
|
void SDIO_IRQHandler(void)
|
||
|
|
{
|
||
|
|
/* All SD based register handling is done in the callback
|
||
|
|
function. The SDIO interrupt is not enabled as part of this
|
||
|
|
driver and needs to be enabled/disabled in the callbacks or
|
||
|
|
application as needed. This is to allow flexibility with IRQ
|
||
|
|
handling for applicaitons and RTOSes. */
|
||
|
|
sdif_dev.irq_cb(LPC_SDMMC->RINTSTS);
|
||
|
|
}
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @}
|
||
|
|
*/
|
||
|
|
|
||
|
|
#endif /* _SDIF */
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @}
|
||
|
|
*/
|