491 lines
30 KiB
C
491 lines
30 KiB
C
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/***********************************************************************************************************************
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* This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
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* will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
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**********************************************************************************************************************/
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/*
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* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
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!!GlobalInfo
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product: Pins v13.1
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processor: MIMXRT1024xxxxx
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package_id: MIMXRT1024DAG5A
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mcu_data: ksdk2_0
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processor_version: 13.0.2
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board: MIMXRT1024-EVK
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pin_labels:
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- {pin_num: '52', pin_signal: WAKEUP, label: USER_BUTTON, identifier: USER_BUTTON}
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- {pin_num: '82', pin_signal: GPIO_AD_B1_08, label: 'UART_TX/USER_LED/J17[4]', identifier: USER_LED}
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power_domains: {NVCC_GPIO: '3.3'}
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* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
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*/
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#include "fsl_common.h"
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#include "fsl_iomuxc.h"
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#include "fsl_gpio.h"
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#include "pin_mux.h"
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/* FUNCTION ************************************************************************************************************
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*
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* Function Name : BOARD_InitBootPins
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* Description : Calls initialization functions.
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*
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* END ****************************************************************************************************************/
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void BOARD_InitBootPins(void) {
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BOARD_InitPins();
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BOARD_InitDEBUG_UARTPins();
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/* GPIO_AD_B1_00~GPIO_AD_B1_05 can only be configured as flexspi function. Note that it can't be modified here */
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IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_00_FLEXSPI_A_DATA03,1U);
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IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_01_FLEXSPI_A_SCLK,1U);
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IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_02_FLEXSPI_A_DATA00,1U);
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IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_03_FLEXSPI_A_DATA02,1U);
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IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_04_FLEXSPI_A_DATA01,1U);
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IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_05_FLEXSPI_A_SS0_B,1U);
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}
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/*
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* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
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BOARD_InitPins:
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- options: {callFromInitBoot: 'true', coreID: core0, enableClock: 'true'}
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- pin_list:
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- {pin_num: '52', peripheral: GPIO5, signal: 'gpio_io, 00', pin_signal: WAKEUP, direction: INPUT}
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- {pin_num: '82', peripheral: GPIO1, signal: 'gpio_io, 24', pin_signal: GPIO_AD_B1_08, direction: OUTPUT}
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* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
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*/
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/* FUNCTION ************************************************************************************************************
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*
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* Function Name : BOARD_InitPins
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* Description : Configures pin routing and optionally pin electrical features.
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*
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* END ****************************************************************************************************************/
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void BOARD_InitPins(void) {
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CLOCK_EnableClock(kCLOCK_Iomuxc); /* iomuxc clock (iomuxc_clk_enable): 0x03U */
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CLOCK_EnableClock(kCLOCK_IomuxcSnvs); /* iomuxc_snvs clock (iomuxc_snvs_clk_enable): 0x03U */
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/* GPIO configuration of USER_LED on GPIO_AD_B1_08 (pin 82) */
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gpio_pin_config_t USER_LED_config = {
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.direction = kGPIO_DigitalOutput,
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.outputLogic = 0U,
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.interruptMode = kGPIO_NoIntmode
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};
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/* Initialize GPIO functionality on GPIO_AD_B1_08 (pin 82) */
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GPIO_PinInit(GPIO1, 24U, &USER_LED_config);
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/* GPIO configuration of USER_BUTTON on WAKEUP (pin 52) */
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gpio_pin_config_t USER_BUTTON_config = {
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.direction = kGPIO_DigitalInput,
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.outputLogic = 0U,
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.interruptMode = kGPIO_NoIntmode
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};
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/* Initialize GPIO functionality on WAKEUP (pin 52) */
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GPIO_PinInit(GPIO5, 0U, &USER_BUTTON_config);
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IOMUXC_SetPinMux(
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IOMUXC_GPIO_AD_B1_08_GPIO1_IO24, /* GPIO_AD_B1_08 is configured as GPIO1_IO24 */
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0U); /* Software Input On Field: Input Path is determined by functionality */
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IOMUXC_SetPinMux(
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IOMUXC_SNVS_WAKEUP_GPIO5_IO00, /* WAKEUP is configured as GPIO5_IO00 */
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0U); /* Software Input On Field: Input Path is determined by functionality */
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}
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/*
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* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
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BOARD_InitDEBUG_UARTPins:
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- options: {callFromInitBoot: 'true', coreID: core0, enableClock: 'true'}
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- pin_list:
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- {pin_num: '101', peripheral: LPUART1, signal: RX, pin_signal: GPIO_AD_B0_07}
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- {pin_num: '105', peripheral: LPUART1, signal: TX, pin_signal: GPIO_AD_B0_06}
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* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
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*/
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/* FUNCTION ************************************************************************************************************
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*
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* Function Name : BOARD_InitDEBUG_UARTPins
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* Description : Configures pin routing and optionally pin electrical features.
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*
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* END ****************************************************************************************************************/
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void BOARD_InitDEBUG_UARTPins(void) {
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CLOCK_EnableClock(kCLOCK_Iomuxc); /* iomuxc clock (iomuxc_clk_enable): 0x03U */
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IOMUXC_SetPinMux(
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IOMUXC_GPIO_AD_B0_06_LPUART1_TX, /* GPIO_AD_B0_06 is configured as LPUART1_TX */
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0U); /* Software Input On Field: Input Path is determined by functionality */
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IOMUXC_SetPinMux(
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IOMUXC_GPIO_AD_B0_07_LPUART1_RX, /* GPIO_AD_B0_07 is configured as LPUART1_RX */
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0U); /* Software Input On Field: Input Path is determined by functionality */
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}
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/*
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* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
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BOARD_InitSDRAMPins:
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- options: {coreID: core0, enableClock: 'true'}
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- pin_list:
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- {pin_num: '142', peripheral: SEMC, signal: 'ADDR, 00', pin_signal: GPIO_EMC_16}
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- {pin_num: '141', peripheral: SEMC, signal: 'ADDR, 01', pin_signal: GPIO_EMC_17}
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- {pin_num: '140', peripheral: SEMC, signal: 'ADDR, 02', pin_signal: GPIO_EMC_18}
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- {pin_num: '139', peripheral: SEMC, signal: 'ADDR, 03', pin_signal: GPIO_EMC_19}
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- {pin_num: '138', peripheral: SEMC, signal: 'ADDR, 04', pin_signal: GPIO_EMC_20}
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- {pin_num: '136', peripheral: SEMC, signal: 'ADDR, 06', pin_signal: GPIO_EMC_22}
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- {pin_num: '137', peripheral: SEMC, signal: 'ADDR, 05', pin_signal: GPIO_EMC_21}
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- {pin_num: '133', peripheral: SEMC, signal: 'ADDR, 07', pin_signal: GPIO_EMC_23}
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- {pin_num: '132', peripheral: SEMC, signal: 'ADDR, 08', pin_signal: GPIO_EMC_24}
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- {pin_num: '131', peripheral: SEMC, signal: 'ADDR, 09', pin_signal: GPIO_EMC_25}
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- {pin_num: '143', peripheral: SEMC, signal: 'ADDR, 10', pin_signal: GPIO_EMC_15}
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- {pin_num: '130', peripheral: SEMC, signal: 'ADDR, 11', pin_signal: GPIO_EMC_26}
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- {pin_num: '129', peripheral: SEMC, signal: 'ADDR, 12', pin_signal: GPIO_EMC_27}
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- {pin_num: '2', peripheral: SEMC, signal: 'BA, 0', pin_signal: GPIO_EMC_13}
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- {pin_num: '1', peripheral: SEMC, signal: 'BA, 1', pin_signal: GPIO_EMC_14}
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- {pin_num: '7', peripheral: SEMC, signal: semc_cas, pin_signal: GPIO_EMC_10}
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- {pin_num: '127', peripheral: SEMC, signal: semc_cke, pin_signal: GPIO_EMC_29}
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- {pin_num: '126', peripheral: SEMC, signal: semc_clk, pin_signal: GPIO_EMC_30}
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- {pin_num: '3', peripheral: SEMC, signal: 'CS, 0', pin_signal: GPIO_EMC_12}
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- {pin_num: '8', peripheral: SEMC, signal: semc_we, pin_signal: GPIO_EMC_09}
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- {pin_num: '4', peripheral: SEMC, signal: semc_ras, pin_signal: GPIO_EMC_11}
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- {pin_num: '128', peripheral: SEMC, signal: semc_dqs, pin_signal: GPIO_EMC_28}
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- {pin_num: '125', peripheral: SEMC, signal: 'DM, 1', pin_signal: GPIO_EMC_31}
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- {pin_num: '9', peripheral: SEMC, signal: 'DM, 0', pin_signal: GPIO_EMC_08}
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- {pin_num: '117', peripheral: SEMC, signal: 'DATA, 15', pin_signal: GPIO_EMC_39}
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- {pin_num: '118', peripheral: SEMC, signal: 'DATA, 14', pin_signal: GPIO_EMC_38}
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- {pin_num: '119', peripheral: SEMC, signal: 'DATA, 13', pin_signal: GPIO_EMC_37}
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- {pin_num: '120', peripheral: SEMC, signal: 'DATA, 12', pin_signal: GPIO_EMC_36}
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- {pin_num: '122', peripheral: SEMC, signal: 'DATA, 10', pin_signal: GPIO_EMC_34}
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- {pin_num: '121', peripheral: SEMC, signal: 'DATA, 11', pin_signal: GPIO_EMC_35}
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- {pin_num: '123', peripheral: SEMC, signal: 'DATA, 09', pin_signal: GPIO_EMC_33}
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- {pin_num: '124', peripheral: SEMC, signal: 'DATA, 08', pin_signal: GPIO_EMC_32}
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- {pin_num: '10', peripheral: SEMC, signal: 'DATA, 07', pin_signal: GPIO_EMC_07}
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- {pin_num: '12', peripheral: SEMC, signal: 'DATA, 06', pin_signal: GPIO_EMC_06}
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- {pin_num: '13', peripheral: SEMC, signal: 'DATA, 05', pin_signal: GPIO_EMC_05}
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- {pin_num: '14', peripheral: SEMC, signal: 'DATA, 04', pin_signal: GPIO_EMC_04}
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- {pin_num: '15', peripheral: SEMC, signal: 'DATA, 03', pin_signal: GPIO_EMC_03}
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- {pin_num: '16', peripheral: SEMC, signal: 'DATA, 02', pin_signal: GPIO_EMC_02}
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- {pin_num: '17', peripheral: SEMC, signal: 'DATA, 01', pin_signal: GPIO_EMC_01}
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- {pin_num: '18', peripheral: SEMC, signal: 'DATA, 00', pin_signal: GPIO_EMC_00}
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* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
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*/
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/* FUNCTION ************************************************************************************************************
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*
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* Function Name : BOARD_InitSDRAMPins
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* Description : Configures pin routing and optionally pin electrical features.
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*
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* END ****************************************************************************************************************/
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void BOARD_InitSDRAMPins(void) {
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CLOCK_EnableClock(kCLOCK_Iomuxc); /* iomuxc clock (iomuxc_clk_enable): 0x03U */
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IOMUXC_SetPinMux(
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IOMUXC_GPIO_EMC_00_SEMC_DATA00, /* GPIO_EMC_00 is configured as SEMC_DATA00 */
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0U); /* Software Input On Field: Input Path is determined by functionality */
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IOMUXC_SetPinMux(
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IOMUXC_GPIO_EMC_01_SEMC_DATA01, /* GPIO_EMC_01 is configured as SEMC_DATA01 */
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0U); /* Software Input On Field: Input Path is determined by functionality */
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IOMUXC_SetPinMux(
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IOMUXC_GPIO_EMC_02_SEMC_DATA02, /* GPIO_EMC_02 is configured as SEMC_DATA02 */
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0U); /* Software Input On Field: Input Path is determined by functionality */
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IOMUXC_SetPinMux(
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IOMUXC_GPIO_EMC_03_SEMC_DATA03, /* GPIO_EMC_03 is configured as SEMC_DATA03 */
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0U); /* Software Input On Field: Input Path is determined by functionality */
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IOMUXC_SetPinMux(
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IOMUXC_GPIO_EMC_04_SEMC_DATA04, /* GPIO_EMC_04 is configured as SEMC_DATA04 */
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0U); /* Software Input On Field: Input Path is determined by functionality */
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IOMUXC_SetPinMux(
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IOMUXC_GPIO_EMC_05_SEMC_DATA05, /* GPIO_EMC_05 is configured as SEMC_DATA05 */
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0U); /* Software Input On Field: Input Path is determined by functionality */
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IOMUXC_SetPinMux(
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IOMUXC_GPIO_EMC_06_SEMC_DATA06, /* GPIO_EMC_06 is configured as SEMC_DATA06 */
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0U); /* Software Input On Field: Input Path is determined by functionality */
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IOMUXC_SetPinMux(
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IOMUXC_GPIO_EMC_07_SEMC_DATA07, /* GPIO_EMC_07 is configured as SEMC_DATA07 */
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0U); /* Software Input On Field: Input Path is determined by functionality */
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IOMUXC_SetPinMux(
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IOMUXC_GPIO_EMC_08_SEMC_DM00, /* GPIO_EMC_08 is configured as SEMC_DM00 */
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0U); /* Software Input On Field: Input Path is determined by functionality */
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IOMUXC_SetPinMux(
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IOMUXC_GPIO_EMC_09_SEMC_WE, /* GPIO_EMC_09 is configured as SEMC_WE */
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0U); /* Software Input On Field: Input Path is determined by functionality */
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IOMUXC_SetPinMux(
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IOMUXC_GPIO_EMC_10_SEMC_CAS, /* GPIO_EMC_10 is configured as SEMC_CAS */
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0U); /* Software Input On Field: Input Path is determined by functionality */
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IOMUXC_SetPinMux(
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IOMUXC_GPIO_EMC_11_SEMC_RAS, /* GPIO_EMC_11 is configured as SEMC_RAS */
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0U); /* Software Input On Field: Input Path is determined by functionality */
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IOMUXC_SetPinMux(
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IOMUXC_GPIO_EMC_12_SEMC_CS0, /* GPIO_EMC_12 is configured as SEMC_CS0 */
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0U); /* Software Input On Field: Input Path is determined by functionality */
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IOMUXC_SetPinMux(
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IOMUXC_GPIO_EMC_13_SEMC_BA0, /* GPIO_EMC_13 is configured as SEMC_BA0 */
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0U); /* Software Input On Field: Input Path is determined by functionality */
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IOMUXC_SetPinMux(
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IOMUXC_GPIO_EMC_14_SEMC_BA1, /* GPIO_EMC_14 is configured as SEMC_BA1 */
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0U); /* Software Input On Field: Input Path is determined by functionality */
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IOMUXC_SetPinMux(
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IOMUXC_GPIO_EMC_15_SEMC_ADDR10, /* GPIO_EMC_15 is configured as SEMC_ADDR10 */
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0U); /* Software Input On Field: Input Path is determined by functionality */
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IOMUXC_SetPinMux(
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||
|
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IOMUXC_GPIO_EMC_16_SEMC_ADDR00, /* GPIO_EMC_16 is configured as SEMC_ADDR00 */
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|
0U); /* Software Input On Field: Input Path is determined by functionality */
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IOMUXC_SetPinMux(
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|
|
IOMUXC_GPIO_EMC_17_SEMC_ADDR01, /* GPIO_EMC_17 is configured as SEMC_ADDR01 */
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0U); /* Software Input On Field: Input Path is determined by functionality */
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IOMUXC_SetPinMux(
|
||
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|
IOMUXC_GPIO_EMC_18_SEMC_ADDR02, /* GPIO_EMC_18 is configured as SEMC_ADDR02 */
|
||
|
|
0U); /* Software Input On Field: Input Path is determined by functionality */
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||
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|
IOMUXC_SetPinMux(
|
||
|
|
IOMUXC_GPIO_EMC_19_SEMC_ADDR03, /* GPIO_EMC_19 is configured as SEMC_ADDR03 */
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||
|
|
0U); /* Software Input On Field: Input Path is determined by functionality */
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||
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IOMUXC_SetPinMux(
|
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|
|
IOMUXC_GPIO_EMC_20_SEMC_ADDR04, /* GPIO_EMC_20 is configured as SEMC_ADDR04 */
|
||
|
|
0U); /* Software Input On Field: Input Path is determined by functionality */
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||
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IOMUXC_SetPinMux(
|
||
|
|
IOMUXC_GPIO_EMC_21_SEMC_ADDR05, /* GPIO_EMC_21 is configured as SEMC_ADDR05 */
|
||
|
|
0U); /* Software Input On Field: Input Path is determined by functionality */
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||
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IOMUXC_SetPinMux(
|
||
|
|
IOMUXC_GPIO_EMC_22_SEMC_ADDR06, /* GPIO_EMC_22 is configured as SEMC_ADDR06 */
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||
|
|
0U); /* Software Input On Field: Input Path is determined by functionality */
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||
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IOMUXC_SetPinMux(
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||
|
|
IOMUXC_GPIO_EMC_23_SEMC_ADDR07, /* GPIO_EMC_23 is configured as SEMC_ADDR07 */
|
||
|
|
0U); /* Software Input On Field: Input Path is determined by functionality */
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||
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|
IOMUXC_SetPinMux(
|
||
|
|
IOMUXC_GPIO_EMC_24_SEMC_ADDR08, /* GPIO_EMC_24 is configured as SEMC_ADDR08 */
|
||
|
|
0U); /* Software Input On Field: Input Path is determined by functionality */
|
||
|
|
IOMUXC_SetPinMux(
|
||
|
|
IOMUXC_GPIO_EMC_25_SEMC_ADDR09, /* GPIO_EMC_25 is configured as SEMC_ADDR09 */
|
||
|
|
0U); /* Software Input On Field: Input Path is determined by functionality */
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||
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|
IOMUXC_SetPinMux(
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|
|
IOMUXC_GPIO_EMC_26_SEMC_ADDR11, /* GPIO_EMC_26 is configured as SEMC_ADDR11 */
|
||
|
|
0U); /* Software Input On Field: Input Path is determined by functionality */
|
||
|
|
IOMUXC_SetPinMux(
|
||
|
|
IOMUXC_GPIO_EMC_27_SEMC_ADDR12, /* GPIO_EMC_27 is configured as SEMC_ADDR12 */
|
||
|
|
0U); /* Software Input On Field: Input Path is determined by functionality */
|
||
|
|
IOMUXC_SetPinMux(
|
||
|
|
IOMUXC_GPIO_EMC_28_SEMC_DQS, /* GPIO_EMC_28 is configured as SEMC_DQS */
|
||
|
|
0U); /* Software Input On Field: Input Path is determined by functionality */
|
||
|
|
IOMUXC_SetPinMux(
|
||
|
|
IOMUXC_GPIO_EMC_29_SEMC_CKE, /* GPIO_EMC_29 is configured as SEMC_CKE */
|
||
|
|
0U); /* Software Input On Field: Input Path is determined by functionality */
|
||
|
|
IOMUXC_SetPinMux(
|
||
|
|
IOMUXC_GPIO_EMC_30_SEMC_CLK, /* GPIO_EMC_30 is configured as SEMC_CLK */
|
||
|
|
0U); /* Software Input On Field: Input Path is determined by functionality */
|
||
|
|
IOMUXC_SetPinMux(
|
||
|
|
IOMUXC_GPIO_EMC_31_SEMC_DM01, /* GPIO_EMC_31 is configured as SEMC_DM01 */
|
||
|
|
0U); /* Software Input On Field: Input Path is determined by functionality */
|
||
|
|
IOMUXC_SetPinMux(
|
||
|
|
IOMUXC_GPIO_EMC_32_SEMC_DATA08, /* GPIO_EMC_32 is configured as SEMC_DATA08 */
|
||
|
|
0U); /* Software Input On Field: Input Path is determined by functionality */
|
||
|
|
IOMUXC_SetPinMux(
|
||
|
|
IOMUXC_GPIO_EMC_33_SEMC_DATA09, /* GPIO_EMC_33 is configured as SEMC_DATA09 */
|
||
|
|
0U); /* Software Input On Field: Input Path is determined by functionality */
|
||
|
|
IOMUXC_SetPinMux(
|
||
|
|
IOMUXC_GPIO_EMC_34_SEMC_DATA10, /* GPIO_EMC_34 is configured as SEMC_DATA10 */
|
||
|
|
0U); /* Software Input On Field: Input Path is determined by functionality */
|
||
|
|
IOMUXC_SetPinMux(
|
||
|
|
IOMUXC_GPIO_EMC_35_SEMC_DATA11, /* GPIO_EMC_35 is configured as SEMC_DATA11 */
|
||
|
|
0U); /* Software Input On Field: Input Path is determined by functionality */
|
||
|
|
IOMUXC_SetPinMux(
|
||
|
|
IOMUXC_GPIO_EMC_36_SEMC_DATA12, /* GPIO_EMC_36 is configured as SEMC_DATA12 */
|
||
|
|
0U); /* Software Input On Field: Input Path is determined by functionality */
|
||
|
|
IOMUXC_SetPinMux(
|
||
|
|
IOMUXC_GPIO_EMC_37_SEMC_DATA13, /* GPIO_EMC_37 is configured as SEMC_DATA13 */
|
||
|
|
0U); /* Software Input On Field: Input Path is determined by functionality */
|
||
|
|
IOMUXC_SetPinMux(
|
||
|
|
IOMUXC_GPIO_EMC_38_SEMC_DATA14, /* GPIO_EMC_38 is configured as SEMC_DATA14 */
|
||
|
|
0U); /* Software Input On Field: Input Path is determined by functionality */
|
||
|
|
IOMUXC_SetPinMux(
|
||
|
|
IOMUXC_GPIO_EMC_39_SEMC_DATA15, /* GPIO_EMC_39 is configured as SEMC_DATA15 */
|
||
|
|
0U); /* Software Input On Field: Input Path is determined by functionality */
|
||
|
|
}
|
||
|
|
|
||
|
|
|
||
|
|
/*
|
||
|
|
* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
|
||
|
|
BOARD_InitCANPins:
|
||
|
|
- options: {coreID: core0, enableClock: 'true'}
|
||
|
|
- pin_list:
|
||
|
|
- {pin_num: '32', peripheral: CAN1, signal: RX, pin_signal: GPIO_SD_B1_01}
|
||
|
|
- {pin_num: '33', peripheral: CAN1, signal: TX, pin_signal: GPIO_SD_B1_00}
|
||
|
|
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
|
||
|
|
*/
|
||
|
|
|
||
|
|
/* FUNCTION ************************************************************************************************************
|
||
|
|
*
|
||
|
|
* Function Name : BOARD_InitCANPins
|
||
|
|
* Description : Configures pin routing and optionally pin electrical features.
|
||
|
|
*
|
||
|
|
* END ****************************************************************************************************************/
|
||
|
|
void BOARD_InitCANPins(void) {
|
||
|
|
CLOCK_EnableClock(kCLOCK_Iomuxc); /* iomuxc clock (iomuxc_clk_enable): 0x03U */
|
||
|
|
|
||
|
|
IOMUXC_SetPinMux(
|
||
|
|
IOMUXC_GPIO_SD_B1_00_FLEXCAN1_TX, /* GPIO_SD_B1_00 is configured as FLEXCAN1_TX */
|
||
|
|
0U); /* Software Input On Field: Input Path is determined by functionality */
|
||
|
|
IOMUXC_SetPinMux(
|
||
|
|
IOMUXC_GPIO_SD_B1_01_FLEXCAN1_RX, /* GPIO_SD_B1_01 is configured as FLEXCAN1_RX */
|
||
|
|
0U); /* Software Input On Field: Input Path is determined by functionality */
|
||
|
|
}
|
||
|
|
|
||
|
|
|
||
|
|
/*
|
||
|
|
* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
|
||
|
|
BOARD_InitENETPins:
|
||
|
|
- options: {coreID: core0, enableClock: 'true'}
|
||
|
|
- pin_list:
|
||
|
|
- {pin_num: '97', peripheral: ENET, signal: enet_rx_en, pin_signal: GPIO_AD_B0_11}
|
||
|
|
- {pin_num: '84', peripheral: GPIO1, signal: 'gpio_io, 22', pin_signal: GPIO_AD_B1_06}
|
||
|
|
- {pin_num: '107', peripheral: GPIO1, signal: 'gpio_io, 04', pin_signal: GPIO_AD_B0_04}
|
||
|
|
- {pin_num: '100', peripheral: ENET, signal: enet_tx_clk, pin_signal: GPIO_AD_B0_08}
|
||
|
|
- {pin_num: '95', peripheral: ENET, signal: enet_tx_en, pin_signal: GPIO_AD_B0_13}
|
||
|
|
- {pin_num: '93', peripheral: ENET, signal: 'enet_tx_data, 1', pin_signal: GPIO_AD_B0_15}
|
||
|
|
- {pin_num: '94', peripheral: ENET, signal: 'enet_tx_data, 0', pin_signal: GPIO_AD_B0_14}
|
||
|
|
- {pin_num: '96', peripheral: ENET, signal: enet_rx_er, pin_signal: GPIO_AD_B0_12}
|
||
|
|
- {pin_num: '99', peripheral: ENET, signal: 'enet_rx_data, 1', pin_signal: GPIO_AD_B0_09}
|
||
|
|
- {pin_num: '98', peripheral: ENET, signal: 'enet_rx_data, 0', pin_signal: GPIO_AD_B0_10}
|
||
|
|
- {pin_num: '116', peripheral: ENET, signal: enet_mdio, pin_signal: GPIO_EMC_40}
|
||
|
|
- {pin_num: '115', peripheral: ENET, signal: enet_mdc, pin_signal: GPIO_EMC_41}
|
||
|
|
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
|
||
|
|
*/
|
||
|
|
|
||
|
|
/* FUNCTION ************************************************************************************************************
|
||
|
|
*
|
||
|
|
* Function Name : BOARD_InitENETPins
|
||
|
|
* Description : Configures pin routing and optionally pin electrical features.
|
||
|
|
*
|
||
|
|
* END ****************************************************************************************************************/
|
||
|
|
void BOARD_InitENETPins(void) {
|
||
|
|
CLOCK_EnableClock(kCLOCK_Iomuxc); /* iomuxc clock (iomuxc_clk_enable): 0x03U */
|
||
|
|
|
||
|
|
IOMUXC_SetPinMux(
|
||
|
|
IOMUXC_GPIO_AD_B0_04_GPIO1_IO04, /* GPIO_AD_B0_04 is configured as GPIO1_IO04 */
|
||
|
|
0U); /* Software Input On Field: Input Path is determined by functionality */
|
||
|
|
IOMUXC_SetPinMux(
|
||
|
|
IOMUXC_GPIO_AD_B0_08_ENET_TX_CLK, /* GPIO_AD_B0_08 is configured as ENET_TX_CLK */
|
||
|
|
0U); /* Software Input On Field: Input Path is determined by functionality */
|
||
|
|
IOMUXC_SetPinMux(
|
||
|
|
IOMUXC_GPIO_AD_B0_09_ENET_RDATA01, /* GPIO_AD_B0_09 is configured as ENET_RDATA01 */
|
||
|
|
0U); /* Software Input On Field: Input Path is determined by functionality */
|
||
|
|
IOMUXC_SetPinMux(
|
||
|
|
IOMUXC_GPIO_AD_B0_10_ENET_RDATA00, /* GPIO_AD_B0_10 is configured as ENET_RDATA00 */
|
||
|
|
0U); /* Software Input On Field: Input Path is determined by functionality */
|
||
|
|
IOMUXC_SetPinMux(
|
||
|
|
IOMUXC_GPIO_AD_B0_11_ENET_RX_EN, /* GPIO_AD_B0_11 is configured as ENET_RX_EN */
|
||
|
|
0U); /* Software Input On Field: Input Path is determined by functionality */
|
||
|
|
IOMUXC_SetPinMux(
|
||
|
|
IOMUXC_GPIO_AD_B0_12_ENET_RX_ER, /* GPIO_AD_B0_12 is configured as ENET_RX_ER */
|
||
|
|
0U); /* Software Input On Field: Input Path is determined by functionality */
|
||
|
|
IOMUXC_SetPinMux(
|
||
|
|
IOMUXC_GPIO_AD_B0_13_ENET_TX_EN, /* GPIO_AD_B0_13 is configured as ENET_TX_EN */
|
||
|
|
0U); /* Software Input On Field: Input Path is determined by functionality */
|
||
|
|
IOMUXC_SetPinMux(
|
||
|
|
IOMUXC_GPIO_AD_B0_14_ENET_TDATA00, /* GPIO_AD_B0_14 is configured as ENET_TDATA00 */
|
||
|
|
0U); /* Software Input On Field: Input Path is determined by functionality */
|
||
|
|
IOMUXC_SetPinMux(
|
||
|
|
IOMUXC_GPIO_AD_B0_15_ENET_TDATA01, /* GPIO_AD_B0_15 is configured as ENET_TDATA01 */
|
||
|
|
0U); /* Software Input On Field: Input Path is determined by functionality */
|
||
|
|
IOMUXC_SetPinMux(
|
||
|
|
IOMUXC_GPIO_AD_B1_06_GPIO1_IO22, /* GPIO_AD_B1_06 is configured as GPIO1_IO22 */
|
||
|
|
0U); /* Software Input On Field: Input Path is determined by functionality */
|
||
|
|
IOMUXC_SetPinMux(
|
||
|
|
IOMUXC_GPIO_EMC_40_ENET_MDIO, /* GPIO_EMC_40 is configured as ENET_MDIO */
|
||
|
|
0U); /* Software Input On Field: Input Path is determined by functionality */
|
||
|
|
IOMUXC_SetPinMux(
|
||
|
|
IOMUXC_GPIO_EMC_41_ENET_MDC, /* GPIO_EMC_41 is configured as ENET_MDC */
|
||
|
|
0U); /* Software Input On Field: Input Path is determined by functionality */
|
||
|
|
}
|
||
|
|
|
||
|
|
|
||
|
|
/*
|
||
|
|
* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
|
||
|
|
BOARD_InitUSDHCPins:
|
||
|
|
- options: {coreID: core0, enableClock: 'true'}
|
||
|
|
- pin_list:
|
||
|
|
- {pin_num: '45', peripheral: USDHC1, signal: usdhc_clk, pin_signal: GPIO_SD_B0_03}
|
||
|
|
- {pin_num: '46', peripheral: USDHC1, signal: usdhc_cmd, pin_signal: GPIO_SD_B0_02}
|
||
|
|
- {pin_num: '43', peripheral: USDHC1, signal: 'usdhc_data, 0', pin_signal: GPIO_SD_B0_04}
|
||
|
|
- {pin_num: '42', peripheral: USDHC1, signal: 'usdhc_data, 1', pin_signal: GPIO_SD_B0_05}
|
||
|
|
- {pin_num: '48', peripheral: USDHC1, signal: 'usdhc_data, 2', pin_signal: GPIO_SD_B0_00}
|
||
|
|
- {pin_num: '47', peripheral: USDHC1, signal: 'usdhc_data, 3', pin_signal: GPIO_SD_B0_01}
|
||
|
|
- {pin_num: '41', peripheral: GPIO3, signal: 'gpio_io, 19', pin_signal: GPIO_SD_B0_06}
|
||
|
|
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
|
||
|
|
*/
|
||
|
|
|
||
|
|
/* FUNCTION ************************************************************************************************************
|
||
|
|
*
|
||
|
|
* Function Name : BOARD_InitUSDHCPins
|
||
|
|
* Description : Configures pin routing and optionally pin electrical features.
|
||
|
|
*
|
||
|
|
* END ****************************************************************************************************************/
|
||
|
|
void BOARD_InitUSDHCPins(void) {
|
||
|
|
CLOCK_EnableClock(kCLOCK_Iomuxc); /* iomuxc clock (iomuxc_clk_enable): 0x03U */
|
||
|
|
|
||
|
|
IOMUXC_SetPinMux(
|
||
|
|
IOMUXC_GPIO_SD_B0_00_USDHC1_DATA2, /* GPIO_SD_B0_00 is configured as USDHC1_DATA2 */
|
||
|
|
0U); /* Software Input On Field: Input Path is determined by functionality */
|
||
|
|
IOMUXC_SetPinMux(
|
||
|
|
IOMUXC_GPIO_SD_B0_01_USDHC1_DATA3, /* GPIO_SD_B0_01 is configured as USDHC1_DATA3 */
|
||
|
|
0U); /* Software Input On Field: Input Path is determined by functionality */
|
||
|
|
IOMUXC_SetPinMux(
|
||
|
|
IOMUXC_GPIO_SD_B0_02_USDHC1_CMD, /* GPIO_SD_B0_02 is configured as USDHC1_CMD */
|
||
|
|
0U); /* Software Input On Field: Input Path is determined by functionality */
|
||
|
|
IOMUXC_SetPinMux(
|
||
|
|
IOMUXC_GPIO_SD_B0_03_USDHC1_CLK, /* GPIO_SD_B0_03 is configured as USDHC1_CLK */
|
||
|
|
0U); /* Software Input On Field: Input Path is determined by functionality */
|
||
|
|
IOMUXC_SetPinMux(
|
||
|
|
IOMUXC_GPIO_SD_B0_04_USDHC1_DATA0, /* GPIO_SD_B0_04 is configured as USDHC1_DATA0 */
|
||
|
|
0U); /* Software Input On Field: Input Path is determined by functionality */
|
||
|
|
IOMUXC_SetPinMux(
|
||
|
|
IOMUXC_GPIO_SD_B0_05_USDHC1_DATA1, /* GPIO_SD_B0_05 is configured as USDHC1_DATA1 */
|
||
|
|
0U); /* Software Input On Field: Input Path is determined by functionality */
|
||
|
|
IOMUXC_SetPinMux(
|
||
|
|
IOMUXC_GPIO_SD_B0_06_GPIO3_IO19, /* GPIO_SD_B0_06 is configured as GPIO3_IO19 */
|
||
|
|
0U); /* Software Input On Field: Input Path is determined by functionality */
|
||
|
|
}
|
||
|
|
|
||
|
|
|
||
|
|
/*
|
||
|
|
* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
|
||
|
|
BOARD_InitQSPIPins:
|
||
|
|
- options: {coreID: core0, enableClock: 'true'}
|
||
|
|
- pin_list:
|
||
|
|
- {pin_num: '24', peripheral: FLEXSPI, signal: FLEXSPI_A_SCLK, pin_signal: GPIO_SD_B1_07}
|
||
|
|
- {pin_num: '23', peripheral: FLEXSPI, signal: FLEXSPI_A_DATA0, pin_signal: GPIO_SD_B1_08}
|
||
|
|
- {pin_num: '21', peripheral: FLEXSPI, signal: FLEXSPI_A_DATA1, pin_signal: GPIO_SD_B1_10}
|
||
|
|
- {pin_num: '22', peripheral: FLEXSPI, signal: FLEXSPI_A_DATA2, pin_signal: GPIO_SD_B1_09}
|
||
|
|
- {pin_num: '25', peripheral: FLEXSPI, signal: FLEXSPI_A_DATA3, pin_signal: GPIO_SD_B1_06}
|
||
|
|
- {pin_num: '19', peripheral: FLEXSPI, signal: FLEXSPI_A_SS0_B, pin_signal: GPIO_SD_B1_11}
|
||
|
|
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
|
||
|
|
*/
|
||
|
|
|
||
|
|
/* FUNCTION ************************************************************************************************************
|
||
|
|
*
|
||
|
|
* Function Name : BOARD_InitQSPIPins
|
||
|
|
* Description : Configures pin routing and optionally pin electrical features.
|
||
|
|
*
|
||
|
|
* END ****************************************************************************************************************/
|
||
|
|
void BOARD_InitQSPIPins(void) {
|
||
|
|
CLOCK_EnableClock(kCLOCK_Iomuxc); /* iomuxc clock (iomuxc_clk_enable): 0x03U */
|
||
|
|
|
||
|
|
IOMUXC_SetPinMux(
|
||
|
|
IOMUXC_GPIO_SD_B1_06_FLEXSPI_A_DATA03, /* GPIO_SD_B1_06 is configured as FLEXSPI_A_DATA03 */
|
||
|
|
0U); /* Software Input On Field: Input Path is determined by functionality */
|
||
|
|
IOMUXC_SetPinMux(
|
||
|
|
IOMUXC_GPIO_SD_B1_07_FLEXSPI_A_SCLK, /* GPIO_SD_B1_07 is configured as FLEXSPI_A_SCLK */
|
||
|
|
0U); /* Software Input On Field: Input Path is determined by functionality */
|
||
|
|
IOMUXC_SetPinMux(
|
||
|
|
IOMUXC_GPIO_SD_B1_08_FLEXSPI_A_DATA00, /* GPIO_SD_B1_08 is configured as FLEXSPI_A_DATA00 */
|
||
|
|
0U); /* Software Input On Field: Input Path is determined by functionality */
|
||
|
|
IOMUXC_SetPinMux(
|
||
|
|
IOMUXC_GPIO_SD_B1_09_FLEXSPI_A_DATA02, /* GPIO_SD_B1_09 is configured as FLEXSPI_A_DATA02 */
|
||
|
|
0U); /* Software Input On Field: Input Path is determined by functionality */
|
||
|
|
IOMUXC_SetPinMux(
|
||
|
|
IOMUXC_GPIO_SD_B1_10_FLEXSPI_A_DATA01, /* GPIO_SD_B1_10 is configured as FLEXSPI_A_DATA01 */
|
||
|
|
0U); /* Software Input On Field: Input Path is determined by functionality */
|
||
|
|
IOMUXC_SetPinMux(
|
||
|
|
IOMUXC_GPIO_SD_B1_11_FLEXSPI_A_SS0_B, /* GPIO_SD_B1_11 is configured as FLEXSPI_A_SS0_B */
|
||
|
|
0U); /* Software Input On Field: Input Path is determined by functionality */
|
||
|
|
}
|
||
|
|
|
||
|
|
/***********************************************************************************************************************
|
||
|
|
* EOF
|
||
|
|
**********************************************************************************************************************/
|