2023-11-16 15:38:55 +07:00
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set(MCU_VARIANT MIMXRT1176)
|
|
|
|
|
2024-11-02 15:13:08 +01:00
|
|
|
if (M4 STREQUAL "1")
|
|
|
|
set(MCU_CORE _cm4)
|
|
|
|
set(JLINK_CORE _M4)
|
|
|
|
set(LD_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/${MCU_VARIANT}xxxxx${MCU_CORE}_ram.ld)
|
2025-01-22 22:31:08 +07:00
|
|
|
set(CMAKE_SYSTEM_CPU cortex-m4 CACHE INTERNAL "System Processor")
|
2024-11-02 15:13:08 +01:00
|
|
|
else ()
|
|
|
|
set(MCU_CORE _cm7)
|
|
|
|
set(JLINK_CORE _M7)
|
|
|
|
endif()
|
|
|
|
|
|
|
|
set(JLINK_DEVICE MIMXRT1176xxxA${JLINK_CORE})
|
|
|
|
set(PYOCD_TARGET mimxrt1170${MCU_CORE})
|
2023-11-16 15:38:55 +07:00
|
|
|
set(NXPLINK_DEVICE MIMXRT1176xxxxx:MIMXRT1170-EVK)
|
|
|
|
|
|
|
|
function(update_board TARGET)
|
|
|
|
target_sources(${TARGET} PUBLIC
|
|
|
|
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/evkbmimxrt1170_flexspi_nor_config.c
|
|
|
|
)
|
|
|
|
target_compile_definitions(${TARGET} PUBLIC
|
2024-11-02 15:13:08 +01:00
|
|
|
CPU_MIMXRT1176DVMAA${MCU_CORE}
|
2023-11-16 15:38:55 +07:00
|
|
|
BOARD_TUD_RHPORT=0
|
|
|
|
BOARD_TUH_RHPORT=1
|
|
|
|
)
|
|
|
|
endfunction()
|