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											2024-12-27 09:11:09 +07:00
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							|  |  |  | /* metadata:
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							|  |  |  |    name: STM32 F303 Discovery | 
					
						
							|  |  |  |    url: https://www.st.com/en/evaluation-tools/stm32f3discovery.html
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							|  |  |  | */ | 
					
						
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											2024-04-23 12:04:08 +07:00
										 |  |  | #ifndef BOARD_H
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							|  |  |  | #define BOARD_H
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							|  |  |  | #define LED_PORT              GPIOE
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							|  |  |  | #define LED_PIN               GPIO_PIN_9
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							|  |  |  | #define LED_STATE_ON          1
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							|  |  |  | #define BUTTON_PORT           GPIOA
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							|  |  |  | #define BUTTON_PIN            GPIO_PIN_0
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							|  |  |  | #define BUTTON_STATE_ACTIVE   1
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							|  |  |  | /**
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							|  |  |  |   * @brief  System Clock Configuration | 
					
						
							|  |  |  |   *         The system Clock is configured as follow : | 
					
						
							|  |  |  |   *            System Clock source            = PLL (HSE) | 
					
						
							|  |  |  |   *            SYSCLK(Hz)                     = 72000000 | 
					
						
							|  |  |  |   *            HCLK(Hz)                       = 72000000 | 
					
						
							|  |  |  |   *            AHB Prescaler                  = 1 | 
					
						
							|  |  |  |   *            APB1 Prescaler                 = 2 | 
					
						
							|  |  |  |   *            APB2 Prescaler                 = 1 | 
					
						
							|  |  |  |   *            HSE Frequency(Hz)              = 8000000 | 
					
						
							|  |  |  |   *            HSE PREDIV                     = 1 | 
					
						
							|  |  |  |   *            PLLMUL                         = RCC_PLL_MUL9 (9) | 
					
						
							|  |  |  |   *            Flash Latency(WS)              = 2 | 
					
						
							|  |  |  |   * @param  None | 
					
						
							|  |  |  |   * @retval None | 
					
						
							|  |  |  |   */ | 
					
						
							|  |  |  | static inline void SystemClock_Config(void) { | 
					
						
							|  |  |  |   RCC_ClkInitTypeDef RCC_ClkInitStruct; | 
					
						
							|  |  |  |   RCC_OscInitTypeDef RCC_OscInitStruct; | 
					
						
							|  |  |  |   RCC_PeriphCLKInitTypeDef RCC_PeriphClkInit; | 
					
						
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							|  |  |  |   /* Enable HSE Oscillator and activate PLL with HSE as source */ | 
					
						
							|  |  |  |   RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; | 
					
						
							|  |  |  |   RCC_OscInitStruct.HSEState = RCC_HSE_ON; | 
					
						
							|  |  |  |   RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1; | 
					
						
							|  |  |  |   RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; | 
					
						
							|  |  |  |   RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; | 
					
						
							|  |  |  |   RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9; | 
					
						
							|  |  |  |   HAL_RCC_OscConfig(&RCC_OscInitStruct); | 
					
						
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							|  |  |  |   /* Configures the USB clock */ | 
					
						
							|  |  |  |   HAL_RCCEx_GetPeriphCLKConfig(&RCC_PeriphClkInit); | 
					
						
							|  |  |  |   RCC_PeriphClkInit.USBClockSelection = RCC_USBCLKSOURCE_PLL_DIV1_5; | 
					
						
							|  |  |  |   HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphClkInit); | 
					
						
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							|  |  |  |   /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2
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							|  |  |  |   clocks dividers */ | 
					
						
							|  |  |  |   RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2); | 
					
						
							|  |  |  |   RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; | 
					
						
							|  |  |  |   RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; | 
					
						
							|  |  |  |   RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; | 
					
						
							|  |  |  |   RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; | 
					
						
							|  |  |  |   HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2); | 
					
						
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							|  |  |  |   /* Enable Power Clock */ | 
					
						
							|  |  |  |   __HAL_RCC_PWR_CLK_ENABLE(); | 
					
						
							|  |  |  | } | 
					
						
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							|  |  |  | #endif
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