123 lines
		
	
	
		
			4.4 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
		
		
			
		
	
	
			123 lines
		
	
	
		
			4.4 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
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								/*
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								 * The MIT License (MIT)
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								 *
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								 * Copyright (c) 2022, Jerzy Kasenberg
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								 *
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								 * Permission is hereby granted, free of charge, to any person obtaining a copy
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								 * of this software and associated documentation files (the "Software"), to deal
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								 * in the Software without restriction, including without limitation the rights
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								 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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								 * copies of the Software, and to permit persons to whom the Software is
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								 * furnished to do so, subject to the following conditions:
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								 *
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								 * The above copyright notice and this permission notice shall be included in
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								 * all copies or substantial portions of the Software.
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								 *
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								 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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								 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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								 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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								 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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								 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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								 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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								 * THE SOFTWARE.
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								 *
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								 * This file is part of the TinyUSB stack.
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								 */
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								#ifndef BOARD_H_
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								#define BOARD_H_
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								#ifdef __cplusplus
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								 extern "C" {
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								#endif
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								// LED
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								#define LED_PORT              GPIOB
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								#define LED_PIN               GPIO_PIN_5
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								#define LED_STATE_ON          1
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								// Button
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								#define BUTTON_PORT           GPIOC
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								#define BUTTON_PIN            GPIO_PIN_4
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								#define BUTTON_STATE_ACTIVE   0
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								// UART Enable for STLink VCOM
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								#define UART_DEV              USART1
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								#define UART_CLK_EN           __HAL_RCC_USART1_CLK_ENABLE
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								#define UART_GPIO_PORT        GPIOB
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								#define UART_GPIO_AF          GPIO_AF7_USART1
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								#define UART_TX_PIN           GPIO_PIN_6
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								#define UART_RX_PIN           GPIO_PIN_7
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								//--------------------------------------------------------------------+
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								// RCC Clock
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								//--------------------------------------------------------------------+
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								static inline void board_clock_init(void)
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								{
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								  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
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								  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
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								  RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
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								  // Initializes the CPU, AHB and APB busses clocks
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								  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48 | RCC_OSCILLATORTYPE_HSE;
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								  RCC_OscInitStruct.HSEState       = RCC_HSE_ON;
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								  RCC_OscInitStruct.HSI48State     = RCC_HSI48_ON;
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								  RCC_OscInitStruct.PLL.PLLState   = RCC_PLL_ON;
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								  RCC_OscInitStruct.PLL.PLLSource  = RCC_PLLSOURCE_HSE;
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								  RCC_OscInitStruct.PLL.PLLM       = RCC_PLLM_DIV4;
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								  RCC_OscInitStruct.PLL.PLLN       = 24;
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								  RCC_OscInitStruct.PLL.PLLP       = RCC_PLLP_DIV4;
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								  RCC_OscInitStruct.PLL.PLLQ       = RCC_PLLQ_DIV4;
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								  RCC_OscInitStruct.PLL.PLLR       = RCC_PLLR_DIV3;
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								  HAL_RCC_OscConfig(&RCC_OscInitStruct);
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								  // Initializes the CPU, AHB and APB busses clocks
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								  RCC_ClkInitStruct.ClockType      = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
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								  RCC_ClkInitStruct.SYSCLKSource   = RCC_SYSCLKSOURCE_PLLCLK;
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								  RCC_ClkInitStruct.AHBCLKDivider  = RCC_SYSCLK_DIV1;
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								  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
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								  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
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								  HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3);
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								  PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB;
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								  PeriphClkInit.UsbClockSelection    = RCC_USBCLKSOURCE_HSI48;
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								  HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) ;
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								#if 0 // TODO need to check if USB clock is enabled
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								  /* Enable HSI48 */
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								  memset(&RCC_OscInitStruct, 0, sizeof(RCC_OscInitStruct));
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								  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48;
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								  RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
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								  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
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								  HAL_RCC_OscConfig(&RCC_OscInitStruct);
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								  /*Enable CRS Clock*/
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								  RCC_CRSInitTypeDef RCC_CRSInitStruct= {0};
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								  __HAL_RCC_CRS_CLK_ENABLE();
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								  /* Default Synchro Signal division factor (not divided) */
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								  RCC_CRSInitStruct.Prescaler = RCC_CRS_SYNC_DIV1;
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								  /* Set the SYNCSRC[1:0] bits according to CRS_Source value */
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								  RCC_CRSInitStruct.Source = RCC_CRS_SYNC_SOURCE_USB;
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								  /* HSI48 is synchronized with USB SOF at 1KHz rate */
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								  RCC_CRSInitStruct.ReloadValue =  __HAL_RCC_CRS_RELOADVALUE_CALCULATE(48000000, 1000);
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								  RCC_CRSInitStruct.ErrorLimitValue = RCC_CRS_ERRORLIMIT_DEFAULT;
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								  /* Set the TRIM[5:0] to the default value */
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								  RCC_CRSInitStruct.HSI48CalibrationValue = RCC_CRS_HSI48CALIBRATION_DEFAULT;
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								  /* Start automatic synchronization */
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								  HAL_RCCEx_CRSConfig(&RCC_CRSInitStruct);
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								#endif
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								}
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								#ifdef __cplusplus
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								 }
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								#endif
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								#endif /* BOARD_H_ */
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