2025-06-12 14:07:51 +07:00
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MCU_VARIANT = stm32n657xx
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CFLAGS += -DSTM32N657xx
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2025-06-04 11:21:27 +10:00
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JLINK_DEVICE = stm32n6xx
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2025-06-12 14:07:51 +07:00
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LD_FILE_GCC = $(BOARD_PATH)/STM32N657XX_AXISRAM2_fsbl.ld
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2025-06-04 11:21:27 +10:00
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# flash target using on-board stlink
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flash: flash-stlink
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PORT = 1
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SRC_C += \
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2025-06-12 15:08:46 +07:00
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$(ST_TCPP0203)/tcpp0203.c \
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$(ST_TCPP0203)/tcpp0203_reg.c \
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2025-06-04 11:21:27 +10:00
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INC += \
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2025-06-12 15:08:46 +07:00
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$(TOP)/$(ST_TCPP0203) \
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