2023-03-17 16:12:49 +07:00
|
|
|
/*
|
2019-03-20 16:11:42 +07:00
|
|
|
* The MIT License (MIT)
|
|
|
|
*
|
2019-05-14 11:48:05 +07:00
|
|
|
* Copyright (c) 2019 Ha Thach (tinyusb.org)
|
2019-03-20 16:11:42 +07:00
|
|
|
*
|
|
|
|
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
|
|
|
* of this software and associated documentation files (the "Software"), to deal
|
|
|
|
* in the Software without restriction, including without limitation the rights
|
|
|
|
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
|
|
|
* copies of the Software, and to permit persons to whom the Software is
|
|
|
|
* furnished to do so, subject to the following conditions:
|
|
|
|
*
|
|
|
|
* The above copyright notice and this permission notice shall be included in
|
|
|
|
* all copies or substantial portions of the Software.
|
|
|
|
*
|
|
|
|
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
|
|
|
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
|
|
|
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
|
|
|
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
|
|
|
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
|
|
|
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
|
|
|
* THE SOFTWARE.
|
|
|
|
*
|
|
|
|
* This file is part of the TinyUSB stack.
|
|
|
|
*/
|
2013-02-04 00:03:08 +07:00
|
|
|
|
2024-03-22 16:10:26 +07:00
|
|
|
#ifndef TUSB_OSAL_FREERTOS_H_
|
|
|
|
#define TUSB_OSAL_FREERTOS_H_
|
2013-02-04 00:03:08 +07:00
|
|
|
|
2019-03-20 23:12:12 +07:00
|
|
|
// FreeRTOS Headers
|
2021-09-25 16:16:55 +07:00
|
|
|
#include TU_INCLUDE_PATH(CFG_TUSB_OS_INC_PATH,FreeRTOS.h)
|
|
|
|
#include TU_INCLUDE_PATH(CFG_TUSB_OS_INC_PATH,semphr.h)
|
|
|
|
#include TU_INCLUDE_PATH(CFG_TUSB_OS_INC_PATH,queue.h)
|
|
|
|
#include TU_INCLUDE_PATH(CFG_TUSB_OS_INC_PATH,task.h)
|
2013-02-04 00:03:08 +07:00
|
|
|
|
2013-02-08 12:12:10 +07:00
|
|
|
#ifdef __cplusplus
|
|
|
|
extern "C" {
|
|
|
|
#endif
|
|
|
|
|
2022-12-05 12:09:41 +07:00
|
|
|
//--------------------------------------------------------------------+
|
|
|
|
// MACRO CONSTANT TYPEDEF PROTYPES
|
|
|
|
//--------------------------------------------------------------------+
|
|
|
|
|
|
|
|
#if configSUPPORT_STATIC_ALLOCATION
|
2025-05-16 20:09:02 +07:00
|
|
|
typedef StaticSemaphore_t osal_semaphore_def_t;
|
|
|
|
typedef StaticSemaphore_t osal_mutex_def_t;
|
2022-12-05 12:09:41 +07:00
|
|
|
#else
|
2025-05-16 20:09:02 +07:00
|
|
|
|
|
|
|
// not used therefore defined to the smallest possible type to save space
|
|
|
|
typedef uint8_t osal_semaphore_def_t;
|
|
|
|
typedef uint8_t osal_mutex_def_t;
|
2022-12-05 12:09:41 +07:00
|
|
|
#endif
|
|
|
|
|
|
|
|
typedef SemaphoreHandle_t osal_semaphore_t;
|
|
|
|
typedef SemaphoreHandle_t osal_mutex_t;
|
2023-08-03 12:05:21 +07:00
|
|
|
typedef QueueHandle_t osal_queue_t;
|
2022-12-05 12:09:41 +07:00
|
|
|
|
2025-05-16 20:09:02 +07:00
|
|
|
typedef struct {
|
2022-12-05 12:09:41 +07:00
|
|
|
uint16_t depth;
|
|
|
|
uint16_t item_sz;
|
|
|
|
void* buf;
|
2023-08-03 12:05:21 +07:00
|
|
|
|
|
|
|
#if defined(configQUEUE_REGISTRY_SIZE) && (configQUEUE_REGISTRY_SIZE>0)
|
|
|
|
char const* name;
|
|
|
|
#endif
|
|
|
|
|
2022-12-05 12:09:41 +07:00
|
|
|
#if configSUPPORT_STATIC_ALLOCATION
|
|
|
|
StaticQueue_t sq;
|
|
|
|
#endif
|
2023-08-03 12:05:21 +07:00
|
|
|
} osal_queue_def_t;
|
2022-12-05 12:09:41 +07:00
|
|
|
|
2023-08-03 12:05:21 +07:00
|
|
|
#if defined(configQUEUE_REGISTRY_SIZE) && (configQUEUE_REGISTRY_SIZE>0)
|
|
|
|
#define _OSAL_Q_NAME(_name) .name = #_name
|
|
|
|
#else
|
|
|
|
#define _OSAL_Q_NAME(_name)
|
|
|
|
#endif
|
|
|
|
|
|
|
|
// _int_set is not used with an RTOS
|
|
|
|
#define OSAL_QUEUE_DEF(_int_set, _name, _depth, _type) \
|
|
|
|
static _type _name##_##buf[_depth];\
|
2024-06-27 21:30:16 +02:00
|
|
|
osal_queue_def_t _name = { .depth = _depth, .item_sz = sizeof(_type), .buf = _name##_##buf, _OSAL_Q_NAME(_name) }
|
2022-12-05 12:09:41 +07:00
|
|
|
|
|
|
|
//--------------------------------------------------------------------+
|
|
|
|
// TASK API
|
|
|
|
//--------------------------------------------------------------------+
|
2023-08-03 12:05:21 +07:00
|
|
|
TU_ATTR_ALWAYS_INLINE static inline uint32_t _osal_ms2tick(uint32_t msec) {
|
2025-05-16 20:09:02 +07:00
|
|
|
if (msec == OSAL_TIMEOUT_WAIT_FOREVER) { return portMAX_DELAY; }
|
|
|
|
if (msec == 0) { return 0; }
|
2022-04-20 14:37:42 +07:00
|
|
|
|
|
|
|
uint32_t ticks = pdMS_TO_TICKS(msec);
|
|
|
|
|
2025-05-16 20:09:02 +07:00
|
|
|
// If configTICK_RATE_HZ is less than 1000 and 1 tick > 1 ms, we still need to delay at least 1 tick
|
|
|
|
if (ticks == 0) { ticks = 1; }
|
2022-04-20 14:37:42 +07:00
|
|
|
|
|
|
|
return ticks;
|
|
|
|
}
|
|
|
|
|
2023-08-03 12:05:21 +07:00
|
|
|
TU_ATTR_ALWAYS_INLINE static inline void osal_task_delay(uint32_t msec) {
|
|
|
|
vTaskDelay(pdMS_TO_TICKS(msec));
|
2013-04-25 16:41:00 +07:00
|
|
|
}
|
|
|
|
|
2013-02-04 00:03:08 +07:00
|
|
|
//--------------------------------------------------------------------+
|
2025-05-20 16:18:00 +07:00
|
|
|
// Spinlock API
|
2013-02-04 00:03:08 +07:00
|
|
|
//--------------------------------------------------------------------+
|
2025-05-20 16:18:00 +07:00
|
|
|
#define OSAL_SPINLOCK_DEF(_name, _int_set) \
|
|
|
|
osal_spinlock_t _name
|
2025-05-19 22:51:40 +07:00
|
|
|
|
2025-05-16 20:09:02 +07:00
|
|
|
#if TUSB_MCU_VENDOR_ESPRESSIF
|
2025-05-19 22:51:40 +07:00
|
|
|
// Espressif critical take spinlock as argument and does not use in_isr
|
2025-05-20 16:18:00 +07:00
|
|
|
typedef portMUX_TYPE osal_spinlock_t;
|
2025-05-16 20:09:02 +07:00
|
|
|
|
2025-05-20 16:18:00 +07:00
|
|
|
TU_ATTR_ALWAYS_INLINE static inline void osal_spin_init(osal_spinlock_t *ctx) {
|
2025-05-16 20:09:02 +07:00
|
|
|
spinlock_initialize(ctx);
|
|
|
|
}
|
|
|
|
|
2025-05-20 16:18:00 +07:00
|
|
|
TU_ATTR_ALWAYS_INLINE static inline void osal_spin_lock(osal_spinlock_t *ctx, bool in_isr) {
|
2025-05-21 11:19:07 +07:00
|
|
|
if (!TUP_MCU_MULTIPLE_CORE && in_isr) {
|
|
|
|
return; // single core MCU does not need to lock in ISR
|
|
|
|
}
|
2025-05-16 20:09:02 +07:00
|
|
|
portENTER_CRITICAL(ctx);
|
|
|
|
}
|
|
|
|
|
2025-05-20 16:18:00 +07:00
|
|
|
TU_ATTR_ALWAYS_INLINE static inline void osal_spin_unlock(osal_spinlock_t *ctx, bool in_isr) {
|
2025-05-21 11:19:07 +07:00
|
|
|
if (!TUP_MCU_MULTIPLE_CORE && in_isr) {
|
|
|
|
return; // single core MCU does not need to lock in ISR
|
|
|
|
}
|
2025-05-16 20:09:02 +07:00
|
|
|
portEXIT_CRITICAL(ctx);
|
|
|
|
}
|
2013-02-04 17:13:26 +07:00
|
|
|
|
2025-05-16 20:09:02 +07:00
|
|
|
#else
|
|
|
|
|
2025-05-20 16:18:00 +07:00
|
|
|
typedef UBaseType_t osal_spinlock_t;
|
2025-05-16 20:09:02 +07:00
|
|
|
|
2025-05-20 16:18:00 +07:00
|
|
|
TU_ATTR_ALWAYS_INLINE static inline void osal_spin_init(osal_spinlock_t *ctx) {
|
2025-05-16 20:09:02 +07:00
|
|
|
(void) ctx;
|
|
|
|
}
|
|
|
|
|
2025-05-20 16:18:00 +07:00
|
|
|
TU_ATTR_ALWAYS_INLINE static inline void osal_spin_lock(osal_spinlock_t *ctx, bool in_isr) {
|
2025-05-19 22:51:40 +07:00
|
|
|
if (in_isr) {
|
2025-05-21 11:19:07 +07:00
|
|
|
if (!TUP_MCU_MULTIPLE_CORE) {
|
|
|
|
(void) ctx;
|
|
|
|
return; // single core MCU does not need to lock in ISR
|
|
|
|
}
|
2025-05-19 22:51:40 +07:00
|
|
|
*ctx = taskENTER_CRITICAL_FROM_ISR();
|
|
|
|
} else {
|
|
|
|
taskENTER_CRITICAL();
|
|
|
|
}
|
2025-05-16 20:09:02 +07:00
|
|
|
}
|
|
|
|
|
2025-05-20 16:18:00 +07:00
|
|
|
TU_ATTR_ALWAYS_INLINE static inline void osal_spin_unlock(osal_spinlock_t *ctx, bool in_isr) {
|
2025-05-19 22:51:40 +07:00
|
|
|
if (in_isr) {
|
2025-05-21 11:19:07 +07:00
|
|
|
if (!TUP_MCU_MULTIPLE_CORE) {
|
|
|
|
(void) ctx;
|
|
|
|
return; // single core MCU does not need to lock in ISR
|
|
|
|
}
|
2025-05-19 22:51:40 +07:00
|
|
|
taskEXIT_CRITICAL_FROM_ISR(*ctx);
|
|
|
|
} else {
|
|
|
|
taskEXIT_CRITICAL();
|
|
|
|
}
|
2025-05-16 20:09:02 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
#endif
|
|
|
|
|
|
|
|
//--------------------------------------------------------------------+
|
|
|
|
// Semaphore API
|
|
|
|
//--------------------------------------------------------------------+
|
2023-08-03 12:05:21 +07:00
|
|
|
TU_ATTR_ALWAYS_INLINE static inline osal_semaphore_t osal_semaphore_create(osal_semaphore_def_t *semdef) {
|
2022-12-05 12:09:41 +07:00
|
|
|
#if configSUPPORT_STATIC_ALLOCATION
|
2018-05-17 18:22:30 +07:00
|
|
|
return xSemaphoreCreateBinaryStatic(semdef);
|
2022-11-30 11:33:24 +00:00
|
|
|
#else
|
2022-12-05 12:09:41 +07:00
|
|
|
(void) semdef;
|
2022-11-30 11:33:24 +00:00
|
|
|
return xSemaphoreCreateBinary();
|
|
|
|
#endif
|
2018-03-01 11:17:11 +07:00
|
|
|
}
|
2013-02-04 17:13:26 +07:00
|
|
|
|
2024-03-22 16:10:26 +07:00
|
|
|
TU_ATTR_ALWAYS_INLINE static inline bool osal_semaphore_delete(osal_semaphore_t semd_hdl) {
|
|
|
|
vSemaphoreDelete(semd_hdl);
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
2023-08-03 12:05:21 +07:00
|
|
|
TU_ATTR_ALWAYS_INLINE static inline bool osal_semaphore_post(osal_semaphore_t sem_hdl, bool in_isr) {
|
2025-05-16 20:09:02 +07:00
|
|
|
if (!in_isr) {
|
2020-07-19 23:55:35 +03:00
|
|
|
return xSemaphoreGive(sem_hdl) != 0;
|
2023-08-03 12:05:21 +07:00
|
|
|
} else {
|
2022-12-19 13:58:54 +01:00
|
|
|
BaseType_t xHigherPriorityTaskWoken = pdFALSE;
|
2020-07-21 21:06:10 +07:00
|
|
|
BaseType_t res = xSemaphoreGiveFromISR(sem_hdl, &xHigherPriorityTaskWoken);
|
|
|
|
portYIELD_FROM_ISR(xHigherPriorityTaskWoken);
|
|
|
|
return res != 0;
|
|
|
|
}
|
2013-02-04 18:05:22 +07:00
|
|
|
}
|
|
|
|
|
2023-08-03 12:05:21 +07:00
|
|
|
TU_ATTR_ALWAYS_INLINE static inline bool osal_semaphore_wait(osal_semaphore_t sem_hdl, uint32_t msec) {
|
2022-04-20 14:37:42 +07:00
|
|
|
return xSemaphoreTake(sem_hdl, _osal_ms2tick(msec));
|
2013-02-04 18:05:22 +07:00
|
|
|
}
|
|
|
|
|
2023-08-03 12:05:21 +07:00
|
|
|
TU_ATTR_ALWAYS_INLINE static inline void osal_semaphore_reset(osal_semaphore_t const sem_hdl) {
|
2018-11-02 15:45:27 +07:00
|
|
|
xQueueReset(sem_hdl);
|
2013-04-24 17:53:43 +07:00
|
|
|
}
|
|
|
|
|
2013-07-04 13:24:54 +07:00
|
|
|
//--------------------------------------------------------------------+
|
|
|
|
// MUTEX API (priority inheritance)
|
|
|
|
//--------------------------------------------------------------------+
|
2023-08-03 12:05:21 +07:00
|
|
|
TU_ATTR_ALWAYS_INLINE static inline osal_mutex_t osal_mutex_create(osal_mutex_def_t *mdef) {
|
2022-12-05 12:09:41 +07:00
|
|
|
#if configSUPPORT_STATIC_ALLOCATION
|
2018-11-02 15:45:27 +07:00
|
|
|
return xSemaphoreCreateMutexStatic(mdef);
|
2022-11-30 11:33:24 +00:00
|
|
|
#else
|
2022-12-05 12:09:41 +07:00
|
|
|
(void) mdef;
|
2022-11-30 11:33:24 +00:00
|
|
|
return xSemaphoreCreateMutex();
|
|
|
|
#endif
|
2013-07-04 13:24:54 +07:00
|
|
|
}
|
|
|
|
|
2024-03-22 16:10:26 +07:00
|
|
|
TU_ATTR_ALWAYS_INLINE static inline bool osal_mutex_delete(osal_mutex_t mutex_hdl) {
|
|
|
|
vSemaphoreDelete(mutex_hdl);
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
2023-08-03 12:05:21 +07:00
|
|
|
TU_ATTR_ALWAYS_INLINE static inline bool osal_mutex_lock(osal_mutex_t mutex_hdl, uint32_t msec) {
|
2019-04-02 16:18:36 +07:00
|
|
|
return osal_semaphore_wait(mutex_hdl, msec);
|
|
|
|
}
|
2018-11-02 15:45:27 +07:00
|
|
|
|
2023-08-03 12:05:21 +07:00
|
|
|
TU_ATTR_ALWAYS_INLINE static inline bool osal_mutex_unlock(osal_mutex_t mutex_hdl) {
|
2018-11-02 15:45:27 +07:00
|
|
|
return xSemaphoreGive(mutex_hdl);
|
2013-07-04 13:24:54 +07:00
|
|
|
}
|
|
|
|
|
2018-11-02 17:26:35 +07:00
|
|
|
//--------------------------------------------------------------------+
|
|
|
|
// QUEUE API
|
|
|
|
//--------------------------------------------------------------------+
|
2023-08-03 12:05:21 +07:00
|
|
|
TU_ATTR_ALWAYS_INLINE static inline osal_queue_t osal_queue_create(osal_queue_def_t* qdef) {
|
2023-06-01 12:57:44 -04:00
|
|
|
osal_queue_t q;
|
2023-08-03 12:05:21 +07:00
|
|
|
|
|
|
|
#if configSUPPORT_STATIC_ALLOCATION
|
|
|
|
q = xQueueCreateStatic(qdef->depth, qdef->item_sz, (uint8_t*) qdef->buf, &qdef->sq);
|
|
|
|
#else
|
|
|
|
q = xQueueCreate(qdef->depth, qdef->item_sz);
|
|
|
|
#endif
|
|
|
|
|
|
|
|
#if defined(configQUEUE_REGISTRY_SIZE) && (configQUEUE_REGISTRY_SIZE>0)
|
|
|
|
vQueueAddToRegistry(q, qdef->name);
|
|
|
|
#endif
|
|
|
|
|
2023-06-01 12:57:44 -04:00
|
|
|
return q;
|
2018-11-02 17:26:35 +07:00
|
|
|
}
|
|
|
|
|
2024-03-22 16:10:26 +07:00
|
|
|
TU_ATTR_ALWAYS_INLINE static inline bool osal_queue_delete(osal_queue_t qhdl) {
|
|
|
|
vQueueDelete(qhdl);
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
2023-08-03 12:05:21 +07:00
|
|
|
TU_ATTR_ALWAYS_INLINE static inline bool osal_queue_receive(osal_queue_t qhdl, void* data, uint32_t msec) {
|
2022-04-20 14:37:42 +07:00
|
|
|
return xQueueReceive(qhdl, data, _osal_ms2tick(msec));
|
2018-11-02 17:26:35 +07:00
|
|
|
}
|
|
|
|
|
2023-08-03 12:05:21 +07:00
|
|
|
TU_ATTR_ALWAYS_INLINE static inline bool osal_queue_send(osal_queue_t qhdl, void const *data, bool in_isr) {
|
2025-05-16 20:09:02 +07:00
|
|
|
if (!in_isr) {
|
2020-07-19 23:55:35 +03:00
|
|
|
return xQueueSendToBack(qhdl, data, OSAL_TIMEOUT_WAIT_FOREVER) != 0;
|
2023-08-03 12:05:21 +07:00
|
|
|
} else {
|
2022-12-19 13:58:54 +01:00
|
|
|
BaseType_t xHigherPriorityTaskWoken = pdFALSE;
|
2020-07-21 21:06:10 +07:00
|
|
|
BaseType_t res = xQueueSendToBackFromISR(qhdl, data, &xHigherPriorityTaskWoken);
|
|
|
|
portYIELD_FROM_ISR(xHigherPriorityTaskWoken);
|
|
|
|
return res != 0;
|
|
|
|
}
|
2020-05-20 13:38:41 +07:00
|
|
|
}
|
|
|
|
|
2023-08-03 12:05:21 +07:00
|
|
|
TU_ATTR_ALWAYS_INLINE static inline bool osal_queue_empty(osal_queue_t qhdl) {
|
2020-05-20 15:21:11 +07:00
|
|
|
return uxQueueMessagesWaiting(qhdl) == 0;
|
2018-11-02 17:26:35 +07:00
|
|
|
}
|
|
|
|
|
2013-02-04 00:03:08 +07:00
|
|
|
#ifdef __cplusplus
|
2023-08-03 12:05:21 +07:00
|
|
|
}
|
2013-02-04 00:03:08 +07:00
|
|
|
#endif
|
|
|
|
|
2022-02-18 13:07:21 +07:00
|
|
|
#endif
|