2021-07-21 13:21:58 +07:00
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/*
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* The MIT License (MIT)
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*
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* Copyright (c) 2021, Ha Thach (tinyusb.org)
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*
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* This file is part of the TinyUSB stack.
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*/
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2022-02-26 15:18:51 +07:00
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#ifndef TUSB_MCU_H_
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#define TUSB_MCU_H_
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//--------------------------------------------------------------------+
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2023-02-22 22:14:50 +07:00
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// Port/Platform Specific
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// TUP stand for TinyUSB Port/Platform (can be renamed)
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2022-02-26 15:18:51 +07:00
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//--------------------------------------------------------------------+
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//------------- Unaligned Memory Access -------------//
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2023-07-07 12:27:18 +07:00
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#ifdef __ARM_ARCH
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// ARM Architecture set __ARM_FEATURE_UNALIGNED to 1 for mcu supports unaligned access
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#if defined(__ARM_FEATURE_UNALIGNED) && __ARM_FEATURE_UNALIGNED == 1
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#define TUP_ARCH_STRICT_ALIGN 0
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#else
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#define TUP_ARCH_STRICT_ALIGN 1
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#endif
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2022-02-26 15:18:51 +07:00
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#else
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2023-07-07 12:27:18 +07:00
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// TODO default to strict align for others
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// Should investigate other architecture such as risv, xtensa, mips for optimal setting
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2022-02-26 15:18:51 +07:00
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#define TUP_ARCH_STRICT_ALIGN 1
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#endif
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2021-07-21 13:21:58 +07:00
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2022-02-25 23:04:39 +07:00
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/* USB Controller Attributes for Device, Host or MCU (both)
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2022-02-25 22:45:05 +07:00
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* - ENDPOINT_MAX: max (logical) number of endpoint
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* - ENDPOINT_EXCLUSIVE_NUMBER: endpoint number with different direction IN and OUT aren't allowed,
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* e.g EP1 OUT & EP1 IN cannot exist together
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2022-06-02 16:51:17 +07:00
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* - RHPORT_HIGHSPEED: support highspeed with on-chip PHY
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2022-02-25 22:45:05 +07:00
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*/
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2021-07-21 13:21:58 +07:00
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2023-03-01 11:21:46 +07:00
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//--------------------------------------------------------------------+
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// NXP
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//--------------------------------------------------------------------+
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2021-10-25 17:04:03 +07:00
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#if TU_CHECK_MCU(OPT_MCU_LPC11UXX, OPT_MCU_LPC13XX, OPT_MCU_LPC15XX)
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2023-08-08 21:59:36 +07:00
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#define TUP_USBIP_IP3511
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2022-02-26 17:13:06 +07:00
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#define TUP_DCD_ENDPOINT_MAX 5
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2021-07-21 13:21:58 +07:00
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2021-10-25 17:04:03 +07:00
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#elif TU_CHECK_MCU(OPT_MCU_LPC175X_6X, OPT_MCU_LPC177X_8X, OPT_MCU_LPC40XX)
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2022-02-26 17:13:06 +07:00
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#define TUP_DCD_ENDPOINT_MAX 16
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2022-02-26 17:03:54 +07:00
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#define TUP_USBIP_OHCI
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2023-02-22 22:17:45 +07:00
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#define TUP_OHCI_RHPORTS 2
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2021-07-21 13:21:58 +07:00
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2021-10-25 17:04:03 +07:00
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#elif TU_CHECK_MCU(OPT_MCU_LPC51UXX)
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2023-08-08 21:59:36 +07:00
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#define TUP_USBIP_IP3511
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2022-02-26 17:03:54 +07:00
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#define TUP_DCD_ENDPOINT_MAX 5
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2021-07-21 13:21:58 +07:00
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2023-08-08 21:59:36 +07:00
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#elif TU_CHECK_MCU(OPT_MCU_LPC54)
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2021-07-21 17:00:02 +07:00
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// TODO USB0 has 5, USB1 has 6
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2023-08-08 21:59:36 +07:00
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#define TUP_USBIP_IP3511
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2022-02-26 17:13:06 +07:00
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#define TUP_DCD_ENDPOINT_MAX 6
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2021-07-21 17:00:02 +07:00
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2023-08-08 21:59:36 +07:00
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#elif TU_CHECK_MCU(OPT_MCU_LPC55)
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2021-07-21 13:21:58 +07:00
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// TODO USB0 has 5, USB1 has 6
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2023-08-08 21:59:36 +07:00
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#define TUP_USBIP_IP3511
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2022-02-26 17:13:06 +07:00
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#define TUP_DCD_ENDPOINT_MAX 6
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2021-07-21 13:21:58 +07:00
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2023-05-23 21:45:00 +07:00
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#elif TU_CHECK_MCU(OPT_MCU_LPC18XX, OPT_MCU_LPC43XX)
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// USB0 has 6 with HS PHY, USB1 has 4 only FS
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#define TUP_USBIP_CHIPIDEA_HS
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#define TUP_USBIP_EHCI
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#define TUP_DCD_ENDPOINT_MAX 6
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#define TUP_RHPORT_HIGHSPEED 1
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#elif TU_CHECK_MCU(OPT_MCU_MCXN9)
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2023-06-15 13:06:27 +07:00
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// USB0 is chipidea FS
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#define TUP_USBIP_CHIPIDEA_FS
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#define TUP_USBIP_CHIPIDEA_FS_MCX
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// USB1 is chipidea HS
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2023-05-23 21:45:00 +07:00
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#define TUP_USBIP_CHIPIDEA_HS
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#define TUP_USBIP_EHCI
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#define TUP_DCD_ENDPOINT_MAX 8
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#define TUP_RHPORT_HIGHSPEED 1
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2023-06-16 11:26:38 +07:00
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#elif TU_CHECK_MCU(OPT_MCU_MIMXRT1XXX)
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2022-02-26 15:18:51 +07:00
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#define TUP_USBIP_CHIPIDEA_HS
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2022-02-26 17:03:54 +07:00
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#define TUP_USBIP_EHCI
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2022-02-26 17:13:06 +07:00
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#define TUP_DCD_ENDPOINT_MAX 8
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2023-05-23 21:45:00 +07:00
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#define TUP_RHPORT_HIGHSPEED 1
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2022-02-25 22:45:05 +07:00
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2023-06-24 18:26:51 +07:00
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#elif TU_CHECK_MCU(OPT_MCU_KINETIS_KL, OPT_MCU_KINETIS_K32L)
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2023-03-18 18:30:51 +07:00
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#define TUP_USBIP_CHIPIDEA_FS
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#define TUP_USBIP_CHIPIDEA_FS_KINETIS
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2022-02-26 17:13:06 +07:00
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#define TUP_DCD_ENDPOINT_MAX 16
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2021-07-21 13:21:58 +07:00
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2021-10-25 17:04:03 +07:00
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#elif TU_CHECK_MCU(OPT_MCU_MM32F327X)
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2022-02-26 17:13:06 +07:00
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#define TUP_DCD_ENDPOINT_MAX 16
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2021-09-18 16:53:16 +07:00
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2023-03-01 11:21:46 +07:00
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//--------------------------------------------------------------------+
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// Nordic
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//--------------------------------------------------------------------+
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2021-10-25 17:04:03 +07:00
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#elif TU_CHECK_MCU(OPT_MCU_NRF5X)
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2021-07-21 13:21:58 +07:00
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// 8 CBI + 1 ISO
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2022-02-26 17:13:06 +07:00
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#define TUP_DCD_ENDPOINT_MAX 9
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2021-07-21 13:21:58 +07:00
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2023-03-01 11:21:46 +07:00
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//--------------------------------------------------------------------+
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// Microchip
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//--------------------------------------------------------------------+
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2021-10-25 17:04:03 +07:00
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#elif TU_CHECK_MCU(OPT_MCU_SAMD21, OPT_MCU_SAMD51, OPT_MCU_SAME5X) || \
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TU_CHECK_MCU(OPT_MCU_SAMD11, OPT_MCU_SAML21, OPT_MCU_SAML22)
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2022-02-26 17:13:06 +07:00
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#define TUP_DCD_ENDPOINT_MAX 8
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2021-07-21 13:21:58 +07:00
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2021-10-25 17:04:03 +07:00
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#elif TU_CHECK_MCU(OPT_MCU_SAMG)
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2022-02-26 17:13:06 +07:00
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#define TUP_DCD_ENDPOINT_MAX 6
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2022-02-26 17:03:54 +07:00
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#define TUP_DCD_ENDPOINT_EXCLUSIVE_NUMBER
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2021-07-21 13:21:58 +07:00
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2021-10-25 17:04:03 +07:00
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#elif TU_CHECK_MCU(OPT_MCU_SAMX7X)
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2022-02-26 17:13:06 +07:00
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#define TUP_DCD_ENDPOINT_MAX 10
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2022-06-02 16:51:17 +07:00
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#define TUP_RHPORT_HIGHSPEED 1
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2022-02-26 17:03:54 +07:00
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#define TUP_DCD_ENDPOINT_EXCLUSIVE_NUMBER
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2021-07-22 00:28:37 +07:00
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2021-12-26 22:37:27 +01:00
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#elif TU_CHECK_MCU(OPT_MCU_PIC32MZ)
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2022-02-26 17:13:06 +07:00
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#define TUP_DCD_ENDPOINT_MAX 8
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2022-02-26 17:03:54 +07:00
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#define TUP_DCD_ENDPOINT_EXCLUSIVE_NUMBER
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2021-12-26 22:37:27 +01:00
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2022-10-06 03:45:51 +08:00
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#elif TU_CHECK_MCU(OPT_MCU_PIC32MX, OPT_MCU_PIC32MM, OPT_MCU_PIC32MK) || \
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TU_CHECK_MCU(OPT_MCU_PIC24, OPT_MCU_DSPIC33)
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#define TUP_DCD_ENDPOINT_MAX 16
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#define TUP_DCD_ENDPOINT_EXCLUSIVE_NUMBER
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2023-03-01 11:21:46 +07:00
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//--------------------------------------------------------------------+
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// ST
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//--------------------------------------------------------------------+
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2021-10-25 17:04:03 +07:00
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#elif TU_CHECK_MCU(OPT_MCU_STM32F0)
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2023-03-01 11:21:46 +07:00
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#define TUP_USBIP_FSDEV
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#define TUP_USBIP_FSDEV_STM32
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2022-02-26 17:13:06 +07:00
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#define TUP_DCD_ENDPOINT_MAX 8
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2021-07-21 13:21:58 +07:00
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2021-10-25 17:04:03 +07:00
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#elif TU_CHECK_MCU(OPT_MCU_STM32F1)
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2023-03-01 11:21:46 +07:00
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// - F102, F103 use fsdev
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// - F105, F107 use dwc2
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2021-10-24 23:24:46 +07:00
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#if defined (STM32F105x8) || defined (STM32F105xB) || defined (STM32F105xC) || \
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defined (STM32F107xB) || defined (STM32F107xC)
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2022-02-26 15:18:51 +07:00
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#define TUP_USBIP_DWC2
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2022-02-26 17:03:54 +07:00
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#define TUP_USBIP_DWC2_STM32
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2022-02-26 17:13:06 +07:00
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#define TUP_DCD_ENDPOINT_MAX 4
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2023-03-01 11:21:46 +07:00
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#elif defined(STM32F102x6) || defined(STM32F102xB) || \
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defined(STM32F103x6) || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG)
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#define TUP_USBIP_FSDEV
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#define TUP_USBIP_FSDEV_STM32
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2022-02-26 17:13:06 +07:00
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#define TUP_DCD_ENDPOINT_MAX 8
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2023-03-01 11:21:46 +07:00
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#else
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#error "Unsupported STM32F1 mcu"
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2021-10-24 23:24:46 +07:00
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#endif
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2021-10-25 17:04:03 +07:00
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#elif TU_CHECK_MCU(OPT_MCU_STM32F2)
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2022-02-26 15:18:51 +07:00
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#define TUP_USBIP_DWC2
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2022-02-26 17:03:54 +07:00
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#define TUP_USBIP_DWC2_STM32
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// FS has 4 ep, HS has 5 ep
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2022-02-26 17:13:06 +07:00
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#define TUP_DCD_ENDPOINT_MAX 6
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2021-10-24 23:24:46 +07:00
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2021-10-25 17:04:03 +07:00
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#elif TU_CHECK_MCU(OPT_MCU_STM32F3)
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2023-03-01 11:21:46 +07:00
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#define TUP_USBIP_FSDEV
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#define TUP_USBIP_FSDEV_STM32
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2022-02-26 17:13:06 +07:00
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#define TUP_DCD_ENDPOINT_MAX 8
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2021-10-24 23:24:46 +07:00
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2021-10-25 17:04:03 +07:00
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#elif TU_CHECK_MCU(OPT_MCU_STM32F4)
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2022-02-26 17:03:54 +07:00
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#define TUP_USBIP_DWC2
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#define TUP_USBIP_DWC2_STM32
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2021-10-24 23:24:46 +07:00
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// For most mcu, FS has 4, HS has 6. TODO 446/469/479 HS has 9
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2022-02-26 17:13:06 +07:00
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#define TUP_DCD_ENDPOINT_MAX 6
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2022-02-26 15:18:51 +07:00
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2022-02-26 17:03:54 +07:00
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#elif TU_CHECK_MCU(OPT_MCU_STM32F7)
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2022-02-26 15:18:51 +07:00
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#define TUP_USBIP_DWC2
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2022-02-26 17:03:54 +07:00
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#define TUP_USBIP_DWC2_STM32
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2021-07-21 13:21:58 +07:00
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// FS has 6, HS has 9
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2022-02-26 17:13:06 +07:00
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#define TUP_DCD_ENDPOINT_MAX 9
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2021-07-21 13:21:58 +07:00
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2022-02-26 17:34:29 +07:00
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// MCU with on-chip HS Phy
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#if defined(STM32F723xx) || defined(STM32F730xx) || defined(STM32F733xx)
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2022-06-02 16:51:17 +07:00
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#define TUP_RHPORT_HIGHSPEED 1 // Port0: FS, Port1: HS
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2022-02-26 17:34:29 +07:00
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#endif
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2021-10-25 17:04:03 +07:00
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#elif TU_CHECK_MCU(OPT_MCU_STM32H7)
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2022-02-26 15:18:51 +07:00
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#define TUP_USBIP_DWC2
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2022-02-26 17:03:54 +07:00
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#define TUP_USBIP_DWC2_STM32
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2022-02-26 17:13:06 +07:00
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#define TUP_DCD_ENDPOINT_MAX 9
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2021-10-24 23:24:46 +07:00
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2021-11-04 16:16:51 +07:00
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#elif TU_CHECK_MCU(OPT_MCU_STM32G4)
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2023-06-07 18:57:48 +07:00
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// Device controller
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2023-03-01 11:21:46 +07:00
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#define TUP_USBIP_FSDEV
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#define TUP_USBIP_FSDEV_STM32
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2023-06-07 18:57:48 +07:00
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// TypeC controller
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2023-06-07 15:10:40 +07:00
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#define TUP_USBIP_TYPEC_STM32
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2022-02-26 17:13:06 +07:00
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#define TUP_DCD_ENDPOINT_MAX 8
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2021-11-04 16:16:51 +07:00
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2023-06-07 18:57:48 +07:00
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#define TUP_TYPEC_RHPORTS_NUM 1
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2023-03-08 12:05:58 +01:00
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#elif TU_CHECK_MCU(OPT_MCU_STM32G0)
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#define TUP_USBIP_FSDEV
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#define TUP_USBIP_FSDEV_STM32
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#define TUP_DCD_ENDPOINT_MAX 8
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2021-10-25 17:04:03 +07:00
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#elif TU_CHECK_MCU(OPT_MCU_STM32L0, OPT_MCU_STM32L1)
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2023-03-01 11:21:46 +07:00
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#define TUP_USBIP_FSDEV
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#define TUP_USBIP_FSDEV_STM32
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2022-02-26 17:13:06 +07:00
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#define TUP_DCD_ENDPOINT_MAX 8
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2021-10-24 23:24:46 +07:00
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2021-10-25 17:04:03 +07:00
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#elif TU_CHECK_MCU(OPT_MCU_STM32L4)
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2023-03-01 11:21:46 +07:00
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// - L4x2, L4x3 use fsdev
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// - L4x4, L4x6, L4x7, L4x9 use dwc2
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2021-10-24 23:24:46 +07:00
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#if defined (STM32L475xx) || defined (STM32L476xx) || \
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defined (STM32L485xx) || defined (STM32L486xx) || defined (STM32L496xx) || \
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2021-11-02 13:52:30 +07:00
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defined (STM32L4A6xx) || defined (STM32L4P5xx) || defined (STM32L4Q5xx) || \
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2021-10-24 23:24:46 +07:00
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defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || \
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defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx)
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2022-02-26 15:18:51 +07:00
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#define TUP_USBIP_DWC2
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2022-02-26 17:03:54 +07:00
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#define TUP_USBIP_DWC2_STM32
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2022-02-26 17:13:06 +07:00
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#define TUP_DCD_ENDPOINT_MAX 6
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2023-03-01 11:21:46 +07:00
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#elif defined(STM32L412xx) || defined(STM32L422xx) || defined(STM32L432xx) || defined(STM32L433xx) || \
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defined(STM32L442xx) || defined(STM32L443xx) || defined(STM32L452xx) || defined(STM32L462xx)
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#define TUP_USBIP_FSDEV
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#define TUP_USBIP_FSDEV_STM32
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2022-02-26 17:13:06 +07:00
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#define TUP_DCD_ENDPOINT_MAX 8
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2023-03-01 11:21:46 +07:00
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#else
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#error "Unsupported STM32L4 mcu"
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2021-10-24 23:24:46 +07:00
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#endif
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2021-07-21 13:21:58 +07:00
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2022-03-05 17:09:04 +01:00
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#elif TU_CHECK_MCU(OPT_MCU_STM32WB)
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2023-03-01 11:21:46 +07:00
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#define TUP_USBIP_FSDEV
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#define TUP_USBIP_FSDEV_STM32
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2022-06-02 16:51:17 +07:00
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#define TUP_DCD_ENDPOINT_MAX 8
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2022-03-05 17:09:04 +01:00
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2022-10-13 17:37:28 +08:00
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#elif TU_CHECK_MCU(OPT_MCU_STM32U5)
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#define TUP_USBIP_DWC2
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#define TUP_USBIP_DWC2_STM32
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#define TUP_DCD_ENDPOINT_MAX 6
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2022-03-05 17:09:04 +01:00
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2023-04-03 13:56:16 +01:00
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#elif TU_CHECK_MCU(OPT_MCU_STM32L5)
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#define TUP_USBIP_FSDEV
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#define TUP_USBIP_FSDEV_STM32
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#define TUP_DCD_ENDPOINT_MAX 8
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2023-03-01 11:21:46 +07:00
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//--------------------------------------------------------------------+
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// Sony
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//--------------------------------------------------------------------+
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2021-10-25 17:04:03 +07:00
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#elif TU_CHECK_MCU(OPT_MCU_CXD56)
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2022-02-26 17:13:06 +07:00
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#define TUP_DCD_ENDPOINT_MAX 7
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2022-06-02 16:51:17 +07:00
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#define TUP_RHPORT_HIGHSPEED 1
|
2022-02-26 17:03:54 +07:00
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#define TUP_DCD_ENDPOINT_EXCLUSIVE_NUMBER
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2021-07-21 13:21:58 +07:00
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2023-03-01 11:21:46 +07:00
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//--------------------------------------------------------------------+
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// TI
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//--------------------------------------------------------------------+
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2021-11-08 16:41:08 +07:00
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#elif TU_CHECK_MCU(OPT_MCU_MSP430x5xx)
|
2022-02-26 17:13:06 +07:00
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#define TUP_DCD_ENDPOINT_MAX 8
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2021-11-08 16:41:08 +07:00
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2021-11-08 17:24:58 +07:00
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#elif TU_CHECK_MCU(OPT_MCU_MSP432E4, OPT_MCU_TM4C123, OPT_MCU_TM4C129)
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2022-02-26 17:13:06 +07:00
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#define TUP_DCD_ENDPOINT_MAX 8
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2021-07-21 13:21:58 +07:00
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2023-03-01 11:21:46 +07:00
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//--------------------------------------------------------------------+
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// ValentyUSB (Litex)
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//--------------------------------------------------------------------+
|
2021-10-25 17:04:03 +07:00
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#elif TU_CHECK_MCU(OPT_MCU_VALENTYUSB_EPTRI)
|
2022-02-26 17:13:06 +07:00
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#define TUP_DCD_ENDPOINT_MAX 16
|
2021-07-21 13:21:58 +07:00
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|
2023-03-01 11:21:46 +07:00
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//--------------------------------------------------------------------+
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// Nuvoton
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//--------------------------------------------------------------------+
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2021-10-25 17:04:03 +07:00
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#elif TU_CHECK_MCU(OPT_MCU_NUC121, OPT_MCU_NUC126)
|
2022-02-26 17:13:06 +07:00
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|
#define TUP_DCD_ENDPOINT_MAX 8
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2021-07-21 13:21:58 +07:00
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|
2021-10-25 17:04:03 +07:00
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#elif TU_CHECK_MCU(OPT_MCU_NUC120)
|
2022-02-26 17:13:06 +07:00
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|
#define TUP_DCD_ENDPOINT_MAX 6
|
2021-07-21 13:21:58 +07:00
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|
2021-10-25 17:04:03 +07:00
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#elif TU_CHECK_MCU(OPT_MCU_NUC505)
|
2022-02-26 17:13:06 +07:00
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#define TUP_DCD_ENDPOINT_MAX 12
|
2022-06-02 16:51:17 +07:00
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|
#define TUP_RHPORT_HIGHSPEED 1
|
2021-07-21 13:21:58 +07:00
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|
2023-03-01 11:21:46 +07:00
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//--------------------------------------------------------------------+
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// Espressif
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//--------------------------------------------------------------------+
|
2021-10-25 17:04:03 +07:00
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#elif TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3)
|
2022-02-26 17:13:06 +07:00
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|
|
#define TUP_USBIP_DWC2
|
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|
|
#define TUP_DCD_ENDPOINT_MAX 6
|
2021-07-21 13:21:58 +07:00
|
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|
2023-03-01 11:21:46 +07:00
|
|
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//--------------------------------------------------------------------+
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// Dialog
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|
//--------------------------------------------------------------------+
|
2021-10-25 17:04:03 +07:00
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#elif TU_CHECK_MCU(OPT_MCU_DA1469X)
|
2022-02-26 17:13:06 +07:00
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|
|
#define TUP_DCD_ENDPOINT_MAX 4
|
2021-07-21 13:21:58 +07:00
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|
2023-03-01 11:21:46 +07:00
|
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|
//--------------------------------------------------------------------+
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|
// Raspberry Pi
|
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//--------------------------------------------------------------------+
|
2021-10-25 17:04:03 +07:00
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#elif TU_CHECK_MCU(OPT_MCU_RP2040)
|
2022-02-26 17:13:06 +07:00
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|
|
#define TUP_DCD_ENDPOINT_MAX 16
|
2021-07-21 13:21:58 +07:00
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|
|
|
2022-06-02 16:51:17 +07:00
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|
|
#define TU_ATTR_FAST_FUNC __attribute__((section(".time_critical.tinyusb")))
|
2022-04-27 17:57:52 +07:00
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|
2023-03-01 11:21:46 +07:00
|
|
|
//--------------------------------------------------------------------+
|
|
|
|
// Silabs
|
|
|
|
//--------------------------------------------------------------------+
|
2021-10-30 20:42:55 +07:00
|
|
|
#elif TU_CHECK_MCU(OPT_MCU_EFM32GG)
|
2022-02-26 17:13:06 +07:00
|
|
|
#define TUP_USBIP_DWC2
|
|
|
|
#define TUP_DCD_ENDPOINT_MAX 7
|
2021-07-21 13:21:58 +07:00
|
|
|
|
2023-03-01 11:21:46 +07:00
|
|
|
//--------------------------------------------------------------------+
|
|
|
|
// Renesas
|
|
|
|
//--------------------------------------------------------------------+
|
2022-03-09 12:19:45 +00:00
|
|
|
#elif TU_CHECK_MCU(OPT_MCU_RX63X, OPT_MCU_RX65X, OPT_MCU_RX72N, OPT_MCU_RAXXX)
|
2023-07-05 17:13:01 +07:00
|
|
|
#define TUP_USBIP_RUSB2
|
2022-02-26 17:13:06 +07:00
|
|
|
#define TUP_DCD_ENDPOINT_MAX 10
|
2021-07-21 13:21:58 +07:00
|
|
|
|
2023-03-01 11:21:46 +07:00
|
|
|
//--------------------------------------------------------------------+
|
|
|
|
// GigaDevice
|
|
|
|
//--------------------------------------------------------------------+
|
2021-10-25 17:04:03 +07:00
|
|
|
#elif TU_CHECK_MCU(OPT_MCU_GD32VF103)
|
2022-02-26 17:13:06 +07:00
|
|
|
#define TUP_USBIP_DWC2
|
|
|
|
#define TUP_DCD_ENDPOINT_MAX 4
|
2021-08-07 09:01:01 +02:00
|
|
|
|
2023-03-01 11:21:46 +07:00
|
|
|
//--------------------------------------------------------------------+
|
|
|
|
// Broadcom
|
|
|
|
//--------------------------------------------------------------------+
|
2022-01-05 13:47:01 -08:00
|
|
|
#elif TU_CHECK_MCU(OPT_MCU_BCM2711, OPT_MCU_BCM2835, OPT_MCU_BCM2837)
|
2022-02-26 17:13:06 +07:00
|
|
|
#define TUP_USBIP_DWC2
|
|
|
|
#define TUP_DCD_ENDPOINT_MAX 8
|
2022-06-02 16:51:17 +07:00
|
|
|
#define TUP_RHPORT_HIGHSPEED 1
|
2021-09-17 16:51:34 -07:00
|
|
|
|
2023-03-01 11:21:46 +07:00
|
|
|
//--------------------------------------------------------------------+
|
|
|
|
// Infineon
|
|
|
|
//--------------------------------------------------------------------+
|
2021-11-05 11:40:53 +07:00
|
|
|
#elif TU_CHECK_MCU(OPT_MCU_XMC4000)
|
2022-02-26 17:13:06 +07:00
|
|
|
#define TUP_USBIP_DWC2
|
|
|
|
#define TUP_DCD_ENDPOINT_MAX 8
|
2021-11-05 11:40:53 +07:00
|
|
|
|
2023-03-01 11:21:46 +07:00
|
|
|
//--------------------------------------------------------------------+
|
|
|
|
// BridgeTek
|
|
|
|
//--------------------------------------------------------------------+
|
2021-12-08 09:34:29 +00:00
|
|
|
#elif TU_CHECK_MCU(OPT_MCU_FT90X)
|
2022-02-26 17:13:06 +07:00
|
|
|
#define TUP_DCD_ENDPOINT_MAX 8
|
2022-06-02 16:51:17 +07:00
|
|
|
#define TUP_RHPORT_HIGHSPEED 1
|
2021-10-05 13:54:47 +01:00
|
|
|
|
2021-12-08 09:34:29 +00:00
|
|
|
#elif TU_CHECK_MCU(OPT_MCU_FT93X)
|
2022-02-26 17:13:06 +07:00
|
|
|
#define TUP_DCD_ENDPOINT_MAX 16
|
2022-06-02 16:51:17 +07:00
|
|
|
#define TUP_RHPORT_HIGHSPEED 1
|
2021-10-05 13:54:47 +01:00
|
|
|
|
2023-03-01 11:21:46 +07:00
|
|
|
//--------------------------------------------------------------------+
|
|
|
|
// Allwinner
|
|
|
|
//--------------------------------------------------------------------+
|
2021-11-30 17:12:56 +08:00
|
|
|
#elif TU_CHECK_MCU(OPT_MCU_F1C100S)
|
2022-02-26 17:13:06 +07:00
|
|
|
#define TUP_DCD_ENDPOINT_MAX 4
|
2021-11-30 17:12:56 +08:00
|
|
|
|
2022-03-21 10:01:11 +10:30
|
|
|
//------------- WCH -------------//
|
2022-03-22 23:31:20 +10:30
|
|
|
#elif TU_CHECK_MCU(OPT_MCU_CH32V307)
|
2022-03-23 00:00:06 +10:30
|
|
|
#define TUP_DCD_ENDPOINT_MAX 16
|
2023-10-06 13:04:54 +03:00
|
|
|
#define TUP_RHPORT_HIGHSPEED 1
|
|
|
|
|
|
|
|
#elif TU_CHECK_MCU(OPT_MCU_CH32F20X)
|
|
|
|
#define TUP_DCD_ENDPOINT_MAX 16
|
2023-01-12 15:38:18 +07:00
|
|
|
#define TUP_RHPORT_HIGHSPEED 1
|
2022-02-25 22:45:05 +07:00
|
|
|
#endif
|
|
|
|
|
2023-08-27 23:45:34 +07:00
|
|
|
|
|
|
|
//--------------------------------------------------------------------+
|
|
|
|
// External USB controller
|
|
|
|
//--------------------------------------------------------------------+
|
|
|
|
|
2023-08-30 16:04:18 +07:00
|
|
|
#if defined(CFG_TUH_MAX3421) && CFG_TUH_MAX3421
|
2023-08-27 23:45:34 +07:00
|
|
|
#ifndef CFG_TUH_MAX3421_ENDPOINT_TOTAL
|
|
|
|
#define CFG_TUH_MAX3421_ENDPOINT_TOTAL (8 + 4*(CFG_TUH_DEVICE_MAX-1))
|
|
|
|
#endif
|
|
|
|
#endif
|
|
|
|
|
|
|
|
|
2022-02-25 22:45:05 +07:00
|
|
|
//--------------------------------------------------------------------+
|
|
|
|
// Default Values
|
|
|
|
//--------------------------------------------------------------------+
|
|
|
|
|
2022-12-15 18:03:01 +07:00
|
|
|
#ifndef TUP_MCU_MULTIPLE_CORE
|
|
|
|
#define TUP_MCU_MULTIPLE_CORE 0
|
|
|
|
#endif
|
|
|
|
|
2022-02-26 17:03:54 +07:00
|
|
|
#ifndef TUP_DCD_ENDPOINT_MAX
|
|
|
|
#warning "TUP_DCD_ENDPOINT_MAX is not defined for this MCU, default to 8"
|
2022-02-26 17:13:06 +07:00
|
|
|
#define TUP_DCD_ENDPOINT_MAX 8
|
2021-07-21 13:21:58 +07:00
|
|
|
#endif
|
|
|
|
|
2021-07-21 17:00:02 +07:00
|
|
|
// Default to fullspeed if not defined
|
2022-02-26 17:03:54 +07:00
|
|
|
#ifndef TUP_RHPORT_HIGHSPEED
|
2022-06-02 16:51:17 +07:00
|
|
|
#define TUP_RHPORT_HIGHSPEED 0
|
2022-02-25 13:00:05 +07:00
|
|
|
#endif
|
2021-07-21 17:00:02 +07:00
|
|
|
|
2022-04-27 17:57:52 +07:00
|
|
|
// fast function, normally mean placing function in SRAM
|
|
|
|
#ifndef TU_ATTR_FAST_FUNC
|
|
|
|
#define TU_ATTR_FAST_FUNC
|
|
|
|
#endif
|
|
|
|
|
2021-07-21 13:21:58 +07:00
|
|
|
#endif
|