42 lines
1.1 KiB
Makefile
42 lines
1.1 KiB
Makefile
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CFLAGS += \
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-mthumb \
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-mabi=aapcs \
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-mcpu=cortex-m4 \
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-nostdlib \
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-DCORE_M4 \
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-DCFG_TUSB_MCU=OPT_MCU_LPC40XX \
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-DCFG_TUSB_MEM_SECTION='__attribute__((section(".data.$$RAM2")))' \
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-D__USE_LPCOPEN
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# All source paths should be relative to the top level.
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LD_FILE = hw/bsp/ea4088qs/lpc4088.ld
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# TODO remove later
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SRC_C += src/portable/$(VENDOR)/$(CHIP_FAMILY)/hal_$(CHIP_FAMILY).c
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SRC_C += \
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hw/mcu/nxp/lpcopen/lpc_chip_40xx/src/chip_17xx_40xx.c \
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hw/mcu/nxp/lpcopen/lpc_chip_40xx/src/clock_17xx_40xx.c \
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hw/mcu/nxp/lpcopen/lpc_chip_40xx/src/gpio_17xx_40xx.c \
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hw/mcu/nxp/lpcopen/lpc_chip_40xx/src/iocon_17xx_40xx.c \
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hw/mcu/nxp/lpcopen/lpc_chip_40xx/src/sysctl_17xx_40xx.c \
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hw/mcu/nxp/lpcopen/lpc_chip_40xx/src/sysinit_17xx_40xx.c \
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hw/mcu/nxp/lpcopen/lpc_chip_40xx/src/uart_17xx_40xx.c
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INC += \
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$(TOP)/hw/mcu/nxp/lpcopen/lpc_chip_40xx/inc
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# For TinyUSB port source
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VENDOR = nxp
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CHIP_FAMILY = lpc17_40
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# For freeRTOS port source
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FREERTOS_PORT = ARM_CM3
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# For flash-jlink target
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JLINK_DEVICE = LPC4088
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JLINK_IF = swd
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# flash using jlink
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flash: flash-jlink
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