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										 |  |  | /*
 | 
					
						
							|  |  |  |  * The MIT License (MIT) | 
					
						
							|  |  |  |  * | 
					
						
							|  |  |  |  * Copyright (c) 2020 Raspberry Pi (Trading) Ltd. | 
					
						
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										 |  |  |  * Copyright (c) 2021 Ha Thach (tinyusb.org) for Double Buffered | 
					
						
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										 |  |  |  * | 
					
						
							|  |  |  |  * Permission is hereby granted, free of charge, to any person obtaining a copy | 
					
						
							|  |  |  |  * of this software and associated documentation files (the "Software"), to deal | 
					
						
							|  |  |  |  * in the Software without restriction, including without limitation the rights | 
					
						
							|  |  |  |  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | 
					
						
							|  |  |  |  * copies of the Software, and to permit persons to whom the Software is | 
					
						
							|  |  |  |  * furnished to do so, subject to the following conditions: | 
					
						
							|  |  |  |  * | 
					
						
							|  |  |  |  * The above copyright notice and this permission notice shall be included in | 
					
						
							|  |  |  |  * all copies or substantial portions of the Software. | 
					
						
							|  |  |  |  * | 
					
						
							|  |  |  |  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | 
					
						
							|  |  |  |  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | 
					
						
							|  |  |  |  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE | 
					
						
							|  |  |  |  * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | 
					
						
							|  |  |  |  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | 
					
						
							|  |  |  |  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | 
					
						
							|  |  |  |  * THE SOFTWARE. | 
					
						
							|  |  |  |  * | 
					
						
							|  |  |  |  * This file is part of the TinyUSB stack. | 
					
						
							|  |  |  |  */ | 
					
						
							|  |  |  | 
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										 |  |  | #include "tusb_option.h"
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							|  |  |  | 
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							|  |  |  | #if CFG_TUSB_MCU == OPT_MCU_RP2040
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							|  |  |  | 
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										 |  |  | #include <stdlib.h>
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							|  |  |  | #include "rp2040_usb.h"
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							|  |  |  | 
 | 
					
						
							|  |  |  | // Direction strings for debug
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							|  |  |  | const char *ep_dir_string[] = { | 
					
						
							|  |  |  |         "out", | 
					
						
							|  |  |  |         "in", | 
					
						
							|  |  |  | }; | 
					
						
							|  |  |  | 
 | 
					
						
							|  |  |  | static inline void _hw_endpoint_lock_update(struct hw_endpoint *ep, int delta) { | 
					
						
							|  |  |  |     // todo add critsec as necessary to prevent issues between worker and IRQ...
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							|  |  |  |     //  note that this is perhaps as simple as disabling IRQs because it would make
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							|  |  |  |     //  sense to have worker and IRQ on same core, however I think using critsec is about equivalent.
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							|  |  |  | } | 
					
						
							|  |  |  | 
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										 |  |  | static void _hw_endpoint_xfer_sync(struct hw_endpoint *ep); | 
					
						
							|  |  |  | static void _hw_endpoint_start_next_buffer(struct hw_endpoint *ep); | 
					
						
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										 |  |  | //--------------------------------------------------------------------+
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							|  |  |  | //
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							|  |  |  | //--------------------------------------------------------------------+
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							|  |  |  | 
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										 |  |  | void rp2040_usb_init(void) | 
					
						
							|  |  |  | { | 
					
						
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										 |  |  |   // Reset usb controller
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							|  |  |  |   reset_block(RESETS_RESET_USBCTRL_BITS); | 
					
						
							|  |  |  |   unreset_block_wait(RESETS_RESET_USBCTRL_BITS); | 
					
						
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										 |  |  |   // Clear any previous state just in case
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							|  |  |  |   memset(usb_hw, 0, sizeof(*usb_hw)); | 
					
						
							|  |  |  |   memset(usb_dpram, 0, sizeof(*usb_dpram)); | 
					
						
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										 |  |  |   // Mux the controller to the onboard usb phy
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										 |  |  |   usb_hw->muxing = USB_USB_MUXING_TO_PHY_BITS | USB_USB_MUXING_SOFTCON_BITS; | 
					
						
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										 |  |  | } | 
					
						
							|  |  |  | 
 | 
					
						
							|  |  |  | void hw_endpoint_reset_transfer(struct hw_endpoint *ep) | 
					
						
							|  |  |  | { | 
					
						
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										 |  |  |   ep->stalled = false; | 
					
						
							|  |  |  |   ep->active = false; | 
					
						
							|  |  |  |   ep->remaining_len = 0; | 
					
						
							|  |  |  |   ep->xferred_len = 0; | 
					
						
							|  |  |  |   ep->user_buf = 0; | 
					
						
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										 |  |  | } | 
					
						
							|  |  |  | 
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							|  |  |  | void _hw_endpoint_buffer_control_update32(struct hw_endpoint *ep, uint32_t and_mask, uint32_t or_mask) { | 
					
						
							|  |  |  |     uint32_t value = 0; | 
					
						
							|  |  |  |     if (and_mask) { | 
					
						
							|  |  |  |         value = *ep->buffer_control & and_mask; | 
					
						
							|  |  |  |     } | 
					
						
							|  |  |  |     if (or_mask) { | 
					
						
							|  |  |  |         value |= or_mask; | 
					
						
							|  |  |  |         if (or_mask & USB_BUF_CTRL_AVAIL) { | 
					
						
							|  |  |  |             if (*ep->buffer_control & USB_BUF_CTRL_AVAIL) { | 
					
						
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										 |  |  |                 panic("ep %d %s was already available", tu_edpt_number(ep->ep_addr), ep_dir_string[tu_edpt_dir(ep->ep_addr)]); | 
					
						
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										 |  |  |             } | 
					
						
							|  |  |  |             *ep->buffer_control = value & ~USB_BUF_CTRL_AVAIL; | 
					
						
							|  |  |  |             // 12 cycle delay.. (should be good for 48*12Mhz = 576Mhz)
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							|  |  |  |             // Don't need delay in host mode as host is in charge
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										 |  |  | #if !TUSB_OPT_HOST_ENABLED
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										 |  |  |             __asm volatile ( | 
					
						
							|  |  |  |                     "b 1f\n" | 
					
						
							|  |  |  |                     "1: b 1f\n" | 
					
						
							|  |  |  |                     "1: b 1f\n" | 
					
						
							|  |  |  |                     "1: b 1f\n" | 
					
						
							|  |  |  |                     "1: b 1f\n" | 
					
						
							|  |  |  |                     "1: b 1f\n" | 
					
						
							|  |  |  |                     "1:\n" | 
					
						
							|  |  |  |                     : : : "memory"); | 
					
						
							|  |  |  | #endif
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							|  |  |  |         } | 
					
						
							|  |  |  |     } | 
					
						
							|  |  |  |     *ep->buffer_control = value; | 
					
						
							|  |  |  | } | 
					
						
							|  |  |  | 
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										 |  |  | // prepare buffer, return buffer control
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							|  |  |  | static uint32_t prepare_ep_buffer(struct hw_endpoint *ep, uint8_t buf_id) | 
					
						
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										 |  |  | { | 
					
						
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										 |  |  |   uint16_t const buflen = tu_min16(ep->remaining_len, ep->wMaxPacketSize); | 
					
						
							|  |  |  |   ep->remaining_len -= buflen; | 
					
						
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										 |  |  |   uint32_t buf_ctrl = buflen | USB_BUF_CTRL_AVAIL; | 
					
						
							|  |  |  | 
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							|  |  |  |   // PID
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							|  |  |  |   buf_ctrl |= ep->next_pid ? USB_BUF_CTRL_DATA1_PID : USB_BUF_CTRL_DATA0_PID; | 
					
						
							|  |  |  |   ep->next_pid ^= 1u; | 
					
						
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										 |  |  | 
 | 
					
						
							|  |  |  |   if ( !ep->rx ) | 
					
						
							|  |  |  |   { | 
					
						
							|  |  |  |     // Copy data from user buffer to hw buffer
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										 |  |  |     memcpy(ep->hw_data_buf + buf_id*64, ep->user_buf, buflen); | 
					
						
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										 |  |  |     ep->user_buf += buflen; | 
					
						
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										 |  |  | 
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							|  |  |  |     // Mark as full
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							|  |  |  |     buf_ctrl |= USB_BUF_CTRL_FULL; | 
					
						
							|  |  |  |   } | 
					
						
							|  |  |  | 
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										 |  |  |   // Is this the last buffer? Only really matters for host mode. Will trigger
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							|  |  |  |   // the trans complete irq but also stop it polling. We only really care about
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							|  |  |  |   // trans complete for setup packets being sent
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							|  |  |  |   if (ep->remaining_len == 0) | 
					
						
							|  |  |  |   { | 
					
						
							|  |  |  |     buf_ctrl |= USB_BUF_CTRL_LAST; | 
					
						
							|  |  |  |   } | 
					
						
							|  |  |  | 
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							|  |  |  |   if (buf_id) buf_ctrl = buf_ctrl << 16; | 
					
						
							|  |  |  | 
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							|  |  |  |   return buf_ctrl; | 
					
						
							|  |  |  | } | 
					
						
							|  |  |  | 
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							|  |  |  | // Prepare buffer control register value
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										 |  |  | static void _hw_endpoint_start_next_buffer(struct hw_endpoint *ep) | 
					
						
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										 |  |  | { | 
					
						
							|  |  |  |   uint32_t ep_ctrl = *ep->endpoint_control; | 
					
						
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										 |  |  |   // always compute and start with buffer 0
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							|  |  |  |   uint32_t buf_ctrl = prepare_ep_buffer(ep, 0) | USB_BUF_CTRL_SEL; | 
					
						
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										 |  |  | 
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										 |  |  |   // For now: skip double buffered for Device mode, OUT endpoint since
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							|  |  |  |   // host could send < 64 bytes and cause short packet on buffer0
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							|  |  |  |   // NOTE this could happen to Host mode IN endpoint
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							|  |  |  |   bool const force_single = !(usb_hw->main_ctrl & USB_MAIN_CTRL_HOST_NDEVICE_BITS) && !tu_edpt_dir(ep->ep_addr); | 
					
						
							|  |  |  | 
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							|  |  |  |   if(ep->remaining_len && !force_single) | 
					
						
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										 |  |  |   { | 
					
						
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										 |  |  |     // Use buffer 1 (double buffered) if there is still data
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							|  |  |  |     // TODO: Isochronous for buffer1 bit-field is different than CBI (control bulk, interrupt)
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							|  |  |  | 
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										 |  |  |     buf_ctrl |= prepare_ep_buffer(ep, 1); | 
					
						
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										 |  |  |     // Set endpoint control double buffered bit if needed
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							|  |  |  |     ep_ctrl &= ~EP_CTRL_INTERRUPT_PER_BUFFER; | 
					
						
							|  |  |  |     ep_ctrl |= EP_CTRL_DOUBLE_BUFFERED_BITS | EP_CTRL_INTERRUPT_PER_DOUBLE_BUFFER; | 
					
						
							|  |  |  |   }else | 
					
						
							|  |  |  |   { | 
					
						
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										 |  |  |     // Single buffered since 1 is enough
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										 |  |  |     ep_ctrl &= ~(EP_CTRL_DOUBLE_BUFFERED_BITS | EP_CTRL_INTERRUPT_PER_DOUBLE_BUFFER); | 
					
						
							|  |  |  |     ep_ctrl |= EP_CTRL_INTERRUPT_PER_BUFFER; | 
					
						
							|  |  |  |   } | 
					
						
							|  |  |  | 
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							|  |  |  |   *ep->endpoint_control = ep_ctrl; | 
					
						
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										 |  |  | 
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										 |  |  |   TU_LOG(3, "Prepare Buffer Control:\r\n"); | 
					
						
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										 |  |  |   print_bufctrl32(buf_ctrl); | 
					
						
							|  |  |  | 
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							|  |  |  |   // Finally, write to buffer_control which will trigger the transfer
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							|  |  |  |   // the next time the controller polls this dpram address
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							|  |  |  |   _hw_endpoint_buffer_control_set_value32(ep, buf_ctrl); | 
					
						
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										 |  |  | } | 
					
						
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										 |  |  | void hw_endpoint_xfer_start(struct hw_endpoint *ep, uint8_t *buffer, uint16_t total_len) | 
					
						
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										 |  |  | { | 
					
						
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										 |  |  |   _hw_endpoint_lock_update(ep, 1); | 
					
						
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										 |  |  |   if ( ep->active ) | 
					
						
							|  |  |  |   { | 
					
						
							|  |  |  |     // TODO: Is this acceptable for interrupt packets?
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										 |  |  |     TU_LOG(1, "WARN: starting new transfer on already active ep %d %s\n", tu_edpt_number(ep->ep_addr), | 
					
						
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										 |  |  |               ep_dir_string[tu_edpt_dir(ep->ep_addr)]); | 
					
						
							|  |  |  | 
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							|  |  |  |     hw_endpoint_reset_transfer(ep); | 
					
						
							|  |  |  |   } | 
					
						
							|  |  |  | 
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							|  |  |  |   // Fill in info now that we're kicking off the hw
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										 |  |  |   ep->remaining_len = total_len; | 
					
						
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										 |  |  |   ep->xferred_len   = 0; | 
					
						
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										 |  |  |   ep->active        = true; | 
					
						
							|  |  |  |   ep->user_buf      = buffer; | 
					
						
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										 |  |  | 
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							|  |  |  |   _hw_endpoint_start_next_buffer(ep); | 
					
						
							|  |  |  |   _hw_endpoint_lock_update(ep, -1); | 
					
						
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										 |  |  | } | 
					
						
							|  |  |  | 
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										 |  |  | // sync endpoint buffer and return transferred bytes
 | 
					
						
							|  |  |  | static uint16_t sync_ep_buffer(struct hw_endpoint *ep, uint8_t buf_id) | 
					
						
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										 |  |  | { | 
					
						
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										 |  |  |   uint32_t buf_ctrl = _hw_endpoint_buffer_control_get_value32(ep); | 
					
						
							|  |  |  |   if (buf_id)  buf_ctrl = buf_ctrl >> 16; | 
					
						
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										 |  |  | 
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										 |  |  |   uint16_t xferred_bytes = buf_ctrl & USB_BUF_CTRL_LEN_MASK; | 
					
						
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										 |  |  | 
 | 
					
						
							|  |  |  |   if ( !ep->rx ) | 
					
						
							|  |  |  |   { | 
					
						
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										 |  |  |     // We are continuing a transfer here. If we are TX, we have successfully
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							|  |  |  |     // sent some data can increase the length we have sent
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										 |  |  |     assert(!(buf_ctrl & USB_BUF_CTRL_FULL)); | 
					
						
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										 |  |  | 
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										 |  |  |     ep->xferred_len += xferred_bytes; | 
					
						
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										 |  |  |   }else | 
					
						
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										 |  |  |   { | 
					
						
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										 |  |  |     // If we have received some data, so can increase the length
 | 
					
						
							|  |  |  |     // we have received AFTER we have copied it to the user buffer at the appropriate offset
 | 
					
						
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										 |  |  |     assert(buf_ctrl & USB_BUF_CTRL_FULL); | 
					
						
							|  |  |  | 
 | 
					
						
							| 
									
										
										
										
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										 |  |  |     memcpy(ep->user_buf, ep->hw_data_buf + buf_id*64, xferred_bytes); | 
					
						
							|  |  |  |     ep->xferred_len += xferred_bytes; | 
					
						
							|  |  |  |     ep->user_buf += xferred_bytes; | 
					
						
							| 
									
										
										
										
											2021-06-11 17:05:49 +07:00
										 |  |  |   } | 
					
						
							|  |  |  | 
 | 
					
						
							| 
									
										
										
										
											2021-06-11 17:34:51 +07:00
										 |  |  |   // Short packet
 | 
					
						
							|  |  |  |   if (xferred_bytes < ep->wMaxPacketSize) | 
					
						
							| 
									
										
										
										
											2021-06-11 17:05:49 +07:00
										 |  |  |   { | 
					
						
							| 
									
										
										
										
											2021-06-13 18:30:26 +07:00
										 |  |  |     pico_trace("Short rx transfer on buffer %d with %u bytes\n", buf_id, xferred_bytes); | 
					
						
							| 
									
										
										
										
											2021-06-11 17:05:49 +07:00
										 |  |  |     // Reduce total length as this is last packet
 | 
					
						
							| 
									
										
										
										
											2021-06-11 17:58:29 +07:00
										 |  |  |     ep->remaining_len = 0; | 
					
						
							| 
									
										
										
										
											2021-06-11 17:05:49 +07:00
										 |  |  |   } | 
					
						
							| 
									
										
										
										
											2021-06-13 18:30:26 +07:00
										 |  |  | 
 | 
					
						
							|  |  |  |   return xferred_bytes; | 
					
						
							| 
									
										
										
										
											2021-01-19 19:52:07 -06:00
										 |  |  | } | 
					
						
							|  |  |  | 
 | 
					
						
							| 
									
										
										
										
											2021-06-11 18:26:41 +07:00
										 |  |  | static void _hw_endpoint_xfer_sync (struct hw_endpoint *ep) | 
					
						
							| 
									
										
										
										
											2021-06-11 17:34:51 +07:00
										 |  |  | { | 
					
						
							|  |  |  |   // Update hw endpoint struct with info from hardware
 | 
					
						
							|  |  |  |   // after a buff status interrupt
 | 
					
						
							|  |  |  | 
 | 
					
						
							| 
									
										
										
										
											2021-06-13 18:30:26 +07:00
										 |  |  |   uint32_t buf_ctrl = _hw_endpoint_buffer_control_get_value32(ep); | 
					
						
							|  |  |  |   TU_LOG(3, "_hw_endpoint_xfer_sync:\r\n"); | 
					
						
							|  |  |  |   print_bufctrl32(buf_ctrl); | 
					
						
							|  |  |  | 
 | 
					
						
							| 
									
										
										
										
											2021-06-11 17:34:51 +07:00
										 |  |  |   // always sync buffer 0
 | 
					
						
							| 
									
										
										
										
											2021-06-13 18:30:26 +07:00
										 |  |  |   uint16_t buf0_bytes = sync_ep_buffer(ep, 0); | 
					
						
							| 
									
										
										
										
											2021-06-11 17:34:51 +07:00
										 |  |  | 
 | 
					
						
							| 
									
										
										
										
											2021-06-17 01:55:35 +07:00
										 |  |  |   // sync buffer 1 if double buffered
 | 
					
						
							|  |  |  |   if ( (*ep->endpoint_control) & EP_CTRL_DOUBLE_BUFFERED_BITS ) | 
					
						
							| 
									
										
										
										
											2021-06-11 17:34:51 +07:00
										 |  |  |   { | 
					
						
							| 
									
										
										
										
											2021-06-17 01:55:35 +07:00
										 |  |  |     if (buf0_bytes == ep->wMaxPacketSize) | 
					
						
							|  |  |  |     { | 
					
						
							|  |  |  |       // sync buffer 1 if not short packet
 | 
					
						
							|  |  |  |       sync_ep_buffer(ep, 1); | 
					
						
							|  |  |  |     }else | 
					
						
							|  |  |  |     { | 
					
						
							|  |  |  |       // short packet on buffer 0
 | 
					
						
							|  |  |  |       // TODO couldn't figure out how to handle this case which happen with net_lwip_webserver example
 | 
					
						
							|  |  |  |       // At this time (currently trigger per 2 buffer), the buffer1 is probably filled with data from
 | 
					
						
							|  |  |  |       // the next transfer (not current one). For now we disable double buffered for device OUT
 | 
					
						
							|  |  |  |       // NOTE this could happen to Host IN
 | 
					
						
							|  |  |  | #if 0
 | 
					
						
							|  |  |  |       uint8_t const ep_num = tu_edpt_number(ep->ep_addr); | 
					
						
							|  |  |  |       uint8_t const dir =  (uint8_t) tu_edpt_dir(ep->ep_addr); | 
					
						
							|  |  |  |       uint8_t const ep_id = 2*ep_num + (dir ? 0 : 1); | 
					
						
							|  |  |  | 
 | 
					
						
							|  |  |  |       // abort queued transfer on buffer 1
 | 
					
						
							|  |  |  |       usb_hw->abort |= TU_BIT(ep_id); | 
					
						
							|  |  |  | 
 | 
					
						
							|  |  |  |       while ( !(usb_hw->abort_done & TU_BIT(ep_id)) ) {} | 
					
						
							|  |  |  | 
 | 
					
						
							|  |  |  |       uint32_t ep_ctrl = *ep->endpoint_control; | 
					
						
							|  |  |  |       ep_ctrl &= ~(EP_CTRL_DOUBLE_BUFFERED_BITS | EP_CTRL_INTERRUPT_PER_DOUBLE_BUFFER); | 
					
						
							|  |  |  |       ep_ctrl |= EP_CTRL_INTERRUPT_PER_BUFFER; | 
					
						
							|  |  |  | 
 | 
					
						
							|  |  |  |       _hw_endpoint_buffer_control_set_value32(ep, 0); | 
					
						
							|  |  |  | 
 | 
					
						
							|  |  |  |       usb_hw->abort &= ~TU_BIT(ep_id); | 
					
						
							|  |  |  | 
 | 
					
						
							|  |  |  |       TU_LOG(3, "----SHORT PACKET buffer0 on EP %02X:\r\n", ep->ep_addr); | 
					
						
							|  |  |  |       print_bufctrl32(buf_ctrl); | 
					
						
							|  |  |  | #endif
 | 
					
						
							|  |  |  |     } | 
					
						
							| 
									
										
										
										
											2021-06-11 17:34:51 +07:00
										 |  |  |   } | 
					
						
							|  |  |  | } | 
					
						
							|  |  |  | 
 | 
					
						
							| 
									
										
										
										
											2021-01-19 19:52:07 -06:00
										 |  |  | // Returns true if transfer is complete
 | 
					
						
							| 
									
										
										
										
											2021-06-11 17:34:51 +07:00
										 |  |  | bool hw_endpoint_xfer_continue(struct hw_endpoint *ep) | 
					
						
							| 
									
										
										
										
											2021-01-19 19:52:07 -06:00
										 |  |  | { | 
					
						
							| 
									
										
										
										
											2021-06-11 18:14:11 +07:00
										 |  |  |   _hw_endpoint_lock_update(ep, 1); | 
					
						
							|  |  |  |   // Part way through a transfer
 | 
					
						
							|  |  |  |   if (!ep->active) | 
					
						
							|  |  |  |   { | 
					
						
							|  |  |  |     panic("Can't continue xfer on inactive ep %d %s", tu_edpt_number(ep->ep_addr), ep_dir_string); | 
					
						
							|  |  |  |   } | 
					
						
							| 
									
										
										
										
											2021-01-19 19:52:07 -06:00
										 |  |  | 
 | 
					
						
							| 
									
										
										
										
											2021-06-11 18:14:11 +07:00
										 |  |  |   // Update EP struct from hardware state
 | 
					
						
							|  |  |  |   _hw_endpoint_xfer_sync(ep); | 
					
						
							| 
									
										
										
										
											2021-01-19 19:52:07 -06:00
										 |  |  | 
 | 
					
						
							| 
									
										
										
										
											2021-06-11 18:14:11 +07:00
										 |  |  |   // Now we have synced our state with the hardware. Is there more data to transfer?
 | 
					
						
							|  |  |  |   // If we are done then notify tinyusb
 | 
					
						
							|  |  |  |   if (ep->remaining_len == 0) | 
					
						
							|  |  |  |   { | 
					
						
							|  |  |  |     pico_trace("Completed transfer of %d bytes on ep %d %s\n", | 
					
						
							|  |  |  |                ep->xferred_len, tu_edpt_number(ep->ep_addr), ep_dir_string[tu_edpt_dir(ep->ep_addr)]); | 
					
						
							|  |  |  |     // Notify caller we are done so it can notify the tinyusb stack
 | 
					
						
							| 
									
										
										
										
											2021-01-19 19:52:07 -06:00
										 |  |  |     _hw_endpoint_lock_update(ep, -1); | 
					
						
							| 
									
										
										
										
											2021-06-11 18:14:11 +07:00
										 |  |  |     return true; | 
					
						
							|  |  |  |   } | 
					
						
							|  |  |  |   else | 
					
						
							|  |  |  |   { | 
					
						
							|  |  |  |     _hw_endpoint_start_next_buffer(ep); | 
					
						
							|  |  |  |   } | 
					
						
							|  |  |  | 
 | 
					
						
							|  |  |  |   _hw_endpoint_lock_update(ep, -1); | 
					
						
							|  |  |  |   // More work to do
 | 
					
						
							|  |  |  |   return false; | 
					
						
							| 
									
										
										
										
											2021-01-19 19:52:07 -06:00
										 |  |  | } | 
					
						
							|  |  |  | 
 | 
					
						
							| 
									
										
										
										
											2021-01-27 13:04:38 +07:00
										 |  |  | #endif
 |