| 
									
										
										
										
											2024-12-27 09:11:09 +07:00
										 |  |  | 
 | 
					
						
							|  |  |  | /* metadata:
 | 
					
						
							|  |  |  |    name: STM32 F207 Nucleo | 
					
						
							|  |  |  |    url: https://www.st.com/en/evaluation-tools/nucleo-f207zg.html
 | 
					
						
							|  |  |  | */ | 
					
						
							|  |  |  | 
 | 
					
						
							| 
									
										
										
										
											2024-04-23 12:04:08 +07:00
										 |  |  | #ifndef BOARD_H
 | 
					
						
							|  |  |  | #define BOARD_H
 | 
					
						
							|  |  |  | 
 | 
					
						
							|  |  |  | #define LED_PORT              GPIOB
 | 
					
						
							|  |  |  | #define LED_PIN               GPIO_PIN_14
 | 
					
						
							|  |  |  | #define LED_STATE_ON          1
 | 
					
						
							|  |  |  | 
 | 
					
						
							|  |  |  | #define BUTTON_PORT           GPIOC
 | 
					
						
							|  |  |  | #define BUTTON_PIN            GPIO_PIN_13
 | 
					
						
							|  |  |  | #define BUTTON_STATE_ACTIVE   1
 | 
					
						
							|  |  |  | 
 | 
					
						
							|  |  |  | 
 | 
					
						
							|  |  |  | /**
 | 
					
						
							|  |  |  |   * @brief  System Clock Configuration | 
					
						
							|  |  |  |   *         The system Clock is configured as follow : | 
					
						
							|  |  |  |   *            System Clock source            = PLL (HSE) | 
					
						
							|  |  |  |   *            SYSCLK(Hz)                     = 120000000 | 
					
						
							|  |  |  |   *            HCLK(Hz)                       = 120000000 | 
					
						
							|  |  |  |   *            AHB Prescaler                  = 1 | 
					
						
							|  |  |  |   *            APB1 Prescaler                 = 4 | 
					
						
							|  |  |  |   *            APB2 Prescaler                 = 2 | 
					
						
							|  |  |  |   *            HSE Frequency(Hz)              = 8000000 | 
					
						
							|  |  |  |   *            PLL_M                          = HSE_VALUE/1000000 | 
					
						
							|  |  |  |   *            PLL_N                          = 240 | 
					
						
							|  |  |  |   *            PLL_P                          = 2 | 
					
						
							|  |  |  |   *            PLL_Q                          = 5 | 
					
						
							|  |  |  |   *            VDD(V)                         = 3.3 | 
					
						
							|  |  |  |   *            Flash Latency(WS)              = 3 | 
					
						
							|  |  |  |   * @param  None | 
					
						
							|  |  |  |   * @retval None | 
					
						
							|  |  |  |   */ | 
					
						
							|  |  |  | static inline void SystemClock_Config(void) { | 
					
						
							|  |  |  |   RCC_ClkInitTypeDef RCC_ClkInitStruct; | 
					
						
							|  |  |  |   RCC_OscInitTypeDef RCC_OscInitStruct; | 
					
						
							|  |  |  | 
 | 
					
						
							|  |  |  |   /* Enable HSE Oscillator and activate PLL with HSE as source */ | 
					
						
							|  |  |  |   RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; | 
					
						
							|  |  |  |   RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS; | 
					
						
							|  |  |  |   RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; | 
					
						
							|  |  |  |   RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; | 
					
						
							|  |  |  |   RCC_OscInitStruct.PLL.PLLM = HSE_VALUE / 1000000; | 
					
						
							|  |  |  |   RCC_OscInitStruct.PLL.PLLN = 240; | 
					
						
							|  |  |  |   RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; | 
					
						
							|  |  |  |   RCC_OscInitStruct.PLL.PLLQ = 5; | 
					
						
							|  |  |  |   HAL_RCC_OscConfig(&RCC_OscInitStruct); | 
					
						
							|  |  |  | 
 | 
					
						
							|  |  |  |   /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2
 | 
					
						
							|  |  |  |      clocks dividers */ | 
					
						
							|  |  |  |   RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2); | 
					
						
							|  |  |  |   RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; | 
					
						
							|  |  |  |   RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; | 
					
						
							|  |  |  |   RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; | 
					
						
							|  |  |  |   RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; | 
					
						
							|  |  |  |   HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3); | 
					
						
							|  |  |  | } | 
					
						
							|  |  |  | 
 | 
					
						
							|  |  |  | #endif
 |