Merge branch 'master' into renesas_ra_hs_rebased

2023-07-03 13:09:43 +07:00
parent 2b735ee8f5 f1e006d09b
commit 04b1a67898
371 changed files with 11937 additions and 7837 deletions
--- a/tools/build_cmake.py
+++ b/tools/build_cmake.py
@@ -13,8 +13,6 @@ SKIPPED = "\033[33mskipped\033[0m"

 build_separator = '-' * 106

-toolchain_iar = '-DTOOLCHAIN=iar'
-
 def filter_with_input(mylist):
    if len(sys.argv) > 1:
        input_args = list(set(mylist).intersection(sys.argv))
@@ -22,7 +20,7 @@ def filter_with_input(mylist):
            mylist[:] = input_args


-def build_family(family, toolchain_option):
+def build_family(family, cmake_option):
    all_boards = []
    for entry in os.scandir("hw/bsp/{}/boards".format(family)):
        if entry.is_dir() and entry.name != 'pico_sdk':
@@ -38,7 +36,7 @@ def build_family(family, toolchain_option):

        # Generate build
        r = subprocess.run(f"cmake examples -B {build_dir} -G \"Ninja\" -DFAMILY={family} -DBOARD"
-                           f"={board} {toolchain_option}", shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT)
+                           f"={board} {cmake_option}", shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT)

        # Build
        if r.returncode == 0:
@@ -74,9 +72,10 @@ def build_family(family, toolchain_option):


 if __name__ == '__main__':
-    # IAR CC
-    if toolchain_iar not in sys.argv:
-        toolchain_iar = ''
+    cmake_options = ''
+    for a in sys.argv[1:]:
+        if a.startswith('-'):
+            cmake_options += ' ' + a

    # If family are not specified in arguments, build all supported
    all_families = []
@@ -93,7 +92,7 @@ if __name__ == '__main__':
    # succeeded, failed, skipped
    total_result = [0, 0, 0]
    for family in all_families:
-        fret = build_family(family, toolchain_iar)
+        fret = build_family(family, cmake_options)
        if len(fret) == len(total_result):
            total_result = [total_result[i] + fret[i] for i in range(len(fret))]

--- a/tools/build_family.py
+++ b/tools/build_family.py
@@ -11,7 +11,7 @@ SKIPPED = "\033[33mskipped\033[0m"

 build_separator = '-' * 106

-make_iar_option = 'CC=iccarm'
+make_iar_option = 'TOOLCHAIN=iar'

 def filter_with_input(mylist):
    if len(sys.argv) > 1:
--- a/tools/build_utils.py
+++ b/tools/build_utils.py
@@ -30,13 +30,8 @@ def skip_example(example, board):
        family_dir = board_dir.parent.parent
        family = family_dir.name

-        # family CMake
-        family_mk = family_dir / "family.cmake"
-
        # family.mk
-        if not family_mk.exists():
-            family_mk = family_dir / "family.mk"
-
+        family_mk = family_dir / "family.mk"
        mk_contents = family_mk.read_text()

    # Find the mcu, first in family mk then board mk
--- a/tools/cmake/cpu/cortex-m0.cmake
+++ b/tools/cmake/cpu/cortex-m0.cmake
@@ -0,0 +1,17 @@
+if (TOOLCHAIN STREQUAL "gcc")
+  set(TOOLCHAIN_COMMON_FLAGS
+    -mthumb
+    -mcpu=cortex-m0plus
+    -mfloat-abi=soft
+    )
+
+  set(FREERTOS_PORT GCC_ARM_CM0 CACHE INTERNAL "")
+
+elseif (TOOLCHAIN STREQUAL "iar")
+  set(TOOLCHAIN_COMMON_FLAGS
+    --cpu cortex-m0
+    )
+
+  set(FREERTOS_PORT IAR_ARM_CM0 CACHE INTERNAL "")
+
+endif ()
--- a/tools/cmake/cpu/cortex-m4.cmake
+++ b/tools/cmake/cpu/cortex-m4.cmake
@@ -6,7 +6,9 @@ if (TOOLCHAIN STREQUAL "gcc")
    -mfpu=fpv4-sp-d16
    )

-  set(FREERTOS_PORT GCC_ARM_CM4F CACHE INTERNAL "")
+  if (NOT DEFINED FREERTOS_PORT)
+    set(FREERTOS_PORT GCC_ARM_CM4F CACHE INTERNAL "")
+  endif ()

 elseif (TOOLCHAIN STREQUAL "iar")
  set(TOOLCHAIN_COMMON_FLAGS
@@ -14,6 +16,8 @@ elseif (TOOLCHAIN STREQUAL "iar")
    --fpu VFPv4
    )

-  set(FREERTOS_PORT IAR_ARM_CM4F CACHE INTERNAL "")
+  if (NOT DEFINED FREERTOS_PORT)
+    set(FREERTOS_PORT IAR_ARM_CM4F CACHE INTERNAL "")
+  endif ()

 endif ()
--- a/tools/cmake/toolchain/arm_gcc.cmake
+++ b/tools/cmake/toolchain/arm_gcc.cmake
@@ -35,32 +35,6 @@ set(TOOLCHAIN_EXE_LINKER_FLAGS
  -Wl,--cref
  )

-set(TOOLCHAIN_WARNING_FLAGS
-  -Wall
-  -Wextra
-  -Werror
-  -Wfatal-errors
-  -Wdouble-promotion
-  -Wstrict-prototypes
-  -Wstrict-overflow
-  -Werror-implicit-function-declaration
-  -Wfloat-equal
-  -Wundef
-  -Wshadow
-  -Wwrite-strings
-  -Wsign-compare
-  -Wmissing-format-attribute
-  -Wunreachable-code
-  -Wcast-align
-  -Wcast-function-type
-  -Wcast-qual
-  -Wnull-dereference
-  -Wuninitialized
-  -Wunused
-  -Wreturn-type
-  -Wredundant-decls
-  )
-
 include(${CMAKE_CURRENT_LIST_DIR}/set_flags.cmake)

 # try_compile is cmake test compiling its own example,
--- a/tools/cmake/toolchain/arm_iar.cmake
+++ b/tools/cmake/toolchain/arm_iar.cmake
@@ -28,7 +28,4 @@ list(APPEND TOOLCHAIN_COMMON_FLAGS
 list(APPEND TOOLCHAIN_EXE_LINKER_FLAGS
  )

-list(APPEND TOOLCHAIN_WARNING_FLAGS
-  )
-
 include(${CMAKE_CURRENT_LIST_DIR}/set_flags.cmake)
--- a/tools/get_deps.py
+++ b/tools/get_deps.py
@@ -52,12 +52,9 @@ deps_optional = {
                           'lpc11 lpc13 lpc15 lpc17 lpc18 lpc40 lpc43'],
    'hw/mcu/nxp/mcux-sdk': ['https://github.com/hathach/mcux-sdk.git',
                            '950819b7de9b32f92c3edf396bc5ffb8d66e7009',
-                            'kinetis_k32l lpc51 lpc54 lpc55 mcx imxrt'],
-    'hw/mcu/nxp/nxp_sdk': ['https://github.com/hathach/nxp_sdk.git',
-                           '845c8fc49b6fb660f06a5c45225494eacb06f00c',
-                           'kinetis_kl'],
+                            'kinetis_k32l2 kinetis_kl lpc51 lpc54 lpc55 mcx imxrt'],
    'hw/mcu/raspberry_pi/Pico-PIO-USB': ['https://github.com/sekigon-gonnoc/Pico-PIO-USB.git',
-                                         'c3715ce94b6f6391856de56081d4d9b3e98fa93d',
+                                         '58879cfa0eca5725d8db6443ec17f8896a321042',
                                         'rp2040'],
    'hw/mcu/renesas/fsp': ['https://github.com/renesas/fsp.git',
                           '9860fae1f180340a0e3c097dc6e91323cf83b926',
@@ -169,7 +166,7 @@ deps_optional = {
                            'ch32v307'],
    'lib/CMSIS_5': ['https://github.com/ARM-software/CMSIS_5.git',
                    '20285262657d1b482d132d20d755c8c330d55c1f',
-                    'imxrt kinetis_k32l lpc51 lpc54 lpc55 mcx mm32 msp432e4 nrf ra saml2x'
+                    'imxrt kinetis_k32l2 kinetis_kl lpc51 lpc54 lpc55 mcx mm32 msp432e4 nrf ra saml2x'
                    'stm32f0 stm32f1 stm32f2 stm32f3 stm32f4 stm32f7 stm32g0 stm32g4 '
                    'stm32h7 stm32l0 stm32l1 stm32l4 stm32l5 stm32u5 stm32wb'],
    'lib/sct_neopixel': ['https://github.com/gsteiert/sct_neopixel.git',
--- a/tools/get_family_deps.py
+++ b/tools/get_family_deps.py
@@ -1,21 +0,0 @@
-import sys
-import subprocess
-import os
-
-# TOP is tinyusb root dir
-TOP = os.path.dirname(os.path.dirname(os.path.abspath(__file__)))
-
-def get_family_dep(family):
-    for entry in os.scandir("{}/hw/bsp/{}/boards".format(TOP, family)):
-        if entry.is_dir():
-            result = subprocess.run("make -C {}/examples/device/board_test BOARD={} get-deps".format(TOP, entry.name),
-                                    shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT)
-            print(result.stdout.decode("utf-8"))
-            return result.returncode
-
-
-status = 0
-for d in sys.argv[1:]:
-    status += get_family_dep(d)
-
-sys.exit(status)
--- a/tools/make/cpu/arm1176.mk
+++ b/tools/make/cpu/arm1176.mk
@@ -0,0 +1,9 @@
+ifeq ($(TOOLCHAIN),gcc)
+  CFLAGS += \
+    -mcpu=arm1176jzf-s \
+
+else ifeq ($(TOOLCHAIN),iar)
+	#CFLAGS += --cpu cortex-a53
+	#ASFLAGS += --cpu cortex-a53
+
+endif
--- a/tools/make/cpu/cortex-a53.mk
+++ b/tools/make/cpu/cortex-a53.mk
@@ -0,0 +1,12 @@
+ifeq ($(TOOLCHAIN),gcc)
+  CFLAGS += \
+    -mcpu=cortex-a53 \
+
+else ifeq ($(TOOLCHAIN),iar)
+	CFLAGS += \
+		--cpu cortex-a53 \
+
+	ASFLAGS += \
+		--cpu cortex-a53 \
+
+endif
--- a/tools/make/cpu/cortex-a72.mk
+++ b/tools/make/cpu/cortex-a72.mk
@@ -0,0 +1,12 @@
+ifeq ($(TOOLCHAIN),gcc)
+  CFLAGS += \
+    -mcpu=cortex-a72 \
+
+else ifeq ($(TOOLCHAIN),iar)
+	CFLAGS += \
+		--cpu cortex-a72 \
+
+	ASFLAGS += \
+		--cpu cortex-a72 \
+
+endif
--- a/tools/make/cpu/cortex-m0.mk
+++ b/tools/make/cpu/cortex-m0.mk
@@ -0,0 +1,14 @@
+ifeq ($(TOOLCHAIN),gcc)
+  CFLAGS += \
+    -mthumb \
+    -mcpu=cortex-m0 \
+    -mfloat-abi=soft \
+
+else ifeq ($(TOOLCHAIN),iar)
+  # IAR Flags
+  CFLAGS += --cpu cortex-m0
+  ASFLAGS += --cpu cortex-m0
+endif
+
+# For freeRTOS port source
+FREERTOS_PORTABLE_SRC ?= $(FREERTOS_PORTABLE_PATH)/ARM_CM0
--- a/tools/make/cpu/cortex-m0plus.mk
+++ b/tools/make/cpu/cortex-m0plus.mk
@@ -0,0 +1,14 @@
+ifeq ($(TOOLCHAIN),gcc)
+  CFLAGS += \
+    -mthumb \
+    -mcpu=cortex-m0plus \
+    -mfloat-abi=soft \
+
+else ifeq ($(TOOLCHAIN),iar)
+  # IAR Flags
+  CFLAGS += --cpu cortex-m0+
+  ASFLAGS += --cpu cortex-m0+
+endif
+
+# For freeRTOS port source
+FREERTOS_PORTABLE_SRC ?= $(FREERTOS_PORTABLE_PATH)/ARM_CM0
--- a/tools/make/cpu/cortex-m3.mk
+++ b/tools/make/cpu/cortex-m3.mk
@@ -0,0 +1,17 @@
+ifeq ($(TOOLCHAIN),gcc)
+  CFLAGS += \
+    -mthumb \
+    -mcpu=cortex-m3 \
+    -mfloat-abi=soft \
+
+else ifeq ($(TOOLCHAIN),iar)
+  # IAR Flags
+  CFLAGS += \
+    --cpu cortex-m3 \
+
+  ASFLAGS += \
+     --cpu cortex-m3
+endif
+
+# For freeRTOS port source
+FREERTOS_PORTABLE_SRC ?= $(FREERTOS_PORTABLE_PATH)/ARM_CM3
--- a/tools/make/cpu/cortex-m33.mk
+++ b/tools/make/cpu/cortex-m33.mk
@@ -5,10 +5,15 @@ ifeq ($(TOOLCHAIN),gcc)
    -mfloat-abi=hard \
    -mfpu=fpv5-sp-d16 \

-    #-mfpu=fpv5-d16 \
-
-  #set(FREERTOS_PORT GCC_ARM_CM33_NONSECURE CACHE INTERNAL "")
-  FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM33_NTZ/non_secure
 else ifeq ($(TOOLCHAIN),iar)
-  # TODO support IAR
+	CFLAGS += \
+		--cpu cortex-m33 \
+		--fpu VFPv5-SP \
+
+	ASFLAGS += \
+		--cpu cortex-m33 \
+		--fpu VFPv5-SP \
+
 endif
+
+FREERTOS_PORTABLE_SRC ?= $(FREERTOS_PORTABLE_PATH)/ARM_CM33_NTZ/non_secure
--- a/tools/make/cpu/cortex-m4.mk
+++ b/tools/make/cpu/cortex-m4.mk
@@ -5,8 +5,9 @@ ifeq ($(TOOLCHAIN),gcc)
    -mfloat-abi=hard \
    -mfpu=fpv4-sp-d16 \

-  #set(FREERTOS_PORT GCC_ARM_CM4F CACHE INTERNAL "")
-  FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F
 else ifeq ($(TOOLCHAIN),iar)
-  # TODO support IAR
+  CFLAGS += --cpu cortex-m4 --fpu VFPv4
+  ASFLAGS += --cpu cortex-m4 --fpu VFPv4
 endif
+
+FREERTOS_PORTABLE_SRC ?= $(FREERTOS_PORTABLE_PATH)/ARM_CM4F
--- a/tools/make/cpu/cortex-m7.mk
+++ b/tools/make/cpu/cortex-m7.mk
@@ -5,8 +5,15 @@ ifeq ($(TOOLCHAIN),gcc)
    -mfloat-abi=hard \
    -mfpu=fpv5-d16 \

-  #set(FREERTOS_PORT GCC_ARM_CM7 CACHE INTERNAL "")
-  FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM7/r0p1
 else ifeq ($(TOOLCHAIN),iar)
-  # TODO support IAR
+  CFLAGS += \
+  	--cpu cortex-m7 \
+  	--fpu VFPv5_D16 \
+
+  ASFLAGS += \
+		--cpu cortex-m7 \
+		--fpu VFPv5_D16 \
+
 endif
+
+FREERTOS_PORTABLE_SRC ?= $(FREERTOS_PORTABLE_PATH)/ARM_CM7/r0p1
--- a/tools/make/toolchain/arm_gcc.mk
+++ b/tools/make/toolchain/arm_gcc.mk
@@ -0,0 +1,71 @@
+# makefile for arm gcc toolchain
+
+CC = $(CROSS_COMPILE)gcc
+CXX = $(CROSS_COMPILE)g++
+AS = $(CC) -x assembler-with-cpp
+LD = $(CC)
+
+GDB = $(CROSS_COMPILE)gdb
+OBJCOPY = $(CROSS_COMPILE)objcopy
+SIZE = $(CROSS_COMPILE)size
+
+# ---------------------------------------
+# Compiler Flags
+# ---------------------------------------
+CFLAGS += \
+  -MD \
+  -ggdb \
+  -fdata-sections \
+  -ffunction-sections \
+  -fsingle-precision-constant \
+  -fno-strict-aliasing \
+  -Wall \
+  -Wextra \
+  -Werror \
+  -Wfatal-errors \
+  -Wdouble-promotion \
+  -Wstrict-prototypes \
+  -Wstrict-overflow \
+  -Werror-implicit-function-declaration \
+  -Wfloat-equal \
+  -Wundef \
+  -Wshadow \
+  -Wwrite-strings \
+  -Wsign-compare \
+  -Wmissing-format-attribute \
+  -Wunreachable-code \
+  -Wcast-align \
+  -Wcast-function-type \
+  -Wcast-qual \
+  -Wnull-dereference \
+  -Wuninitialized \
+  -Wunused \
+  -Wreturn-type \
+  -Wredundant-decls \
+
+# conversion is too strict for most mcu driver, may be disable sign/int/arith-conversion
+#  -Wconversion
+
+# Size Optimization as default
+CFLAGS_OPTIMIZED ?= -Os
+
+# Debugging/Optimization
+ifeq ($(DEBUG), 1)
+  CFLAGS += -O0
+  NO_LTO = 1
+else
+  CFLAGS += $(CFLAGS_OPTIMIZED)
+endif
+
+# ---------------------------------------
+# Linker Flags
+# ---------------------------------------
+LDFLAGS += \
+  -Wl,-Map=$@.map \
+  -Wl,-cref \
+  -Wl,-gc-sections \
+
+# Some toolchain such as renesas rx does not support --print-memory-usage flags
+ifneq ($(FAMILY),rx)
+LDFLAGS += -Wl,--print-memory-usage
+endif
--- a/tools/make/toolchain/arm_gcc_rules.mk
+++ b/tools/make/toolchain/arm_gcc_rules.mk
@@ -0,0 +1,78 @@
+SRC_S += $(SRC_S_GCC)
+
+# Assembly files can be name with upper case .S, convert it to .s
+SRC_S := $(SRC_S:.S=.s)
+
+# Due to GCC LTO bug https://bugs.launchpad.net/gcc-arm-embedded/+bug/1747966
+# assembly file should be placed first in linking order
+# '_asm' suffix is added to object of assembly file
+OBJ += $(addprefix $(BUILD)/obj/, $(SRC_S:.s=_asm.o))
+OBJ += $(addprefix $(BUILD)/obj/, $(SRC_C:.c=.o))
+
+CFLAGS += $(CFLAGS_GCC) -MD
+
+# LTO makes it difficult to analyze map file for optimizing size purpose
+# We will run this option in ci
+ifeq ($(NO_LTO),1)
+CFLAGS := $(filter-out -flto,$(CFLAGS))
+endif
+
+ifneq ($(CFLAGS_SKIP),)
+CFLAGS := $(filter-out $(CFLAGS_SKIP),$(CFLAGS))
+endif
+
+LDFLAGS += $(CFLAGS) $(LDFLAGS_GCC)
+
+ifdef LD_FILE
+LDFLAGS += -Wl,-T,$(TOP)/$(LD_FILE)
+endif
+
+ifdef LD_FILE_GCC
+LDFLAGS += -Wl,-T,$(TOP)/$(LD_FILE_GCC)
+endif
+
+ifneq ($(SKIP_NANOLIB), 1)
+LDFLAGS += --specs=nosys.specs --specs=nano.specs
+endif
+
+ASFLAGS += $(CFLAGS)
+
+LIBS_GCC ?= -lgcc -lm -lnosys
+
+# libc
+LIBS += $(LIBS_GCC)
+
+ifneq ($(BOARD), spresense)
+LIBS += -lc
+endif
+
+# ---------------------------------------
+# Rules
+# ---------------------------------------
+
+# Compile .c file
+$(BUILD)/obj/%.o: %.c
+	@echo CC $(notdir $@)
+	@$(CC) $(CFLAGS) -c -o $@ $<
+
+# ASM sources lower case .s
+$(BUILD)/obj/%_asm.o: %.s
+	@echo AS $(notdir $@)
+	@$(AS) $(ASFLAGS) -c -o $@ $<
+
+# ASM sources upper case .S
+$(BUILD)/obj/%_asm.o: %.S
+	@echo AS $(notdir $@)
+	@$(AS) $(ASFLAGS) -c -o $@ $<
+
+$(BUILD)/$(PROJECT).bin: $(BUILD)/$(PROJECT).elf
+	@echo CREATE $@
+	@$(OBJCOPY) -O binary $^ $@
+
+$(BUILD)/$(PROJECT).hex: $(BUILD)/$(PROJECT).elf
+	@echo CREATE $@
+	@$(OBJCOPY) -O ihex $^ $@
+
+$(BUILD)/$(PROJECT).elf: $(OBJ)
+	@echo LINK $@
+	@$(LD) -o $@ $(LDFLAGS) $^ -Wl,--start-group $(LIBS) -Wl,--end-group
--- a/tools/make/toolchain/arm_iar.mk
+++ b/tools/make/toolchain/arm_iar.mk
@@ -0,0 +1,11 @@
+# makefile for arm iar toolchain
+AS = iasmarm
+LD = ilinkarm
+OBJCOPY = ielftool --silent
+SIZE = size
+
+# Enable extension mode (gcc compatible)
+CFLAGS += -e --debug --silent
+
+# silent mode
+ASFLAGS += -S $(addprefix -I,$(INC))
--- a/tools/make/toolchain/arm_iar_rules.mk
+++ b/tools/make/toolchain/arm_iar_rules.mk
@@ -0,0 +1,44 @@
+SRC_S += $(SRC_S_IAR)
+
+# Assembly files can be name with upper case .S, convert it to .s
+SRC_S := $(SRC_S:.S=.s)
+
+# Due to GCC LTO bug https://bugs.launchpad.net/gcc-arm-embedded/+bug/1747966
+# assembly file should be placed first in linking order
+# '_asm' suffix is added to object of assembly file
+OBJ += $(addprefix $(BUILD)/obj/, $(SRC_S:.s=_asm.o))
+OBJ += $(addprefix $(BUILD)/obj/, $(SRC_C:.c=.o))
+
+# Linker script
+LDFLAGS += --config $(TOP)/$(LD_FILE_IAR)
+
+# ---------------------------------------
+# Rules
+# ---------------------------------------
+
+# Compile .c file
+$(BUILD)/obj/%.o: %.c
+	@echo CC $(notdir $@)
+	@$(CC) $(CFLAGS) -c -o $@ $<
+
+# ASM sources lower case .s
+$(BUILD)/obj/%_asm.o: %.s
+	@echo AS $(notdir $@)
+	@$(AS) $(ASFLAGS) -c -o $@ $<
+
+# ASM sources upper case .S
+$(BUILD)/obj/%_asm.o: %.S
+	@echo AS $(notdir $@)
+	@$(AS) $(ASFLAGS) -c -o $@ $<
+
+$(BUILD)/$(PROJECT).bin: $(BUILD)/$(PROJECT).elf
+	@echo CREATE $@
+	@$(OBJCOPY) --bin $^ $@
+
+$(BUILD)/$(PROJECT).hex: $(BUILD)/$(PROJECT).elf
+	@echo CREATE $@
+	@$(OBJCOPY) --ihex $^ $@
+
+$(BUILD)/$(PROJECT).elf: $(OBJ)
+	@echo LINK $@
+	@$(LD) -o $@ $(LDFLAGS) $^