dcd_synopsys: Handle HS and FS IP in one device
FIXME: Allow run-time selection to allow to handle both HS and FS with one file F746 HS port enumerates with error config 1 interface 2 altsetting 0 bulk endpoint 0x3 has invalid maxpacket 64
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		@@ -53,33 +53,39 @@
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// EP_FIFO_SIZE : Size of dedicated USB SRAM
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					// EP_FIFO_SIZE : Size of dedicated USB SRAM
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#if CFG_TUSB_MCU == OPT_MCU_STM32F1
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					#if CFG_TUSB_MCU == OPT_MCU_STM32F1
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  #include "stm32f1xx.h"
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					  #include "stm32f1xx.h"
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  #define EP_MAX          4
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					  #define EP_MAX_FS       4
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  #define EP_FIFO_SIZE    1280
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					  #define EP_FIFO_SIZE_FS 1280
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#elif CFG_TUSB_MCU == OPT_MCU_STM32F2
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					#elif CFG_TUSB_MCU == OPT_MCU_STM32F2
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  #include "stm32f2xx.h"
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					  #include "stm32f2xx.h"
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  #define EP_MAX          USB_OTG_FS_MAX_IN_ENDPOINTS
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					  #define EP_MAX_FS       USB_OTG_FS_MAX_IN_ENDPOINTS
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  #define EP_FIFO_SIZE    USB_OTG_FS_TOTAL_FIFO_SIZE
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					  #define EP_FIFO_SIZE_FS USB_OTG_FS_TOTAL_FIFO_SIZE
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#elif CFG_TUSB_MCU == OPT_MCU_STM32F4
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					#elif CFG_TUSB_MCU == OPT_MCU_STM32F4
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  #include "stm32f4xx.h"
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					  #include "stm32f4xx.h"
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  #define EP_MAX          USB_OTG_FS_MAX_IN_ENDPOINTS
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					  #define EP_MAX_FS       USB_OTG_FS_MAX_IN_ENDPOINTS
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  #define EP_FIFO_SIZE    USB_OTG_FS_TOTAL_FIFO_SIZE
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					  #define EP_FIFO_SIZE_FS USB_OTG_FS_TOTAL_FIFO_SIZE
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					  #define EP_MAX_HS       USB_OTG_HS_MAX_IN_ENDPOINTS
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					  #define EP_FIFO_SIZE_HS USB_OTG_HS_TOTAL_FIFO_SIZE
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#elif CFG_TUSB_MCU == OPT_MCU_STM32H7
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					#elif CFG_TUSB_MCU == OPT_MCU_STM32H7
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  #include "stm32h7xx.h"
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					  #include "stm32h7xx.h"
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  #define EP_MAX          9
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					  #define EP_MAX_FS       9
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  #define EP_FIFO_SIZE    4096
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					  #define EP_FIFO_SIZE_FS 4096
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					  #define EP_MAX_HS       9
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					  #define EP_FIFO_SIZE_HS 4096
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#elif CFG_TUSB_MCU == OPT_MCU_STM32F7
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					#elif CFG_TUSB_MCU == OPT_MCU_STM32F7
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  #include "stm32f7xx.h"
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					  #include "stm32f7xx.h"
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  #define EP_MAX          6
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					  #define EP_MAX_FS       6
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  #define EP_FIFO_SIZE    1280
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					  #define EP_FIFO_SIZE_FS 1280
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					  #define EP_MAX_HS       9
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					  #define EP_FIFO_SIZE_HS 4096
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#elif CFG_TUSB_MCU == OPT_MCU_STM32L4
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					#elif CFG_TUSB_MCU == OPT_MCU_STM32L4
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  #include "stm32l4xx.h"
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					  #include "stm32l4xx.h"
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  #define EP_MAX          6
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					  #define EP_MAX_FS       6
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  #define EP_FIFO_SIZE    1280
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					  #define EP_FIFO_SIZE_FS 1280
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#else
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					#else
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  #error "Unsupported MCUs"
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					  #error "Unsupported MCUs"
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@@ -140,7 +146,15 @@ typedef struct {
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typedef volatile uint32_t * usb_fifo_t;
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					typedef volatile uint32_t * usb_fifo_t;
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xfer_ctl_t xfer_status[EP_MAX][2];
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					#if TUD_OPT_RHPORT == 1
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					xfer_ctl_t xfer_status[EP_MAX_HS][2];
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					# define EP_MAX EP_MAX_HS
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					# define EP_FIFO_SIZE EP_FIFO_SIZE_HS
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					#else
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					xfer_ctl_t xfer_status[EP_MAX_FS][2];
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					# define EP_MAX EP_MAX_FS
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					# define EP_FIFO_SIZE EP_FIFO_SIZE_FS
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					#endif
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#define XFER_CTL_BASE(_ep, _dir) &xfer_status[_ep][_dir]
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					#define XFER_CTL_BASE(_ep, _dir) &xfer_status[_ep][_dir]
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// EP0 transfers are limited to 1 packet - larger sizes has to be split
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					// EP0 transfers are limited to 1 packet - larger sizes has to be split
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@@ -206,9 +220,9 @@ static void bus_reset(uint8_t rhport)
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  //   overwrite this.
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					  //   overwrite this.
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#if TUD_OPT_HIGH_SPEED
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					#if TUD_OPT_HIGH_SPEED
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  _allocated_fifo_words = 271 + 2*EP_MAX;
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					  _allocated_fifo_words = 271 + 2*EP_MAX_HS;
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#else
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					#else
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  _allocated_fifo_words =  47 + 2*EP_MAX;
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					  _allocated_fifo_words =  47 + 2*EP_MAX_FS;
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#endif
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					#endif
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  usb_otg->GRXFSIZ = _allocated_fifo_words;
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					  usb_otg->GRXFSIZ = _allocated_fifo_words;
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