correct ep toggle bit
This commit is contained in:
@@ -350,8 +350,6 @@ static void dcd_ep_ctr_rx_handler(uint32_t wIstr)
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uint32_t wEPRegVal = pcd_get_endpoint(USB, EPindex);
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uint32_t wEPRegVal = pcd_get_endpoint(USB, EPindex);
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uint8_t ep_addr = wEPRegVal & USB_EPADDR_FIELD;
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uint8_t ep_addr = wEPRegVal & USB_EPADDR_FIELD;
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xfer_ctl_t *xfer = xfer_ctl_ptr(ep_addr);
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// Verify the CTR_RX bit is set. This was in the ST Micro code,
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// Verify the CTR_RX bit is set. This was in the ST Micro code,
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// but I'm not sure it's actually necessary?
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// but I'm not sure it's actually necessary?
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if ((wEPRegVal & USB_EP_CTR_RX) == 0U) {
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if ((wEPRegVal & USB_EP_CTR_RX) == 0U) {
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@@ -359,34 +357,26 @@ static void dcd_ep_ctr_rx_handler(uint32_t wIstr)
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}
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}
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if (wEPRegVal & USB_EP_SETUP) {
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if (wEPRegVal & USB_EP_SETUP) {
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/* Setup packet */
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uint32_t count = btable_get_count(EPindex, BTABLE_BUF_RX);
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uint32_t count = btable_get_count(EPindex, BTABLE_BUF_RX);
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// Setup packet should always be 8 bytes. If not, ignore it, and try again.
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// Setup packet should always be 8 bytes. If not, ignore it, and try again.
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if (count == 8) {
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if (count == 8) {
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// Must reset EP to NAK (in case it had been stalling)
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pcd_set_ep_rx_status(USB, 0u, USB_EP_RX_NAK);
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pcd_set_ep_tx_status(USB, 0u, USB_EP_TX_NAK);
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// set both data toggle to 1
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uint32_t regVal = pcd_get_endpoint(USB, 0);
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if ((regVal & USB_EP_DTOG_TX) == 0) {
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pcd_tx_dtog(USB, 0);
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}
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if ((regVal & USB_EP_DTOG_RX) == 0) {
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pcd_rx_dtog(USB, 0);
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}
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uint16_t rx_addr = btable_get_addr(EPindex, BTABLE_BUF_RX);
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uint16_t rx_addr = btable_get_addr(EPindex, BTABLE_BUF_RX);
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#ifdef FSDEV_BUS_32BIT
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#ifdef FSDEV_BUS_32BIT
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dcd_event_setup_received(0, (uint8_t *)(USB_PMAADDR + rx_addr), true);
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dcd_event_setup_received(0, (uint8_t *)(USB_PMAADDR + rx_addr), true);
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#else
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#else
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// The setup_received function uses memcpy, so this must first copy the setup data into
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// The setup_received function uses memcpy, so this must first copy the setup data into
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// user memory, to allow for the 32-bit access that memcpy performs.
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// user memory, to allow for the 32-bit access that memcpy performs.
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uint8_t userMemBuf[8];
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uint32_t userMemBuf[2];
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dcd_read_packet_memory(userMemBuf, rx_addr, 8);
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dcd_read_packet_memory(userMemBuf, rx_addr, 8);
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dcd_event_setup_received(0, (uint8_t*) userMemBuf, true);
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dcd_event_setup_received(0, (uint8_t*) userMemBuf, true);
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#endif
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#endif
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// Reset EP to NAK (in case it had been stalling)
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wEPRegVal = ep_add_tx_status(wEPRegVal, USB_EP_TX_NAK);
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wEPRegVal = ep_add_rx_status(wEPRegVal, USB_EP_RX_NAK);
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wEPRegVal = ep_add_tx_dtog(wEPRegVal, 1);
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wEPRegVal = ep_add_rx_dtog(wEPRegVal, 1);
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pcd_set_endpoint(USB, 0, wEPRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX);
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}
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}
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} else {
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} else {
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// Clear RX CTR interrupt flag
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// Clear RX CTR interrupt flag
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@@ -394,6 +384,8 @@ static void dcd_ep_ctr_rx_handler(uint32_t wIstr)
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pcd_clear_rx_ep_ctr(USB, EPindex);
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pcd_clear_rx_ep_ctr(USB, EPindex);
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}
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}
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xfer_ctl_t *xfer = xfer_ctl_ptr(ep_addr);
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uint8_t buf_id;
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uint8_t buf_id;
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if ((wEPRegVal & USB_EP_TYPE_MASK) == USB_EP_ISOCHRONOUS) {
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if ((wEPRegVal & USB_EP_TYPE_MASK) == USB_EP_ISOCHRONOUS) {
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// ISO endpoints are double buffered
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// ISO endpoints are double buffered
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@@ -404,13 +396,11 @@ static void dcd_ep_ctr_rx_handler(uint32_t wIstr)
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uint32_t count = btable_get_count(EPindex, buf_id);
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uint32_t count = btable_get_count(EPindex, buf_id);
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uint16_t addr = (uint16_t) btable_get_addr(EPindex, buf_id);
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uint16_t addr = (uint16_t) btable_get_addr(EPindex, buf_id);
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TU_ASSERT(count <= xfer->max_packet_size, /**/);
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if (count != 0U) {
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if (count != 0U) {
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if (xfer->ff) {
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if (xfer->ff) {
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dcd_read_packet_memory_ff(xfer->ff, addr, count);
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dcd_read_packet_memory_ff(xfer->ff, addr, count);
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} else {
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} else {
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dcd_read_packet_memory(&(xfer->buffer[xfer->queued_len]), addr, count);
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dcd_read_packet_memory(xfer->buffer + xfer->queued_len, addr, count);
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}
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}
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xfer->queued_len = (uint16_t)(xfer->queued_len + count);
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xfer->queued_len = (uint16_t)(xfer->queued_len + count);
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@@ -292,18 +292,18 @@ TU_ATTR_ALWAYS_INLINE static inline void pcd_clear_tx_ep_ctr(USB_TypeDef * USBx,
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}
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}
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TU_ATTR_ALWAYS_INLINE static inline uint32_t ep_add_tx_status(uint32_t reg, uint32_t state) {
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TU_ATTR_ALWAYS_INLINE static inline uint32_t ep_add_tx_status(uint32_t reg, uint32_t state) {
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return reg | ((reg ^ state) & USB_EPTX_STAT);
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return reg ^ state;
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}
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}
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TU_ATTR_ALWAYS_INLINE static inline uint32_t ep_add_rx_status(uint32_t reg, uint32_t state) {
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TU_ATTR_ALWAYS_INLINE static inline uint32_t ep_add_rx_status(uint32_t reg, uint32_t state) {
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return reg | ((reg ^ state) & USB_EPRX_STAT);
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return reg ^ state;
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}
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}
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TU_ATTR_ALWAYS_INLINE static inline uint32_t ep_add_tx_dtog(uint32_t reg, uint32_t state) {
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TU_ATTR_ALWAYS_INLINE static inline uint32_t ep_add_tx_dtog(uint32_t reg, uint32_t state) {
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return reg | ((reg ^ (state << USB_EP_DTOG_TX_Pos)) & USB_EP_DTOG_TX);
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return reg ^ (state << USB_EP_DTOG_TX_Pos);
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}
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}
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TU_ATTR_ALWAYS_INLINE static inline uint32_t ep_add_rx_dtog(uint32_t reg, uint32_t state) {
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TU_ATTR_ALWAYS_INLINE static inline uint32_t ep_add_rx_dtog(uint32_t reg, uint32_t state) {
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return reg | ((reg ^ (state << USB_EP_DTOG_RX_Pos)) & USB_EP_DTOG_RX);
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return reg ^ (state << USB_EP_DTOG_RX_Pos);
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}
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}
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/**
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/**
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