able to build lpc11u with IAR
clean ending warming with IAR
This commit is contained in:
hathach
@@ -1,238 +1,238 @@
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/*****************************************************************************
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* uart.c: UART API file for NXP LPC11xx Family Microprocessors
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*
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* Copyright(C) 2008, NXP Semiconductor
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* All rights reserved.
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*
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* History
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* 2009.12.07 ver 1.00 Preliminary version, first Release
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*
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******************************************************************************/
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#include <stdint.h>
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#include "LPC11Uxx.h"
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#include "lpc11uxx_uart.h"
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volatile uint32_t UARTStatus;
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volatile uint8_t UARTTxEmpty = 1;
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volatile uint8_t UARTBuffer[BUFSIZE];
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volatile uint32_t UARTCount = 0;
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/*****************************************************************************
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** Function name: UART_IRQHandler
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**
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** Descriptions: UART interrupt handler
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**
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** parameters: None
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** Returned value: None
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**
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*****************************************************************************/
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void UART_IRQHandler(void)
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{
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uint8_t IIRValue, LSRValue;
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uint8_t Dummy = Dummy;
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IIRValue = LPC_USART->IIR;
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IIRValue >>= 1; /* skip pending bit in IIR */
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IIRValue &= 0x07; /* check bit 1~3, interrupt identification */
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if (IIRValue == IIR_RLS) /* Receive Line Status */
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{
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LSRValue = LPC_USART->LSR;
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/* Receive Line Status */
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if (LSRValue & (LSR_OE | LSR_PE | LSR_FE | LSR_RXFE | LSR_BI))
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{
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/* There are errors or break interrupt */
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/* Read LSR will clear the interrupt */
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UARTStatus = LSRValue;
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Dummy = LPC_USART->RBR; /* Dummy read on RX to clear
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interrupt, then bail out */
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return;
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}
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if (LSRValue & LSR_RDR) /* Receive Data Ready */
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{
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/* If no error on RLS, normal ready, save into the data buffer. */
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/* Note: read RBR will clear the interrupt */
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UARTBuffer[UARTCount++] = LPC_USART->RBR;
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if (UARTCount == BUFSIZE)
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{
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UARTCount = 0; /* buffer overflow */
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}
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}
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}
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else if (IIRValue == IIR_RDA) /* Receive Data Available */
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{
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/* Receive Data Available */
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UARTBuffer[UARTCount++] = LPC_USART->RBR;
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if (UARTCount == BUFSIZE)
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{
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UARTCount = 0; /* buffer overflow */
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}
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}
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else if (IIRValue == IIR_CTI) /* Character timeout indicator */
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{
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/* Character Time-out indicator */
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UARTStatus |= 0x100; /* Bit 9 as the CTI error */
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}
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else if (IIRValue == IIR_THRE) /* THRE, transmit holding register empty */
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{
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/* THRE interrupt */
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LSRValue = LPC_USART->LSR; /* Check status in the LSR to see if
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valid data in U0THR or not */
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if (LSRValue & LSR_THRE)
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{
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UARTTxEmpty = 1;
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}
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else
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{
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UARTTxEmpty = 0;
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}
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}
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return;
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}
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#if MODEM_TEST
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/*****************************************************************************
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** Function name: ModemInit
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**
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** Descriptions: Initialize UART0 port as modem, setup pin select.
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**
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** parameters: None
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** Returned value: None
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**
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*****************************************************************************/
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void ModemInit( void )
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{
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LPC_IOCON->PIO2_0 &= ~0x07; /* UART I/O config */
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LPC_IOCON->PIO2_0 |= 0x01; /* UART DTR */
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LPC_IOCON->PIO0_7 &= ~0x07; /* UART I/O config */
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LPC_IOCON->PIO0_7 |= 0x01; /* UART CTS */
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LPC_IOCON->PIO1_5 &= ~0x07; /* UART I/O config */
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LPC_IOCON->PIO1_5 |= 0x01; /* UART RTS */
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#if 1
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LPC_IOCON->DSR_LOC = 0;
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LPC_IOCON->PIO2_1 &= ~0x07; /* UART I/O config */
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LPC_IOCON->PIO2_1 |= 0x01; /* UART DSR */
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LPC_IOCON->DCD_LOC = 0;
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LPC_IOCON->PIO2_2 &= ~0x07; /* UART I/O config */
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LPC_IOCON->PIO2_2 |= 0x01; /* UART DCD */
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LPC_IOCON->RI_LOC = 0;
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LPC_IOCON->PIO2_3 &= ~0x07; /* UART I/O config */
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LPC_IOCON->PIO2_3 |= 0x01; /* UART RI */
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#else
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LPC_IOCON->DSR_LOC = 1;
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LPC_IOCON->PIO3_1 &= ~0x07; /* UART I/O config */
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LPC_IOCON->PIO3_1 |= 0x01; /* UART DSR */
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LPC_IOCON->DCD_LOC = 1;
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LPC_IOCON->PIO3_2 &= ~0x07; /* UART I/O config */
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LPC_IOCON->PIO3_2 |= 0x01; /* UART DCD */
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LPC_IOCON->RI_LOC = 1;
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LPC_IOCON->PIO3_3 &= ~0x07; /* UART I/O config */
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LPC_IOCON->PIO3_3 |= 0x01; /* UART RI */
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#endif
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LPC_USART->MCR = 0xC0; /* Enable Auto RTS and Auto CTS. */
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return;
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}
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#endif
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/*****************************************************************************
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** Function name: UARTInit
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**
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** Descriptions: Initialize UART0 port, setup pin select,
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** clock, parity, stop bits, FIFO, etc.
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**
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** parameters: UART baudrate
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** Returned value: None
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**
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*****************************************************************************/
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void UARTInit(uint32_t baudrate)
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{
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uint32_t Fdiv;
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uint32_t regVal;
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UARTTxEmpty = 1;
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UARTCount = 0;
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NVIC_DisableIRQ(UART_IRQn);
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LPC_IOCON->PIO0_18 &= ~0x07; /* UART I/O config */
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LPC_IOCON->PIO0_18 |= 0x01; /* UART RXD */
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LPC_IOCON->PIO0_19 &= ~0x07;
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LPC_IOCON->PIO0_19 |= 0x01; /* UART TXD */
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/* Enable UART clock */
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LPC_SYSCON->SYSAHBCLKCTRL |= (1<<12);
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LPC_SYSCON->UARTCLKDIV = 0x1; /* divided by 1 */
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LPC_USART->LCR = 0x83; /* 8 bits, no Parity, 1 Stop bit */
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regVal = LPC_SYSCON->UARTCLKDIV;
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Fdiv = (((SystemCoreClock*LPC_SYSCON->SYSAHBCLKDIV)/regVal)/16)/baudrate ; /*baud rate */
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LPC_USART->DLM = Fdiv / 256;
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LPC_USART->DLL = Fdiv % 256;
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LPC_USART->LCR = 0x03; /* DLAB = 0 */
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LPC_USART->FCR = 0x07; /* Enable and reset TX and RX FIFO. */
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/* Read to clear the line status. */
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regVal = LPC_USART->LSR;
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/* Ensure a clean start, no data in either TX or RX FIFO. */
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// CodeRed - added parentheses around comparison in operand of &
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while (( LPC_USART->LSR & (LSR_THRE|LSR_TEMT)) != (LSR_THRE|LSR_TEMT) );
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while ( LPC_USART->LSR & LSR_RDR )
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{
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regVal = LPC_USART->RBR; /* Dump data from RX FIFO */
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}
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/* Enable the UART Interrupt */
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NVIC_EnableIRQ(UART_IRQn);
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#if CONFIG_UART_ENABLE_INTERRUPT==1
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#if CONFIG_UART_ENABLE_TX_INTERRUPT==1
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LPC_USART->IER = IER_RBR | IER_THRE | IER_RLS; /* Enable UART interrupt */
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#else
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LPC_USART->IER = IER_RBR | IER_RLS; /* Enable UART interrupt */
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#endif
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#endif
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return;
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}
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/*****************************************************************************
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** Function name: UARTSend
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**
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** Descriptions: Send a block of data to the UART 0 port based
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** on the data length
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**
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** parameters: buffer pointer, and data length
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** Returned value: None
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**
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*****************************************************************************/
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void UARTSend(uint8_t *BufferPtr, uint32_t Length)
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{
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while ( Length != 0 )
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{
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/* THRE status, contain valid data */
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#if CONFIG_UART_ENABLE_TX_INTERRUPT==1
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/* Below flag is set inside the interrupt handler when THRE occurs. */
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while ( !(UARTTxEmpty & 0x01) );
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LPC_USART->THR = *BufferPtr;
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UARTTxEmpty = 0; /* not empty in the THR until it shifts out */
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#else
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while ( !(LPC_USART->LSR & LSR_THRE) );
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LPC_USART->THR = *BufferPtr;
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#endif
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BufferPtr++;
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Length--;
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}
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return;
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}
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/******************************************************************************
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** End Of File
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******************************************************************************/
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/*****************************************************************************
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* uart.c: UART API file for NXP LPC11xx Family Microprocessors
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*
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* Copyright(C) 2008, NXP Semiconductor
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* All rights reserved.
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*
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* History
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* 2009.12.07 ver 1.00 Preliminary version, first Release
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*
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******************************************************************************/
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#include <stdint.h>
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#include "LPC11Uxx.h"
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#include "lpc11uxx_uart.h"
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volatile uint32_t UARTStatus;
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volatile uint8_t UARTTxEmpty = 1;
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volatile uint8_t UARTBuffer[BUFSIZE];
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volatile uint32_t UARTCount = 0;
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/*****************************************************************************
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** Function name: UART_IRQHandler
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**
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** Descriptions: UART interrupt handler
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**
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** parameters: None
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** Returned value: None
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**
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*****************************************************************************/
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void UART_IRQHandler(void)
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{
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uint8_t IIRValue, LSRValue;
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uint8_t Dummy = Dummy;
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IIRValue = LPC_USART->IIR;
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IIRValue >>= 1; /* skip pending bit in IIR */
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IIRValue &= 0x07; /* check bit 1~3, interrupt identification */
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if (IIRValue == IIR_RLS) /* Receive Line Status */
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{
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LSRValue = LPC_USART->LSR;
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/* Receive Line Status */
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if (LSRValue & (LSR_OE | LSR_PE | LSR_FE | LSR_RXFE | LSR_BI))
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{
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/* There are errors or break interrupt */
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/* Read LSR will clear the interrupt */
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UARTStatus = LSRValue;
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Dummy = LPC_USART->RBR; /* Dummy read on RX to clear
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interrupt, then bail out */
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return;
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}
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if (LSRValue & LSR_RDR) /* Receive Data Ready */
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{
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/* If no error on RLS, normal ready, save into the data buffer. */
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/* Note: read RBR will clear the interrupt */
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UARTBuffer[UARTCount++] = LPC_USART->RBR;
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if (UARTCount == BUFSIZE)
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{
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UARTCount = 0; /* buffer overflow */
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}
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}
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}
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else if (IIRValue == IIR_RDA) /* Receive Data Available */
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{
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/* Receive Data Available */
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UARTBuffer[UARTCount++] = LPC_USART->RBR;
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if (UARTCount == BUFSIZE)
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{
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UARTCount = 0; /* buffer overflow */
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}
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}
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else if (IIRValue == IIR_CTI) /* Character timeout indicator */
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{
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/* Character Time-out indicator */
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UARTStatus |= 0x100; /* Bit 9 as the CTI error */
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}
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else if (IIRValue == IIR_THRE) /* THRE, transmit holding register empty */
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{
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/* THRE interrupt */
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LSRValue = LPC_USART->LSR; /* Check status in the LSR to see if
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valid data in U0THR or not */
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if (LSRValue & LSR_THRE)
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{
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UARTTxEmpty = 1;
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}
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else
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{
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UARTTxEmpty = 0;
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}
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}
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return;
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}
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#if MODEM_TEST
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/*****************************************************************************
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** Function name: ModemInit
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**
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** Descriptions: Initialize UART0 port as modem, setup pin select.
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**
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** parameters: None
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** Returned value: None
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**
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*****************************************************************************/
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void ModemInit( void )
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{
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LPC_IOCON->PIO2_0 &= ~0x07; /* UART I/O config */
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LPC_IOCON->PIO2_0 |= 0x01; /* UART DTR */
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LPC_IOCON->PIO0_7 &= ~0x07; /* UART I/O config */
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LPC_IOCON->PIO0_7 |= 0x01; /* UART CTS */
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LPC_IOCON->PIO1_5 &= ~0x07; /* UART I/O config */
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LPC_IOCON->PIO1_5 |= 0x01; /* UART RTS */
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#if 1
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LPC_IOCON->DSR_LOC = 0;
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LPC_IOCON->PIO2_1 &= ~0x07; /* UART I/O config */
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LPC_IOCON->PIO2_1 |= 0x01; /* UART DSR */
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LPC_IOCON->DCD_LOC = 0;
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LPC_IOCON->PIO2_2 &= ~0x07; /* UART I/O config */
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LPC_IOCON->PIO2_2 |= 0x01; /* UART DCD */
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LPC_IOCON->RI_LOC = 0;
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LPC_IOCON->PIO2_3 &= ~0x07; /* UART I/O config */
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LPC_IOCON->PIO2_3 |= 0x01; /* UART RI */
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#else
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LPC_IOCON->DSR_LOC = 1;
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LPC_IOCON->PIO3_1 &= ~0x07; /* UART I/O config */
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LPC_IOCON->PIO3_1 |= 0x01; /* UART DSR */
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LPC_IOCON->DCD_LOC = 1;
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LPC_IOCON->PIO3_2 &= ~0x07; /* UART I/O config */
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LPC_IOCON->PIO3_2 |= 0x01; /* UART DCD */
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LPC_IOCON->RI_LOC = 1;
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LPC_IOCON->PIO3_3 &= ~0x07; /* UART I/O config */
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LPC_IOCON->PIO3_3 |= 0x01; /* UART RI */
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#endif
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LPC_USART->MCR = 0xC0; /* Enable Auto RTS and Auto CTS. */
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return;
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}
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#endif
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/*****************************************************************************
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** Function name: UARTInit
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**
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** Descriptions: Initialize UART0 port, setup pin select,
|
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** clock, parity, stop bits, FIFO, etc.
|
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**
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** parameters: UART baudrate
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** Returned value: None
|
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**
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*****************************************************************************/
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void UARTInit(uint32_t baudrate)
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{
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uint32_t Fdiv;
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uint32_t regVal;
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UARTTxEmpty = 1;
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UARTCount = 0;
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NVIC_DisableIRQ(UART_IRQn);
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LPC_IOCON->PIO0_18 &= ~0x07; /* UART I/O config */
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LPC_IOCON->PIO0_18 |= 0x01; /* UART RXD */
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LPC_IOCON->PIO0_19 &= ~0x07;
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LPC_IOCON->PIO0_19 |= 0x01; /* UART TXD */
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/* Enable UART clock */
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LPC_SYSCON->SYSAHBCLKCTRL |= (1<<12);
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LPC_SYSCON->UARTCLKDIV = 0x1; /* divided by 1 */
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LPC_USART->LCR = 0x83; /* 8 bits, no Parity, 1 Stop bit */
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regVal = LPC_SYSCON->UARTCLKDIV;
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Fdiv = (((SystemCoreClock*LPC_SYSCON->SYSAHBCLKDIV)/regVal)/16)/baudrate ; /*baud rate */
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LPC_USART->DLM = Fdiv / 256;
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LPC_USART->DLL = Fdiv % 256;
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LPC_USART->LCR = 0x03; /* DLAB = 0 */
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LPC_USART->FCR = 0x07; /* Enable and reset TX and RX FIFO. */
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/* Read to clear the line status. */
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regVal = LPC_USART->LSR;
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/* Ensure a clean start, no data in either TX or RX FIFO. */
|
||||
// CodeRed - added parentheses around comparison in operand of &
|
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while (( LPC_USART->LSR & (LSR_THRE|LSR_TEMT)) != (LSR_THRE|LSR_TEMT) );
|
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while ( LPC_USART->LSR & LSR_RDR )
|
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{
|
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regVal = LPC_USART->RBR; /* Dump data from RX FIFO */
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}
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/* Enable the UART Interrupt */
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NVIC_EnableIRQ(UART_IRQn);
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#if CONFIG_UART_ENABLE_INTERRUPT==1
|
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#if CONFIG_UART_ENABLE_TX_INTERRUPT==1
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LPC_USART->IER = IER_RBR | IER_THRE | IER_RLS; /* Enable UART interrupt */
|
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#else
|
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LPC_USART->IER = IER_RBR | IER_RLS; /* Enable UART interrupt */
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#endif
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#endif
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return;
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}
|
||||
|
||||
/*****************************************************************************
|
||||
** Function name: UARTSend
|
||||
**
|
||||
** Descriptions: Send a block of data to the UART 0 port based
|
||||
** on the data length
|
||||
**
|
||||
** parameters: buffer pointer, and data length
|
||||
** Returned value: None
|
||||
**
|
||||
*****************************************************************************/
|
||||
void UARTSend(uint8_t *BufferPtr, uint32_t Length)
|
||||
{
|
||||
|
||||
while ( Length != 0 )
|
||||
{
|
||||
/* THRE status, contain valid data */
|
||||
#if CONFIG_UART_ENABLE_TX_INTERRUPT==1
|
||||
/* Below flag is set inside the interrupt handler when THRE occurs. */
|
||||
while ( !(UARTTxEmpty & 0x01) );
|
||||
LPC_USART->THR = *BufferPtr;
|
||||
UARTTxEmpty = 0; /* not empty in the THR until it shifts out */
|
||||
#else
|
||||
while ( !(LPC_USART->LSR & LSR_THRE) );
|
||||
LPC_USART->THR = *BufferPtr;
|
||||
#endif
|
||||
BufferPtr++;
|
||||
Length--;
|
||||
}
|
||||
return;
|
||||
}
|
||||
|
||||
/******************************************************************************
|
||||
** End Of File
|
||||
******************************************************************************/
|
||||
|
||||
Reference in New Issue
Block a user