add hal init for USB1 and trying to get USB1 working
add hack delay 100 ms after a port reset (huge) for correct speed detection
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@@ -136,6 +136,10 @@ void hcd_port_reset(uint8_t hostid)
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// there is chance device is unplugged while reset sequence is not complete
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while( regs->portsc_bit.port_reset) {}
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#endif
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// TODO finalize delay after reset, hack delay 100 ms, otherwise speed is detected as LOW in most cases
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volatile uint32_t delay_us = 100000;
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delay_us *= (SystemCoreClock / 1000000) / 3;
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while(delay_us--);
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}
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bool hcd_port_connect_status(uint8_t hostid)
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@@ -153,7 +157,9 @@ static tusb_error_t hcd_controller_init(uint8_t hostid)
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//------------- CTRLDSSEGMENT Register (skip) -------------//
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//------------- USB INT Register -------------//
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regs->usb_int_enable = 0; // 1. disable all the interrupt
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#ifndef _TEST_ // the fake controller does not have write-to-clear behavior
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regs->usb_sts = EHCI_INT_MASK_ALL; // 2. clear all status
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#endif
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regs->usb_int_enable = EHCI_INT_MASK_ERROR | EHCI_INT_MASK_PORT_CHANGE |
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#if EHCI_PERIODIC_LIST
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EHCI_INT_MASK_NXP_PERIODIC |
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