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Merge branch 'refs/heads/master' into fork/verylowfreq/pr-ch32v-usbfs-host

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This commit is contained in:
hathach
2025-07-04 09:49:28 +07:00
parent cd2b3a5321 9d872d529f
commit 1b5f97ff23
372 changed files with 17697 additions and 8700 deletions
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36
hw/bsp/BoardPresets.json
View File

@@ -12,21 +12,31 @@
"BOARD": "${presetName}"
}
},
{
"name": "default single",
"hidden": true,
"description": "Configure preset for the ${presetName} board",
"generator": "Ninja",
"binaryDir": "${sourceDir}/build/${presetName}",
"cacheVariables": {
"BOARD": "${presetName}"
}
},
{
"name": "adafruit_clue",
"inherits": "default"
},
{
"name": "adafruit_feather_esp32_v2",
"inherits": "default"
"inherits": "default single"
},
{
"name": "adafruit_feather_esp32s2",
"inherits": "default"
"inherits": "default single"
},
{
"name": "adafruit_feather_esp32s3",
"inherits": "default"
"inherits": "default single"
},
{
"name": "adafruit_magtag_29gray",
@@ -34,7 +44,7 @@
},
{
"name": "adafruit_metro_esp32s2",
"inherits": "default"
"inherits": "default single"
},
{
"name": "apard32690",
@@ -130,39 +140,39 @@
},
{
"name": "espressif_addax_1",
"inherits": "default"
"inherits": "default single"
},
{
"name": "espressif_c3_devkitc",
"inherits": "default"
"inherits": "default single"
},
{
"name": "espressif_c6_devkitc",
"inherits": "default"
"inherits": "default single"
},
{
"name": "espressif_kaluga_1",
"inherits": "default"
"inherits": "default single"
},
{
"name": "espressif_p4_function_ev",
"inherits": "default"
"inherits": "default single"
},
{
"name": "espressif_s2_devkitc",
"inherits": "default"
"inherits": "default single"
},
{
"name": "espressif_s3_devkitc",
"inherits": "default"
"inherits": "default single"
},
{
"name": "espressif_s3_devkitm",
"inherits": "default"
"inherits": "default single"
},
{
"name": "espressif_saola_1",
"inherits": "default"
"inherits": "default single"
},
{
"name": "f1c100s",

24
hw/bsp/board.c
View File

@@ -60,17 +60,29 @@ int sys_read(int fhdl, char *buf, size_t count) {
int rd = (int) SEGGER_RTT_Read(0, buf, count);
return (rd > 0) ? rd : -1;
}
#endif
#elif defined(LOGGER_SWO)
#define ITM_BASE 0xE0000000
#define ITM_STIM0 (*((volatile uint8_t*)(ITM_BASE + 0)))
#define ITM_TER *((volatile uint32_t*)(ITM_BASE + 0xE00))
#define ITM_TCR *((volatile uint32_t*)(ITM_BASE + 0xE80))
#define ITM_TCR_ITMENA (1 << 0)
// Logging with SWO for ARM Cortex-M
int sys_write (int fhdl, const char *buf, size_t count) {
(void) fhdl;
uint8_t const* buf8 = (uint8_t const*) buf;
for(size_t i=0; i<count; i++) {
ITM_SendChar(buf8[i]);
if ((ITM_TCR & ITM_TCR_ITMENA) && (ITM_TER & 1ul)) {
for(size_t i=0; i < count; i++) {
while (!(ITM_STIM0 & 1ul)) {
asm("nop");
}
ITM_STIM0 = buf8[i];
}
}
return (int) count;
@@ -136,6 +148,9 @@ int board_getchar(void) {
return (sys_read(0, &c, 1) > 0) ? (int) c : (-1);
}
void board_putchar(int c) {
sys_write(0, (const char*)&c, 1);
}
uint32_t tusb_time_millis_api(void) {
return board_millis();
@@ -144,7 +159,7 @@ uint32_t tusb_time_millis_api(void) {
//--------------------------------------------------------------------
// FreeRTOS hooks
//--------------------------------------------------------------------
#if CFG_TUSB_OS == OPT_OS_FREERTOS && !TUSB_MCU_VENDOR_ESPRESSIF
#if CFG_TUSB_OS == OPT_OS_FREERTOS && !defined(ESP_PLATFORM)
#include "FreeRTOS.h"
#include "task.h"
@@ -226,5 +241,4 @@ void vApplicationSetupTimerInterrupt(void) {
}
#endif
#endif

3
hw/bsp/board_api.h
View File

@@ -41,7 +41,7 @@ extern "C" {
#if CFG_TUSB_OS == OPT_OS_ZEPHYR
#include <zephyr/kernel.h>
#elif CFG_TUSB_OS == OPT_OS_FREERTOS
#if TUSB_MCU_VENDOR_ESPRESSIF
#ifdef ESP_PLATFORM
// ESP-IDF need "freertos/" prefix in include path.
// CFG_TUSB_OS_INC_PATH should be defined accordingly.
#include "freertos/FreeRTOS.h"
@@ -195,6 +195,7 @@ static inline void board_delay(uint32_t ms) {
// stdio getchar() is blocking, this is non-blocking version
int board_getchar(void);
void board_putchar(int c);
#ifdef __cplusplus
}

2
hw/bsp/broadcom_32bit/family.mk
View File

@@ -15,7 +15,7 @@ CFLAGS += \
CROSS_COMPILE = arm-none-eabi-
# mcu driver cause following warnings
CFLAGS += -Wno-error=cast-qual -Wno-error=redundant-decls
CFLAGS_GCC += -Wno-error=cast-qual -Wno-error=redundant-decls
SRC_C += \
src/portable/synopsys/dwc2/dcd_dwc2.c \

2
hw/bsp/broadcom_64bit/family.mk
View File

@@ -14,7 +14,7 @@ CFLAGS += \
CROSS_COMPILE = aarch64-none-elf-
# mcu driver cause following warnings
CFLAGS += -Wno-error=cast-qual -Wno-error=redundant-decls
CFLAGS_GCC += -Wno-error=cast-qual -Wno-error=redundant-decls
SRC_C += \
src/portable/synopsys/dwc2/dcd_dwc2.c \

1
hw/bsp/brtmm90x/family.mk
View File

@@ -13,7 +13,6 @@ else
# The submodule BRTSG-FOSS/ft90x-sdk contains header files and source
# code for the Bridgetek SDK. This can be used instead of the prebuilt
# library.
DEPS_SUBMODULES += hw/mcu/bridgetek/ft9xx/ft90x-sdk
# The SDK can be used to load specific files from the Bridgetek SDK.
FT9XX_SDK = hw/mcu/bridgetek/ft9xx/ft90x-sdk/Source
INC += "$(TOP)/$(FT9XX_SDK)/include"

1
hw/bsp/ch32f20x/family.mk
View File

@@ -1,6 +1,5 @@
# Submodules
CH32F20X_SDK = hw/mcu/wch/ch32f20x
DEPS_SUBMODULES += $(CH32F20X_SDK)
# WCH-SDK paths
CH32F20X_SDK_SRC = $(CH32F20X_SDK)/EVT/EXAM/SRC

2
hw/bsp/ch32v20x/boards/ch32v203c_r0_1v0/board.h
View File

@@ -13,6 +13,8 @@ extern "C" {
#define LED_PORT GPIOA
#define LED_PIN GPIO_Pin_0
#define LED_STATE_ON 0
#define LED_CLOCK_EN() RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE)
#define LED_MODE GPIO_Mode_Out_OD
#define UART_DEV USART1
#define UART_CLOCK_EN() RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1, ENABLE)

2
hw/bsp/ch32v20x/boards/ch32v203g_r0_1v0/board.h
View File

@@ -13,6 +13,8 @@ extern "C" {
#define LED_PORT GPIOA
#define LED_PIN GPIO_Pin_0
#define LED_STATE_ON 0
#define LED_CLOCK_EN() RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE)
#define LED_MODE GPIO_Mode_Out_OD
#define UART_DEV USART2
#define UART_CLOCK_EN() RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE)

2
hw/bsp/ch32v20x/boards/nanoch32v203/board.h
View File

@@ -13,6 +13,8 @@ extern "C" {
#define LED_PORT GPIOA
#define LED_PIN GPIO_Pin_15
#define LED_STATE_ON 0
#define LED_CLOCK_EN() RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE)
#define LED_MODE GPIO_Mode_Out_OD
#define UART_DEV USART1
#define UART_CLOCK_EN() RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1, ENABLE)

4
hw/bsp/ch32v20x/family.c
View File

@@ -99,11 +99,11 @@ void board_init(void) {
SysTick_Config(SystemCoreClock / 1000);
#endif
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE);
LED_CLOCK_EN();
GPIO_InitTypeDef GPIO_InitStructure = {
.GPIO_Pin = LED_PIN,
.GPIO_Mode = GPIO_Mode_Out_OD,
.GPIO_Mode = LED_MODE,
.GPIO_Speed = GPIO_Speed_10MHz,
};
GPIO_Init(LED_PORT, &GPIO_InitStructure);

3
hw/bsp/espressif/boards/adafruit_feather_esp32c6/board.cmake Normal file
View File

@@ -0,0 +1,3 @@
# Apply board specific content here
set(IDF_TARGET "esp32c6")
set(MAX3421_HOST 1)

56
hw/bsp/espressif/boards/adafruit_feather_esp32c6/board.h Normal file
View File

@@ -0,0 +1,56 @@
/*
* The MIT License (MIT)
*
* Copyright (c) 2020, Ha Thach (tinyusb.org)
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*
* This file is part of the TinyUSB stack.
*/
/* metadata:
name: Adafruit Feather EPS32-C6
url: https://www.adafruit.com/product/5933
*/
#ifndef BOARD_H_
#define BOARD_H_
#ifdef __cplusplus
extern "C" {
#endif
#define NEOPIXEL_PIN 15
#define BUTTON_PIN 9
#define BUTTON_STATE_ACTIVE 0
// SPI for USB host shield
#define MAX3421_SPI_HOST SPI2_HOST
#define MAX3421_SCK_PIN 21
#define MAX3421_MOSI_PIN 22
#define MAX3421_MISO_PIN 23
#define MAX3421_CS_PIN 8
#define MAX3421_INTR_PIN 7
#ifdef __cplusplus
}
#endif
#endif /* BOARD_H_ */

7
hw/bsp/espressif/boards/espressif_p4_function_ev/board.h
View File

@@ -41,9 +41,10 @@
#define BUTTON_PIN 35
#define BUTTON_STATE_ACTIVE 0
// For CI hardware test, to test both device and host on the same HS port with help of
#define HIL_DEVICE_HOST_MUX_PIN 47
#define HIL_DEVICE_STATE 1
// For CI hardware test, to test both device and host on the same HS port with help of TS3USB30
// https://www.adafruit.com/product/5871
#define HIL_TS3USB30_MODE_PIN 47
#define HIL_TS3USB30_MODE_DEVICE 1
#ifdef __cplusplus
}

10
hw/bsp/espressif/boards/espressif_s2_devkitc/board.h
View File

@@ -36,13 +36,19 @@
extern "C" {
#endif
// Note: On the production version (v1.2) WS2812 is connected to GPIO 18,
// however earlier revision v1.1 WS2812 is connected to GPIO 17
#define NEOPIXEL_PIN 18
#define BUTTON_PIN 0
#define BUTTON_STATE_ACTIVE 0
// SPI for USB host shield
#define MAX3421_SPI_HOST SPI2_HOST
#define MAX3421_SCK_PIN 36
#define MAX3421_MOSI_PIN 35
#define MAX3421_MISO_PIN 37
#define MAX3421_CS_PIN 15
#define MAX3421_INTR_PIN 14
#ifdef __cplusplus
}
#endif

2
hw/bsp/espressif/boards/espressif_s3_devkitc/board.h
View File

@@ -36,7 +36,7 @@
extern "C" {
#endif
#define NEOPIXEL_PIN 48
#define NEOPIXEL_PIN 38
#define BUTTON_PIN 0
#define BUTTON_STATE_ACTIVE 0

5
hw/bsp/espressif/boards/espressif_s3_devkitm/board.h
View File

@@ -49,6 +49,11 @@
#define MAX3421_CS_PIN 15
#define MAX3421_INTR_PIN 14
// For CI hardware test, to test both device and host on the same HS port with help of TS3USB30
// https://www.adafruit.com/product/5871
#define HIL_TS3USB30_MODE_PIN 47
#define HIL_TS3USB30_MODE_DEVICE 1
#ifdef __cplusplus
}
#endif

14
hw/bsp/espressif/boards/family.c
View File

@@ -49,7 +49,9 @@ static led_strip_handle_t led_strip;
static void max3421_init(void);
#endif
#if TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3, OPT_MCU_ESP32P4)
static bool usb_init(void);
#endif
//--------------------------------------------------------------------+
// Implementation
@@ -92,10 +94,10 @@ void board_init(void) {
usb_init();
#endif
#ifdef HIL_DEVICE_HOST_MUX_PIN
gpio_reset_pin(HIL_DEVICE_HOST_MUX_PIN);
gpio_set_direction(HIL_DEVICE_HOST_MUX_PIN, GPIO_MODE_OUTPUT);
gpio_set_level(HIL_DEVICE_HOST_MUX_PIN, CFG_TUD_ENABLED ? HIL_DEVICE_STATE : (1-HIL_DEVICE_STATE));
#ifdef HIL_TS3USB30_MODE_PIN
gpio_reset_pin(HIL_TS3USB30_MODE_PIN);
gpio_set_direction(HIL_TS3USB30_MODE_PIN, GPIO_MODE_OUTPUT);
gpio_set_level(HIL_TS3USB30_MODE_PIN, CFG_TUD_ENABLED ? HIL_TS3USB30_MODE_DEVICE : (1-HIL_TS3USB30_MODE_DEVICE));
#endif
#if CFG_TUH_ENABLED && CFG_TUH_MAX3421
@@ -154,6 +156,10 @@ int board_getchar(void) {
return getchar();
}
void board_putchar(int c) {
putchar(c);
}
//--------------------------------------------------------------------
// PHY Init
//--------------------------------------------------------------------

6
hw/bsp/espressif/family.cmake
View File

@@ -1,5 +1,3 @@
cmake_minimum_required(VERSION 3.5)
# Apply board specific content i.e IDF_TARGET must be set before project.cmake is included
include("${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake")
string(TOUPPER ${IDF_TARGET} FAMILY_MCUS)
@@ -32,8 +30,6 @@ endif ()
# Add example src and bsp directories
set(EXTRA_COMPONENT_DIRS "src" "${CMAKE_CURRENT_LIST_DIR}/boards" "${CMAKE_CURRENT_LIST_DIR}/components")
# set SDKCONFIG for each IDF Target
set(SDKCONFIG ${CMAKE_SOURCE_DIR}/sdkconfig.${IDF_TARGET})
set(SDKCONFIG ${CMAKE_BINARY_DIR}/sdkconfig)
include($ENV{IDF_PATH}/tools/cmake/project.cmake)

34
hw/bsp/espressif/family.mk
View File

@@ -1,34 +0,0 @@
#DEPS_SUBMODULES +=
UF2_FAMILY_ID_esp32s2 = 0xbfdd4eee
UF2_FAMILY_ID_esp32s3 = 0xc47e5767
BOARD_CMAKE := $(file < $(TOP)/$(BOARD_PATH)/board.cmake)
ifneq ($(findstring esp32s2,$(BOARD_CMAKE)),)
IDF_TARGET = esp32s2
else
ifneq ($(findstring esp32s3,$(BOARD_CMAKE)),)
IDF_TARGET = esp32s3
endif
endif
.PHONY: all clean flash bootloader-flash app-flash erase monitor dfu-flash dfu
all:
idf.py -B$(BUILD) -DFAMILY=$(FAMILY) -DBOARD=$(BOARD) $(CMAKE_DEFSYM) build
build: all
fullclean:
if test -f sdkconfig; then $(RM) -f sdkconfig ; fi
if test -d $(BUILD); then $(RM) -rf $(BUILD) ; fi
idf.py -B$(BUILD) -DFAMILY=$(FAMILY) -DBOARD=$(BOARD) $(CMAKE_DEFSYM) $@
clean flash bootloader-flash app-flash erase monitor dfu-flash dfu size size-components size-files:
idf.py -B$(BUILD) -DFAMILY=$(FAMILY) -DBOARD=$(BOARD) $(CMAKE_DEFSYM) $@
uf2: $(BUILD)/$(PROJECT).uf2
$(BUILD)/$(PROJECT).uf2: $(BUILD)/$(PROJECT).bin
@echo CREATE $@
$(PYTHON) $(TOP)/tools/uf2/utils/uf2conv.py -f $(UF2_FAMILY_ID_$(IDF_TARGET)) -b 0x0 -c -o $@ $^

30
hw/bsp/family_support.cmake
View File

@@ -38,6 +38,11 @@ if (NOT DEFINED TOOLCHAIN)
set(TOOLCHAIN gcc)
endif ()
# Optimization
if (NOT DEFINED CMAKE_BUILD_TYPE OR CMAKE_BUILD_TYPE STREQUAL "")
set(CMAKE_BUILD_TYPE MinSizeRel CACHE STRING "Build type" FORCE)
endif ()
#-------------------------------------------------------------
# FAMILY and BOARD
#-------------------------------------------------------------
@@ -208,13 +213,16 @@ function(family_configure_common TARGET RTOS)
# LOGGER option
if (DEFINED LOGGER)
string(TOUPPER ${LOGGER} LOGGER)
target_compile_definitions(${TARGET} PUBLIC LOGGER_${LOGGER})
# Add segger rtt to example
if(LOGGER STREQUAL "RTT" OR LOGGER STREQUAL "rtt")
if(LOGGER STREQUAL "RTT")
target_sources(${TARGET} PUBLIC ${TOP}/lib/SEGGER_RTT/RTT/SEGGER_RTT.c)
target_include_directories(${TARGET} PUBLIC ${TOP}/lib/SEGGER_RTT/RTT)
# target_compile_definitions(${TARGET} PUBLIC SEGGER_RTT_MODE_DEFAULT=SEGGER_RTT_MODE_BLOCK_IF_FIFO_FULL)
endif ()
else ()
target_compile_definitions(${TARGET} PUBLIC LOGGER_UART)
endif ()
if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
@@ -270,10 +278,6 @@ function(family_add_tinyusb TARGET OPT_MCU)
# Add TinyUSB sources, include and common define
tinyusb_target_add(${TARGET})
# path to tusb_config.h
target_include_directories(${TARGET} PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/src)
target_compile_definitions(${TARGET} PUBLIC CFG_TUSB_MCU=${OPT_MCU})
if (DEFINED LOG)
target_compile_definitions(${TARGET} PUBLIC CFG_TUSB_DEBUG=${LOG})
@@ -486,7 +490,7 @@ function(family_flash_openocd TARGET)
# note skip verify since it has issue with rp2040
add_custom_target(${TARGET}-openocd
DEPENDS ${TARGET}
COMMAND ${OPENOCD} -c "tcl_port disabled" -c "gdb_port disabled" ${OPTION_LIST} -c init -c halt -c "program $<TARGET_FILE:${TARGET}>" -c reset ${OPTION_LIST2} -c exit
COMMAND ${OPENOCD} -c "tcl_port disabled; gdb_port disabled" ${OPTION_LIST} -c "init; halt; program $<TARGET_FILE:${TARGET}>" -c reset ${OPTION_LIST2} -c exit
VERBATIM
)
endfunction()
@@ -506,10 +510,16 @@ endfunction()
# Add flash openocd adi (Analog Devices) target
# included with msdk or compiled from release branch of https://github.com/analogdevicesinc/openocd
function(family_flash_openocd_adi TARGET)
if (DEFINED $ENV{MAXIM_PATH})
# use openocd from msdk
set(OPENOCD ENV{MAXIM_PATH}/Tools/OpenOCD/openocd)
set(OPENOCD_OPTION2 "-s ENV{MAXIM_PATH}/Tools/OpenOCD/scripts")
if (DEFINED MAXIM_PATH)
# use openocd from msdk with MAXIM_PATH cmake variable first if the user specified it
set(OPENOCD ${MAXIM_PATH}/Tools/OpenOCD/openocd)
set(OPENOCD_OPTION2 "-s ${MAXIM_PATH}/Tools/OpenOCD/scripts")
elseif (DEFINED ENV{MAXIM_PATH})
# use openocd from msdk with MAXIM_PATH environment variable. Normalize
# since msdk can be Windows (MinGW) or Linux
file(TO_CMAKE_PATH "$ENV{MAXIM_PATH}" MAXIM_PATH_NORM)
set(OPENOCD ${MAXIM_PATH_NORM}/Tools/OpenOCD/openocd)
set(OPENOCD_OPTION2 "-s ${MAXIM_PATH_NORM}/Tools/OpenOCD/scripts")
else()
# compiled from source
if (NOT DEFINED OPENOCD_ADI_PATH)

4
hw/bsp/imxrt/boards/mimxrt1015_evk/board/clock_config.c
View File

@@ -15,11 +15,11 @@
/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
!!GlobalInfo
product: Clocks v11.0
product: Clocks v15.0
processor: MIMXRT1015xxxxx
package_id: MIMXRT1015DAF5A
mcu_data: ksdk2_0
processor_version: 13.0.2
processor_version: 24.12.10
board: MIMXRT1015-EVK
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/

66
hw/bsp/imxrt/boards/mimxrt1015_evk/board/clock_config.h
View File

@@ -36,39 +36,39 @@ void BOARD_InitBootClocks(void);
#define BOARD_BOOTCLOCKRUN_CORE_CLOCK 500000000U /*!< Core clock frequency: 500000000Hz */
/* Clock outputs (values are in Hz): */
#define BOARD_BOOTCLOCKRUN_AHB_CLK_ROOT 500000000UL
#define BOARD_BOOTCLOCKRUN_CKIL_SYNC_CLK_ROOT 32768UL
#define BOARD_BOOTCLOCKRUN_CLKO1_CLK 0UL
#define BOARD_BOOTCLOCKRUN_CLKO2_CLK 0UL
#define BOARD_BOOTCLOCKRUN_CLK_1M 1000000UL
#define BOARD_BOOTCLOCKRUN_CLK_24M 24000000UL
#define BOARD_BOOTCLOCKRUN_ENET_500M_REF_CLK 500000000UL
#define BOARD_BOOTCLOCKRUN_FLEXIO1_CLK_ROOT 30000000UL
#define BOARD_BOOTCLOCKRUN_FLEXSPI_CLK_ROOT 196363636UL
#define BOARD_BOOTCLOCKRUN_GPT1_IPG_CLK_HIGHFREQ 62500000UL
#define BOARD_BOOTCLOCKRUN_GPT2_IPG_CLK_HIGHFREQ 62500000UL
#define BOARD_BOOTCLOCKRUN_IPG_CLK_ROOT 125000000UL
#define BOARD_BOOTCLOCKRUN_LPI2C_CLK_ROOT 60000000UL
#define BOARD_BOOTCLOCKRUN_LPSPI_CLK_ROOT 105600000UL
#define BOARD_BOOTCLOCKRUN_MQS_MCLK 63529411UL
#define BOARD_BOOTCLOCKRUN_PERCLK_CLK_ROOT 62500000UL
#define BOARD_BOOTCLOCKRUN_SAI1_CLK_ROOT 63529411UL
#define BOARD_BOOTCLOCKRUN_SAI1_MCLK1 63529411UL
#define BOARD_BOOTCLOCKRUN_SAI1_MCLK2 63529411UL
#define BOARD_BOOTCLOCKRUN_SAI1_MCLK3 30000000UL
#define BOARD_BOOTCLOCKRUN_SAI2_CLK_ROOT 63529411UL
#define BOARD_BOOTCLOCKRUN_SAI2_MCLK1 63529411UL
#define BOARD_BOOTCLOCKRUN_SAI2_MCLK2 0UL
#define BOARD_BOOTCLOCKRUN_SAI2_MCLK3 30000000UL
#define BOARD_BOOTCLOCKRUN_SAI3_CLK_ROOT 63529411UL
#define BOARD_BOOTCLOCKRUN_SAI3_MCLK1 63529411UL
#define BOARD_BOOTCLOCKRUN_SAI3_MCLK2 0UL
#define BOARD_BOOTCLOCKRUN_SAI3_MCLK3 30000000UL
#define BOARD_BOOTCLOCKRUN_SPDIF0_CLK_ROOT 30000000UL
#define BOARD_BOOTCLOCKRUN_SPDIF0_EXTCLK_OUT 0UL
#define BOARD_BOOTCLOCKRUN_TRACE_CLK_ROOT 117333333UL
#define BOARD_BOOTCLOCKRUN_UART_CLK_ROOT 80000000UL
#define BOARD_BOOTCLOCKRUN_USBPHY1_CLK 480000000UL
#define BOARD_BOOTCLOCKRUN_AHB_CLK_ROOT 500000000UL /* Clock consumers of AHB_CLK_ROOT output : AIPSTZ1, AIPSTZ2, AIPSTZ3, AIPSTZ4, ARM, FLEXSPI */
#define BOARD_BOOTCLOCKRUN_CKIL_SYNC_CLK_ROOT 32768UL /* Clock consumers of CKIL_SYNC_CLK_ROOT output : CSU, EWM, GPT1, GPT2, KPP, PIT, RTWDOG, SNVS, SPDIF, TEMPMON, USB, WDOG1, WDOG2 */
#define BOARD_BOOTCLOCKRUN_CLKO1_CLK 0UL /* Clock consumers of CLKO1_CLK output : N/A */
#define BOARD_BOOTCLOCKRUN_CLKO2_CLK 0UL /* Clock consumers of CLKO2_CLK output : N/A */
#define BOARD_BOOTCLOCKRUN_CLK_1M 1000000UL /* Clock consumers of CLK_1M output : EWM, RTWDOG */
#define BOARD_BOOTCLOCKRUN_CLK_24M 24000000UL /* Clock consumers of CLK_24M output : GPT1, GPT2 */
#define BOARD_BOOTCLOCKRUN_ENET_500M_REF_CLK 500000000UL /* Clock consumers of ENET_500M_REF_CLK output : N/A */
#define BOARD_BOOTCLOCKRUN_FLEXIO1_CLK_ROOT 30000000UL /* Clock consumers of FLEXIO1_CLK_ROOT output : FLEXIO1 */
#define BOARD_BOOTCLOCKRUN_FLEXSPI_CLK_ROOT 196363636UL /* Clock consumers of FLEXSPI_CLK_ROOT output : FLEXSPI */
#define BOARD_BOOTCLOCKRUN_GPT1_IPG_CLK_HIGHFREQ 62500000UL /* Clock consumers of GPT1_ipg_clk_highfreq output : GPT1 */
#define BOARD_BOOTCLOCKRUN_GPT2_IPG_CLK_HIGHFREQ 62500000UL /* Clock consumers of GPT2_ipg_clk_highfreq output : GPT2 */
#define BOARD_BOOTCLOCKRUN_IPG_CLK_ROOT 125000000UL /* Clock consumers of IPG_CLK_ROOT output : ADC1, ADC_ETC, AOI, ARM, BEE, CCM, CSU, DCDC, DCP, DMA0, DMAMUX, ENC1, EWM, FLEXIO1, FLEXRAM, FLEXSPI, GPC, GPIO1, GPIO2, GPIO3, GPIO5, IOMUXC, KPP, LPI2C1, LPI2C2, LPSPI1, LPSPI2, LPUART1, LPUART2, LPUART3, LPUART4, NVIC, OCOTP, PWM1, RTWDOG, SAI1, SAI2, SAI3, SNVS, SPDIF, SRC, TEMPMON, TMR1, TRNG, USB, WDOG1, WDOG2, XBARA, XBARB */
#define BOARD_BOOTCLOCKRUN_LPI2C_CLK_ROOT 60000000UL /* Clock consumers of LPI2C_CLK_ROOT output : LPI2C1, LPI2C2 */
#define BOARD_BOOTCLOCKRUN_LPSPI_CLK_ROOT 105600000UL /* Clock consumers of LPSPI_CLK_ROOT output : LPSPI1, LPSPI2 */
#define BOARD_BOOTCLOCKRUN_MQS_MCLK 63529411UL /* Clock consumers of MQS_MCLK output : N/A */
#define BOARD_BOOTCLOCKRUN_PERCLK_CLK_ROOT 62500000UL /* Clock consumers of PERCLK_CLK_ROOT output : GPT1, GPT2, PIT */
#define BOARD_BOOTCLOCKRUN_SAI1_CLK_ROOT 63529411UL /* Clock consumers of SAI1_CLK_ROOT output : N/A */
#define BOARD_BOOTCLOCKRUN_SAI1_MCLK1 63529411UL /* Clock consumers of SAI1_MCLK1 output : SAI1 */
#define BOARD_BOOTCLOCKRUN_SAI1_MCLK2 63529411UL /* Clock consumers of SAI1_MCLK2 output : SAI1 */
#define BOARD_BOOTCLOCKRUN_SAI1_MCLK3 30000000UL /* Clock consumers of SAI1_MCLK3 output : SAI1 */
#define BOARD_BOOTCLOCKRUN_SAI2_CLK_ROOT 63529411UL /* Clock consumers of SAI2_CLK_ROOT output : N/A */
#define BOARD_BOOTCLOCKRUN_SAI2_MCLK1 63529411UL /* Clock consumers of SAI2_MCLK1 output : SAI2 */
#define BOARD_BOOTCLOCKRUN_SAI2_MCLK2 0UL /* Clock consumers of SAI2_MCLK2 output : SAI2 */
#define BOARD_BOOTCLOCKRUN_SAI2_MCLK3 30000000UL /* Clock consumers of SAI2_MCLK3 output : SAI2 */
#define BOARD_BOOTCLOCKRUN_SAI3_CLK_ROOT 63529411UL /* Clock consumers of SAI3_CLK_ROOT output : N/A */
#define BOARD_BOOTCLOCKRUN_SAI3_MCLK1 63529411UL /* Clock consumers of SAI3_MCLK1 output : SAI3 */
#define BOARD_BOOTCLOCKRUN_SAI3_MCLK2 0UL /* Clock consumers of SAI3_MCLK2 output : SAI3 */
#define BOARD_BOOTCLOCKRUN_SAI3_MCLK3 30000000UL /* Clock consumers of SAI3_MCLK3 output : SAI3 */
#define BOARD_BOOTCLOCKRUN_SPDIF0_CLK_ROOT 30000000UL /* Clock consumers of SPDIF0_CLK_ROOT output : SPDIF */
#define BOARD_BOOTCLOCKRUN_SPDIF0_EXTCLK_OUT 0UL /* Clock consumers of SPDIF0_EXTCLK_OUT output : SPDIF */
#define BOARD_BOOTCLOCKRUN_TRACE_CLK_ROOT 117333333UL /* Clock consumers of TRACE_CLK_ROOT output : ARM */
#define BOARD_BOOTCLOCKRUN_UART_CLK_ROOT 80000000UL /* Clock consumers of UART_CLK_ROOT output : LPUART1, LPUART2, LPUART3, LPUART4 */
#define BOARD_BOOTCLOCKRUN_USBPHY1_CLK 480000000UL /* Clock consumers of USBPHY1_CLK output : TEMPMON, USB */
/*! @brief Usb1 PLL set for BOARD_BootClockRUN configuration.
*/

35
hw/bsp/imxrt/boards/mimxrt1015_evk/board/pin_mux.c
View File

@@ -6,11 +6,11 @@
/*
* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
!!GlobalInfo
product: Pins v13.1
product: Pins v17.0
processor: MIMXRT1015xxxxx
package_id: MIMXRT1015DAF5A
mcu_data: ksdk2_0
processor_version: 13.0.2
processor_version: 24.12.10
board: MIMXRT1015-EVK
external_user_signals: {}
pin_labels:
@@ -32,6 +32,7 @@ power_domains: {NVCC_GPIO: '3.3'}
* END ****************************************************************************************************************/
void BOARD_InitBootPins(void) {
BOARD_InitPins();
BOARD_InitDEBUG_UARTPins();
}
/*
@@ -40,8 +41,6 @@ BOARD_InitPins:
- options: {callFromInitBoot: 'true', coreID: core0, enableClock: 'true'}
- pin_list:
- {pin_num: '1', peripheral: GPIO2, signal: 'gpio_io, 09', pin_signal: GPIO_EMC_09, direction: INPUT, pull_keeper_select: Pull, pull_up_down_config: Pull_Up_47K_Ohm}
- {pin_num: '68', peripheral: LPUART1, signal: RX, pin_signal: GPIO_AD_B0_07, pull_up_down_config: Pull_Down_100K_Ohm}
- {pin_num: '72', peripheral: LPUART1, signal: TX, pin_signal: GPIO_AD_B0_06}
- {pin_num: '21', peripheral: GPIO3, signal: 'gpio_io, 21', pin_signal: GPIO_SD_B1_01, direction: OUTPUT}
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
*/
@@ -73,15 +72,11 @@ void BOARD_InitPins(void) {
/* Initialize GPIO functionality on GPIO_SD_B1_01 (pin 21) */
GPIO_PinInit(GPIO3, 21U, &USER_LED_config);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_06_LPUART1_TX, 0U);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_07_LPUART1_RX, 0U);
IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_09_GPIO2_IO09, 0U);
IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_01_GPIO3_IO21, 0U);
IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_07_LPUART1_RX, 0x10B0U);
IOMUXC_SetPinConfig(IOMUXC_GPIO_EMC_09_GPIO2_IO09, 0x70B0U);
}
/*
* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
BOARD_InitQSPIPins:
@@ -113,6 +108,30 @@ void BOARD_InitQSPIPins(void) {
IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_11_FLEXSPI_A_SS0_B, 0U);
}
/*
* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
BOARD_InitDEBUG_UARTPins:
- options: {callFromInitBoot: 'true', coreID: core0, enableClock: 'true'}
- pin_list:
- {pin_num: '68', peripheral: LPUART1, signal: RX, pin_signal: GPIO_AD_B0_07, slew_rate: Slow}
- {pin_num: '72', peripheral: LPUART1, signal: TX, pin_signal: GPIO_AD_B0_06, slew_rate: Slow}
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
*/
/* FUNCTION ************************************************************************************************************
*
* Function Name : BOARD_InitDEBUG_UARTPins
* Description : Configures pin routing and optionally pin electrical features.
*
* END ****************************************************************************************************************/
void BOARD_InitDEBUG_UARTPins(void) {
CLOCK_EnableClock(kCLOCK_Iomuxc);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_06_LPUART1_TX, 0U);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_07_LPUART1_RX, 0U);
IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_06_LPUART1_TX, 0x10B0U);
IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_07_LPUART1_RX, 0x10B0U);
}
/***********************************************************************************************************************
* EOF
**********************************************************************************************************************/

30
hw/bsp/imxrt/boards/mimxrt1015_evk/board/pin_mux.h
View File

@@ -37,7 +37,7 @@ extern "C" {
*/
void BOARD_InitBootPins(void);
/* GPIO_EMC_09 (number 1), USER_BUTTON */
/* GPIO_EMC_09 (number 1), USER_BUTTON/SW4 */
/* Routed pin properties */
#define BOARD_INITPINS_USER_BUTTON_PERIPHERAL GPIO2 /*!< Peripheral name */
#define BOARD_INITPINS_USER_BUTTON_SIGNAL gpio_io /*!< Signal name */
@@ -51,16 +51,6 @@ void BOARD_InitBootPins(void);
#define BOARD_INITPINS_USER_BUTTON_PIN 9U /*!< PORT pin number */
#define BOARD_INITPINS_USER_BUTTON_PIN_MASK (1U << 9U) /*!< PORT pin mask */
/* GPIO_AD_B0_07 (number 68), LPUART1_RXD */
/* Routed pin properties */
#define BOARD_INITPINS_UART1_RXD_PERIPHERAL LPUART1 /*!< Peripheral name */
#define BOARD_INITPINS_UART1_RXD_SIGNAL RX /*!< Signal name */
/* GPIO_AD_B0_06 (number 72), LPUART1_TXD */
/* Routed pin properties */
#define BOARD_INITPINS_UART1_TXD_PERIPHERAL LPUART1 /*!< Peripheral name */
#define BOARD_INITPINS_UART1_TXD_SIGNAL TX /*!< Signal name */
/* GPIO_SD_B1_01 (number 21), GPIO SD_B1_01 */
/* Routed pin properties */
#define BOARD_INITPINS_USER_LED_PERIPHERAL GPIO3 /*!< Peripheral name */
@@ -69,6 +59,7 @@ void BOARD_InitBootPins(void);
/* Symbols to be used with GPIO driver */
#define BOARD_INITPINS_USER_LED_GPIO GPIO3 /*!< GPIO peripheral base pointer */
#define BOARD_INITPINS_USER_LED_INIT_GPIO_VALUE 0U /*!< GPIO output initial state */
#define BOARD_INITPINS_USER_LED_GPIO_PIN 21U /*!< GPIO pin number */
#define BOARD_INITPINS_USER_LED_GPIO_PIN_MASK (1U << 21U) /*!< GPIO pin mask */
#define BOARD_INITPINS_USER_LED_PORT GPIO3 /*!< PORT peripheral base pointer */
@@ -119,6 +110,23 @@ void BOARD_InitPins(void);
*/
void BOARD_InitQSPIPins(void);
/* GPIO_AD_B0_07 (number 68), LPUART1_RXD */
/* Routed pin properties */
#define BOARD_INITDEBUG_UARTPINS_UART1_RXD_PERIPHERAL LPUART1 /*!< Peripheral name */
#define BOARD_INITDEBUG_UARTPINS_UART1_RXD_SIGNAL RX /*!< Signal name */
/* GPIO_AD_B0_06 (number 72), LPUART1_TXD */
/* Routed pin properties */
#define BOARD_INITDEBUG_UARTPINS_UART1_TXD_PERIPHERAL LPUART1 /*!< Peripheral name */
#define BOARD_INITDEBUG_UARTPINS_UART1_TXD_SIGNAL TX /*!< Signal name */
/*!
* @brief Configures pin routing and optionally pin electrical features.
*
*/
void BOARD_InitDEBUG_UARTPins(void);
#if defined(__cplusplus)
}
#endif

63
hw/bsp/imxrt/boards/mimxrt1015_evk/mimxrt1015_evk.mex
View File

@@ -1,5 +1,5 @@
<?xml version="1.0" encoding= "UTF-8" ?>
<configuration name="MIMXRT1015-EVK" xsi:schemaLocation="http://mcuxpresso.nxp.com/XSD/mex_configuration_13 http://mcuxpresso.nxp.com/XSD/mex_configuration_13.xsd" uuid="4be4468a-3124-4ac9-9d4f-05d5f8ad6399" version="13" xmlns="http://mcuxpresso.nxp.com/XSD/mex_configuration_13" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
<configuration name="MIMXRT1015-EVK" xsi:schemaLocation="http://mcuxpresso.nxp.com/XSD/mex_configuration_17 http://mcuxpresso.nxp.com/XSD/mex_configuration_17.xsd" uuid="4be4468a-3124-4ac9-9d4f-05d5f8ad6399" version="17" xmlns="http://mcuxpresso.nxp.com/XSD/mex_configuration_17" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
<common>
<processor>MIMXRT1015xxxxx</processor>
<package>MIMXRT1015DAF5A</package>
@@ -13,19 +13,18 @@
</common>
<preferences>
<validate_boot_init_only>true</validate_boot_init_only>
<generate_extended_information>false</generate_extended_information>
<generate_code_modified_registers_only>false</generate_code_modified_registers_only>
<update_include_paths>true</update_include_paths>
<generate_registers_defines>false</generate_registers_defines>
</preferences>
<tools>
<pins name="Pins" version="13.1" enabled="true" update_project_code="true">
<pins name="Pins" version="17.0" enabled="true" update_project_code="true">
<generated_project_files>
<file path="board/pin_mux.c" update_enabled="true"/>
<file path="board/pin_mux.h" update_enabled="true"/>
</generated_project_files>
<pins_profile>
<processor_version>13.0.2</processor_version>
<processor_version>24.12.10</processor_version>
<pin_labels>
<pin_label pin_num="21" pin_signal="GPIO_SD_B1_01" label="GPIO SD_B1_01" identifier="USER_LED"/>
</pin_labels>
@@ -45,12 +44,7 @@
<enableClock>true</enableClock>
</options>
<dependencies>
<dependency resourceType="Peripheral" resourceId="GPIO2" description="Peripheral GPIO2 is not initialized" problem_level="1" source="Pins:BOARD_InitPins">
<feature name="initialized" evaluation="equal">
<data>true</data>
</feature>
</dependency>
<dependency resourceType="Peripheral" resourceId="LPUART1" description="Peripheral LPUART1 is not initialized" problem_level="1" source="Pins:BOARD_InitPins">
<dependency resourceType="Peripheral" resourceId="GPIO2" description="Peripheral GPIO2 signals are routed in the Pins Tool, but the peripheral is not initialized in the Peripherals Tool." problem_level="1" source="Pins:BOARD_InitPins">
<feature name="initialized" evaluation="equal">
<data>true</data>
</feature>
@@ -79,12 +73,6 @@
<pin_feature name="pull_up_down_config" value="Pull_Up_47K_Ohm"/>
</pin_features>
</pin>
<pin peripheral="LPUART1" signal="RX" pin_num="68" pin_signal="GPIO_AD_B0_07">
<pin_features>
<pin_feature name="pull_up_down_config" value="Pull_Down_100K_Ohm"/>
</pin_features>
</pin>
<pin peripheral="LPUART1" signal="TX" pin_num="72" pin_signal="GPIO_AD_B0_06"/>
<pin peripheral="GPIO3" signal="gpio_io, 21" pin_num="21" pin_signal="GPIO_SD_B1_01">
<pin_features>
<pin_feature name="direction" value="OUTPUT"/>
@@ -100,7 +88,7 @@
<enableClock>true</enableClock>
</options>
<dependencies>
<dependency resourceType="Peripheral" resourceId="FLEXSPI" description="Peripheral FLEXSPI is not initialized" problem_level="1" source="Pins:BOARD_InitQSPIPins">
<dependency resourceType="Peripheral" resourceId="FLEXSPI" description="Peripheral FLEXSPI signals are routed in the Pins Tool, but the peripheral is not initialized in the Peripherals Tool." problem_level="1" source="Pins:BOARD_InitQSPIPins">
<feature name="initialized" evaluation="equal">
<data>true</data>
</feature>
@@ -125,15 +113,52 @@
<pin peripheral="FLEXSPI" signal="FLEXSPI_A_SS0_B" pin_num="8" pin_signal="GPIO_SD_B1_11"/>
</pins>
</function>
<function name="BOARD_InitDEBUG_UARTPins">
<description>Configures pin routing and optionally pin electrical features.</description>
<options>
<callFromInitBoot>true</callFromInitBoot>
<coreID>core0</coreID>
<enableClock>true</enableClock>
</options>
<dependencies>
<dependency resourceType="Peripheral" resourceId="LPUART1" description="Peripheral LPUART1 signals are routed in the Pins Tool, but the peripheral is not initialized in the Peripherals Tool." problem_level="1" source="Pins:BOARD_InitDEBUG_UARTPins">
<feature name="initialized" evaluation="equal">
<data>true</data>
</feature>
</dependency>
<dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitDEBUG_UARTPins">
<feature name="enabled" evaluation="equal" configuration="core0">
<data>true</data>
</feature>
</dependency>
<dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Pins initialization requires the IOMUXC Driver in the project." problem_level="2" source="Pins:BOARD_InitDEBUG_UARTPins">
<feature name="enabled" evaluation="equal" configuration="core0">
<data>true</data>
</feature>
</dependency>
</dependencies>
<pins>
<pin peripheral="LPUART1" signal="RX" pin_num="68" pin_signal="GPIO_AD_B0_07">
<pin_features>
<pin_feature name="slew_rate" value="Slow"/>
</pin_features>
</pin>
<pin peripheral="LPUART1" signal="TX" pin_num="72" pin_signal="GPIO_AD_B0_06">
<pin_features>
<pin_feature name="slew_rate" value="Slow"/>
</pin_features>
</pin>
</pins>
</function>
</functions_list>
</pins>
<clocks name="Clocks" version="11.0" enabled="true" update_project_code="true">
<clocks name="Clocks" version="15.0" enabled="true" update_project_code="true">
<generated_project_files>
<file path="board/clock_config.c" update_enabled="true"/>
<file path="board/clock_config.h" update_enabled="true"/>
</generated_project_files>
<clocks_profile>
<processor_version>13.0.2</processor_version>
<processor_version>24.12.10</processor_version>
</clocks_profile>
<clock_configurations>
<clock_configuration name="BOARD_BootClockRUN" id_prefix="" prefix_user_defined="false">

4
hw/bsp/imxrt/boards/mimxrt1064_evk/board/clock_config.c
View File

@@ -15,11 +15,11 @@
/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
!!GlobalInfo
product: Clocks v11.0
product: Clocks v15.0
processor: MIMXRT1064xxxxA
package_id: MIMXRT1064DVL6A
mcu_data: ksdk2_0
processor_version: 13.0.2
processor_version: 24.12.10
board: MIMXRT1064-EVK
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/

100
hw/bsp/imxrt/boards/mimxrt1064_evk/board/clock_config.h
View File

@@ -36,56 +36,56 @@ void BOARD_InitBootClocks(void);
#define BOARD_BOOTCLOCKRUN_CORE_CLOCK 600000000U /*!< Core clock frequency: 600000000Hz */
/* Clock outputs (values are in Hz): */
#define BOARD_BOOTCLOCKRUN_AHB_CLK_ROOT 600000000UL
#define BOARD_BOOTCLOCKRUN_CAN_CLK_ROOT 40000000UL
#define BOARD_BOOTCLOCKRUN_CKIL_SYNC_CLK_ROOT 32768UL
#define BOARD_BOOTCLOCKRUN_CLKO1_CLK 0UL
#define BOARD_BOOTCLOCKRUN_CLKO2_CLK 0UL
#define BOARD_BOOTCLOCKRUN_CLK_1M 1000000UL
#define BOARD_BOOTCLOCKRUN_CLK_24M 24000000UL
#define BOARD_BOOTCLOCKRUN_CSI_CLK_ROOT 12000000UL
#define BOARD_BOOTCLOCKRUN_ENET2_125M_CLK 1200000UL
#define BOARD_BOOTCLOCKRUN_ENET2_REF_CLK 0UL
#define BOARD_BOOTCLOCKRUN_ENET2_TX_CLK 0UL
#define BOARD_BOOTCLOCKRUN_ENET_125M_CLK 2400000UL
#define BOARD_BOOTCLOCKRUN_ENET_25M_REF_CLK 1200000UL
#define BOARD_BOOTCLOCKRUN_ENET_REF_CLK 0UL
#define BOARD_BOOTCLOCKRUN_ENET_TX_CLK 0UL
#define BOARD_BOOTCLOCKRUN_FLEXIO1_CLK_ROOT 30000000UL
#define BOARD_BOOTCLOCKRUN_FLEXIO2_CLK_ROOT 30000000UL
#define BOARD_BOOTCLOCKRUN_FLEXSPI2_CLK_ROOT 130909090UL
#define BOARD_BOOTCLOCKRUN_FLEXSPI_CLK_ROOT 130909090UL
#define BOARD_BOOTCLOCKRUN_GPT1_IPG_CLK_HIGHFREQ 75000000UL
#define BOARD_BOOTCLOCKRUN_GPT2_IPG_CLK_HIGHFREQ 75000000UL
#define BOARD_BOOTCLOCKRUN_IPG_CLK_ROOT 150000000UL
#define BOARD_BOOTCLOCKRUN_LCDIF_CLK_ROOT 67500000UL
#define BOARD_BOOTCLOCKRUN_LPI2C_CLK_ROOT 60000000UL
#define BOARD_BOOTCLOCKRUN_LPSPI_CLK_ROOT 105600000UL
#define BOARD_BOOTCLOCKRUN_LVDS1_CLK 1200000000UL
#define BOARD_BOOTCLOCKRUN_MQS_MCLK 63529411UL
#define BOARD_BOOTCLOCKRUN_PERCLK_CLK_ROOT 75000000UL
#define BOARD_BOOTCLOCKRUN_PLL7_MAIN_CLK 480000000UL
#define BOARD_BOOTCLOCKRUN_SAI1_CLK_ROOT 63529411UL
#define BOARD_BOOTCLOCKRUN_SAI1_MCLK1 63529411UL
#define BOARD_BOOTCLOCKRUN_SAI1_MCLK2 63529411UL
#define BOARD_BOOTCLOCKRUN_SAI1_MCLK3 30000000UL
#define BOARD_BOOTCLOCKRUN_SAI2_CLK_ROOT 63529411UL
#define BOARD_BOOTCLOCKRUN_SAI2_MCLK1 63529411UL
#define BOARD_BOOTCLOCKRUN_SAI2_MCLK2 0UL
#define BOARD_BOOTCLOCKRUN_SAI2_MCLK3 30000000UL
#define BOARD_BOOTCLOCKRUN_SAI3_CLK_ROOT 63529411UL
#define BOARD_BOOTCLOCKRUN_SAI3_MCLK1 63529411UL
#define BOARD_BOOTCLOCKRUN_SAI3_MCLK2 0UL
#define BOARD_BOOTCLOCKRUN_SAI3_MCLK3 30000000UL
#define BOARD_BOOTCLOCKRUN_SEMC_CLK_ROOT 75000000UL
#define BOARD_BOOTCLOCKRUN_SPDIF0_CLK_ROOT 30000000UL
#define BOARD_BOOTCLOCKRUN_SPDIF0_EXTCLK_OUT 0UL
#define BOARD_BOOTCLOCKRUN_TRACE_CLK_ROOT 132000000UL
#define BOARD_BOOTCLOCKRUN_UART_CLK_ROOT 80000000UL
#define BOARD_BOOTCLOCKRUN_USBPHY1_CLK 480000000UL
#define BOARD_BOOTCLOCKRUN_USBPHY2_CLK 480000000UL
#define BOARD_BOOTCLOCKRUN_USDHC1_CLK_ROOT 198000000UL
#define BOARD_BOOTCLOCKRUN_USDHC2_CLK_ROOT 198000000UL
#define BOARD_BOOTCLOCKRUN_AHB_CLK_ROOT 600000000UL /* Clock consumers of AHB_CLK_ROOT output : AIPSTZ1, AIPSTZ2, AIPSTZ3, AIPSTZ4, ARM, FLEXIO3, FLEXSPI, FLEXSPI2, GPIO6, GPIO7, GPIO8, GPIO9 */
#define BOARD_BOOTCLOCKRUN_CAN_CLK_ROOT 40000000UL /* Clock consumers of CAN_CLK_ROOT output : CAN1, CAN2, CAN3 */
#define BOARD_BOOTCLOCKRUN_CKIL_SYNC_CLK_ROOT 32768UL /* Clock consumers of CKIL_SYNC_CLK_ROOT output : CSU, EWM, GPT1, GPT2, KPP, PIT, RTWDOG, SNVS, SPDIF, TEMPMON, TSC, USB1, USB2, WDOG1, WDOG2 */
#define BOARD_BOOTCLOCKRUN_CLKO1_CLK 0UL /* Clock consumers of CLKO1_CLK output : N/A */
#define BOARD_BOOTCLOCKRUN_CLKO2_CLK 0UL /* Clock consumers of CLKO2_CLK output : N/A */
#define BOARD_BOOTCLOCKRUN_CLK_1M 1000000UL /* Clock consumers of CLK_1M output : EWM, RTWDOG */
#define BOARD_BOOTCLOCKRUN_CLK_24M 24000000UL /* Clock consumers of CLK_24M output : GPT1, GPT2 */
#define BOARD_BOOTCLOCKRUN_CSI_CLK_ROOT 12000000UL /* Clock consumers of CSI_CLK_ROOT output : CSI */
#define BOARD_BOOTCLOCKRUN_ENET2_125M_CLK 1200000UL /* Clock consumers of ENET2_125M_CLK output : N/A */
#define BOARD_BOOTCLOCKRUN_ENET2_REF_CLK 0UL /* Clock consumers of ENET2_REF_CLK output : ENET2 */
#define BOARD_BOOTCLOCKRUN_ENET2_TX_CLK 0UL /* Clock consumers of ENET2_TX_CLK output : ENET2 */
#define BOARD_BOOTCLOCKRUN_ENET_125M_CLK 2400000UL /* Clock consumers of ENET_125M_CLK output : N/A */
#define BOARD_BOOTCLOCKRUN_ENET_25M_REF_CLK 1200000UL /* Clock consumers of ENET_25M_REF_CLK output : ENET, ENET2 */
#define BOARD_BOOTCLOCKRUN_ENET_REF_CLK 0UL /* Clock consumers of ENET_REF_CLK output : ENET */
#define BOARD_BOOTCLOCKRUN_ENET_TX_CLK 0UL /* Clock consumers of ENET_TX_CLK output : ENET */
#define BOARD_BOOTCLOCKRUN_FLEXIO1_CLK_ROOT 30000000UL /* Clock consumers of FLEXIO1_CLK_ROOT output : FLEXIO1 */
#define BOARD_BOOTCLOCKRUN_FLEXIO2_CLK_ROOT 30000000UL /* Clock consumers of FLEXIO2_CLK_ROOT output : FLEXIO2, FLEXIO3 */
#define BOARD_BOOTCLOCKRUN_FLEXSPI2_CLK_ROOT 130909090UL /* Clock consumers of FLEXSPI2_CLK_ROOT output : FLEXSPI2 */
#define BOARD_BOOTCLOCKRUN_FLEXSPI_CLK_ROOT 130909090UL /* Clock consumers of FLEXSPI_CLK_ROOT output : FLEXSPI */
#define BOARD_BOOTCLOCKRUN_GPT1_IPG_CLK_HIGHFREQ 75000000UL /* Clock consumers of GPT1_ipg_clk_highfreq output : GPT1 */
#define BOARD_BOOTCLOCKRUN_GPT2_IPG_CLK_HIGHFREQ 75000000UL /* Clock consumers of GPT2_ipg_clk_highfreq output : GPT2 */
#define BOARD_BOOTCLOCKRUN_IPG_CLK_ROOT 150000000UL /* Clock consumers of IPG_CLK_ROOT output : ADC1, ADC2, ADC_ETC, AOI1, AOI2, ARM, BEE, CAN1, CAN2, CAN3, CCM, CMP1, CMP2, CMP3, CMP4, CSI, CSU, DCDC, DCP, DMA0, DMAMUX, ENC1, ENC2, ENC3, ENC4, ENET, ENET2, EWM, FLEXIO1, FLEXIO2, FLEXIO3, FLEXRAM, FLEXSPI, FLEXSPI2, GPC, GPIO1, GPIO10, GPIO2, GPIO3, GPIO4, GPIO5, IOMUXC, KPP, LCDIF, LPI2C1, LPI2C2, LPI2C3, LPI2C4, LPSPI1, LPSPI2, LPSPI3, LPSPI4, LPUART1, LPUART2, LPUART3, LPUART4, LPUART5, LPUART6, LPUART7, LPUART8, NVIC, OCOTP, PMU, PWM1, PWM2, PWM3, PWM4, PXP, ROMC, RTWDOG, SAI1, SAI2, SAI3, SNVS, SPDIF, SRC, TEMPMON, TMR1, TMR2, TMR3, TMR4, TRNG, TSC, USB1, USB2, USDHC1, USDHC2, WDOG1, WDOG2, XBARA1, XBARB2, XBARB3 */
#define BOARD_BOOTCLOCKRUN_LCDIF_CLK_ROOT 67500000UL /* Clock consumers of LCDIF_CLK_ROOT output : LCDIF */
#define BOARD_BOOTCLOCKRUN_LPI2C_CLK_ROOT 60000000UL /* Clock consumers of LPI2C_CLK_ROOT output : LPI2C1, LPI2C2, LPI2C3, LPI2C4 */
#define BOARD_BOOTCLOCKRUN_LPSPI_CLK_ROOT 105600000UL /* Clock consumers of LPSPI_CLK_ROOT output : LPSPI1, LPSPI2, LPSPI3, LPSPI4 */
#define BOARD_BOOTCLOCKRUN_LVDS1_CLK 1200000000UL /* Clock consumers of LVDS1_CLK output : N/A */
#define BOARD_BOOTCLOCKRUN_MQS_MCLK 63529411UL /* Clock consumers of MQS_MCLK output : N/A */
#define BOARD_BOOTCLOCKRUN_PERCLK_CLK_ROOT 75000000UL /* Clock consumers of PERCLK_CLK_ROOT output : GPT1, GPT2, PIT */
#define BOARD_BOOTCLOCKRUN_PLL7_MAIN_CLK 480000000UL /* Clock consumers of PLL7_MAIN_CLK output : N/A */
#define BOARD_BOOTCLOCKRUN_SAI1_CLK_ROOT 63529411UL /* Clock consumers of SAI1_CLK_ROOT output : N/A */
#define BOARD_BOOTCLOCKRUN_SAI1_MCLK1 63529411UL /* Clock consumers of SAI1_MCLK1 output : SAI1 */
#define BOARD_BOOTCLOCKRUN_SAI1_MCLK2 63529411UL /* Clock consumers of SAI1_MCLK2 output : SAI1 */
#define BOARD_BOOTCLOCKRUN_SAI1_MCLK3 30000000UL /* Clock consumers of SAI1_MCLK3 output : SAI1 */
#define BOARD_BOOTCLOCKRUN_SAI2_CLK_ROOT 63529411UL /* Clock consumers of SAI2_CLK_ROOT output : N/A */
#define BOARD_BOOTCLOCKRUN_SAI2_MCLK1 63529411UL /* Clock consumers of SAI2_MCLK1 output : SAI2 */
#define BOARD_BOOTCLOCKRUN_SAI2_MCLK2 0UL /* Clock consumers of SAI2_MCLK2 output : SAI2 */
#define BOARD_BOOTCLOCKRUN_SAI2_MCLK3 30000000UL /* Clock consumers of SAI2_MCLK3 output : SAI2 */
#define BOARD_BOOTCLOCKRUN_SAI3_CLK_ROOT 63529411UL /* Clock consumers of SAI3_CLK_ROOT output : N/A */
#define BOARD_BOOTCLOCKRUN_SAI3_MCLK1 63529411UL /* Clock consumers of SAI3_MCLK1 output : SAI3 */
#define BOARD_BOOTCLOCKRUN_SAI3_MCLK2 0UL /* Clock consumers of SAI3_MCLK2 output : SAI3 */
#define BOARD_BOOTCLOCKRUN_SAI3_MCLK3 30000000UL /* Clock consumers of SAI3_MCLK3 output : SAI3 */
#define BOARD_BOOTCLOCKRUN_SEMC_CLK_ROOT 75000000UL /* Clock consumers of SEMC_CLK_ROOT output : SEMC */
#define BOARD_BOOTCLOCKRUN_SPDIF0_CLK_ROOT 30000000UL /* Clock consumers of SPDIF0_CLK_ROOT output : SPDIF */
#define BOARD_BOOTCLOCKRUN_SPDIF0_EXTCLK_OUT 0UL /* Clock consumers of SPDIF0_EXTCLK_OUT output : SPDIF */
#define BOARD_BOOTCLOCKRUN_TRACE_CLK_ROOT 132000000UL /* Clock consumers of TRACE_CLK_ROOT output : ARM */
#define BOARD_BOOTCLOCKRUN_UART_CLK_ROOT 80000000UL /* Clock consumers of UART_CLK_ROOT output : LPUART1, LPUART2, LPUART3, LPUART4, LPUART5, LPUART6, LPUART7, LPUART8 */
#define BOARD_BOOTCLOCKRUN_USBPHY1_CLK 480000000UL /* Clock consumers of USBPHY1_CLK output : TEMPMON, USB1 */
#define BOARD_BOOTCLOCKRUN_USBPHY2_CLK 480000000UL /* Clock consumers of USBPHY2_CLK output : USB2 */
#define BOARD_BOOTCLOCKRUN_USDHC1_CLK_ROOT 198000000UL /* Clock consumers of USDHC1_CLK_ROOT output : USDHC1 */
#define BOARD_BOOTCLOCKRUN_USDHC2_CLK_ROOT 198000000UL /* Clock consumers of USDHC2_CLK_ROOT output : USDHC2 */
/*! @brief Arm PLL set for BOARD_BootClockRUN configuration.
*/

13
hw/bsp/imxrt/boards/mimxrt1064_evk/board/pin_mux.c
View File

@@ -6,11 +6,11 @@
/*
* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
!!GlobalInfo
product: Pins v13.1
product: Pins v17.0
processor: MIMXRT1064xxxxA
package_id: MIMXRT1064DVL6A
mcu_data: ksdk2_0
processor_version: 13.0.2
processor_version: 24.12.10
board: MIMXRT1064-EVK
pin_labels:
- {pin_num: F14, pin_signal: GPIO_AD_B0_09, label: 'JTAG_TDI/J21[5]/ENET_RST/J22[5]', identifier: USER_LED}
@@ -81,7 +81,6 @@ void BOARD_InitPins(void) {
IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_09_GPIO1_IO09, 0x50A0U);
}
/*
* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
BOARD_InitDEBUG_UARTPins:
@@ -109,7 +108,6 @@ void BOARD_InitDEBUG_UARTPins(void) {
IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_13_LPUART1_RX, 0x10B0U);
}
/*
* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
BOARD_InitSDRAMPins:
@@ -209,7 +207,6 @@ void BOARD_InitSDRAMPins(void) {
IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_39_SEMC_DQS, 0U);
}
/*
* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
BOARD_InitCSIPins:
@@ -267,7 +264,6 @@ void BOARD_InitCSIPins(void) {
IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B1_01_LPI2C1_SDA, 0xD8B0U);
}
/*
* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
BOARD_InitLCDPins:
@@ -360,7 +356,6 @@ void BOARD_InitLCDPins(void) {
IOMUXC_SetPinConfig(IOMUXC_GPIO_B1_15_GPIO2_IO31, 0x10B0U);
}
/*
* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
BOARD_InitCANPins:
@@ -384,7 +379,6 @@ void BOARD_InitCANPins(void) {
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_15_FLEXCAN2_RX, 0U);
}
/*
* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
BOARD_InitENETPins:
@@ -424,7 +418,6 @@ void BOARD_InitENETPins(void) {
IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_41_ENET_MDIO, 0U);
}
/*
* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
BOARD_InitUSDHCPins:
@@ -458,7 +451,6 @@ void BOARD_InitUSDHCPins(void) {
IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B0_05_USDHC1_DATA3, 0U);
}
/*
* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
BOARD_InitQSPIPins:
@@ -491,7 +483,6 @@ void BOARD_InitQSPIPins(void) {
IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_10_FLEXSPIA_DATA02, 0U);
IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_11_FLEXSPIA_DATA03, 0U);
}
/***********************************************************************************************************************
* EOF
**********************************************************************************************************************/

1
hw/bsp/imxrt/boards/mimxrt1064_evk/board/pin_mux.h
View File

@@ -47,6 +47,7 @@ void BOARD_InitBootPins(void);
/* Symbols to be used with GPIO driver */
#define BOARD_INITPINS_USER_LED_GPIO GPIO1 /*!< GPIO peripheral base pointer */
#define BOARD_INITPINS_USER_LED_INIT_GPIO_VALUE 0U /*!< GPIO output initial state */
#define BOARD_INITPINS_USER_LED_GPIO_PIN 9U /*!< GPIO pin number */
#define BOARD_INITPINS_USER_LED_GPIO_PIN_MASK (1U << 9U) /*!< GPIO pin mask */
#define BOARD_INITPINS_USER_LED_PORT GPIO1 /*!< PORT peripheral base pointer */

36
hw/bsp/imxrt/boards/mimxrt1064_evk/mimxrt1064_evk.mex
View File

@@ -1,5 +1,5 @@
<?xml version="1.0" encoding= "UTF-8" ?>
<configuration name="MIMXRT1064-EVK" xsi:schemaLocation="http://mcuxpresso.nxp.com/XSD/mex_configuration_13 http://mcuxpresso.nxp.com/XSD/mex_configuration_13.xsd" uuid="d75e55f6-68ab-46ef-814b-b94593af7f06" version="13" xmlns="http://mcuxpresso.nxp.com/XSD/mex_configuration_13" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
<configuration name="MIMXRT1064-EVK" xsi:schemaLocation="http://mcuxpresso.nxp.com/XSD/mex_configuration_17 http://mcuxpresso.nxp.com/XSD/mex_configuration_17.xsd" uuid="d75e55f6-68ab-46ef-814b-b94593af7f06" version="17" xmlns="http://mcuxpresso.nxp.com/XSD/mex_configuration_17" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
<common>
<processor>MIMXRT1064xxxxA</processor>
<package>MIMXRT1064DVL6A</package>
@@ -13,19 +13,18 @@
</common>
<preferences>
<validate_boot_init_only>true</validate_boot_init_only>
<generate_extended_information>false</generate_extended_information>
<generate_code_modified_registers_only>false</generate_code_modified_registers_only>
<update_include_paths>true</update_include_paths>
<generate_registers_defines>false</generate_registers_defines>
</preferences>
<tools>
<pins name="Pins" version="13.1" enabled="true" update_project_code="true">
<pins name="Pins" version="17.0" enabled="true" update_project_code="true">
<generated_project_files>
<file path="board/pin_mux.c" update_enabled="true"/>
<file path="board/pin_mux.h" update_enabled="true"/>
</generated_project_files>
<pins_profile>
<processor_version>13.0.2</processor_version>
<processor_version>24.12.10</processor_version>
<pin_labels>
<pin_label pin_num="F14" pin_signal="GPIO_AD_B0_09" label="JTAG_TDI/J21[5]/ENET_RST/J22[5]" identifier="USER_LED"/>
<pin_label pin_num="L6" pin_signal="WAKEUP" label="SD_PWREN" identifier="USER_BUTTON"/>
@@ -41,7 +40,7 @@
<enableClock>true</enableClock>
</options>
<dependencies>
<dependency resourceType="Peripheral" resourceId="GPIO5" description="Peripheral GPIO5 is not initialized" problem_level="1" source="Pins:BOARD_InitPins">
<dependency resourceType="Peripheral" resourceId="GPIO5" description="Peripheral GPIO5 signals are routed in the Pins Tool, but the peripheral is not initialized in the Peripherals Tool." problem_level="1" source="Pins:BOARD_InitPins">
<feature name="initialized" evaluation="equal">
<data>true</data>
</feature>
@@ -84,7 +83,7 @@
<enableClock>true</enableClock>
</options>
<dependencies>
<dependency resourceType="Peripheral" resourceId="LPUART1" description="Peripheral LPUART1 is not initialized" problem_level="1" source="Pins:BOARD_InitDEBUG_UARTPins">
<dependency resourceType="Peripheral" resourceId="LPUART1" description="Peripheral LPUART1 signals are routed in the Pins Tool, but the peripheral is not initialized in the Peripherals Tool." problem_level="1" source="Pins:BOARD_InitDEBUG_UARTPins">
<feature name="initialized" evaluation="equal">
<data>true</data>
</feature>
@@ -137,7 +136,7 @@
<enableClock>true</enableClock>
</options>
<dependencies>
<dependency resourceType="Peripheral" resourceId="SEMC" description="Peripheral SEMC is not initialized" problem_level="1" source="Pins:BOARD_InitSDRAMPins">
<dependency resourceType="Peripheral" resourceId="SEMC" description="Peripheral SEMC signals are routed in the Pins Tool, but the peripheral is not initialized in the Peripherals Tool." problem_level="1" source="Pins:BOARD_InitSDRAMPins">
<feature name="initialized" evaluation="equal">
<data>true</data>
</feature>
@@ -204,12 +203,12 @@
<enableClock>true</enableClock>
</options>
<dependencies>
<dependency resourceType="Peripheral" resourceId="CSI" description="Peripheral CSI is not initialized" problem_level="1" source="Pins:BOARD_InitCSIPins">
<dependency resourceType="Peripheral" resourceId="CSI" description="Peripheral CSI signals are routed in the Pins Tool, but the peripheral is not initialized in the Peripherals Tool." problem_level="1" source="Pins:BOARD_InitCSIPins">
<feature name="initialized" evaluation="equal">
<data>true</data>
</feature>
</dependency>
<dependency resourceType="Peripheral" resourceId="LPI2C1" description="Peripheral LPI2C1 is not initialized" problem_level="1" source="Pins:BOARD_InitCSIPins">
<dependency resourceType="Peripheral" resourceId="LPI2C1" description="Peripheral LPI2C1 signals are routed in the Pins Tool, but the peripheral is not initialized in the Peripherals Tool." problem_level="1" source="Pins:BOARD_InitCSIPins">
<feature name="initialized" evaluation="equal">
<data>true</data>
</feature>
@@ -277,7 +276,7 @@
<enableClock>true</enableClock>
</options>
<dependencies>
<dependency resourceType="Peripheral" resourceId="LCDIF" description="Peripheral LCDIF is not initialized" problem_level="1" source="Pins:BOARD_InitLCDPins">
<dependency resourceType="Peripheral" resourceId="LCDIF" description="Peripheral LCDIF signals are routed in the Pins Tool, but the peripheral is not initialized in the Peripherals Tool." problem_level="1" source="Pins:BOARD_InitLCDPins">
<feature name="initialized" evaluation="equal">
<data>true</data>
</feature>
@@ -450,7 +449,7 @@
<enableClock>true</enableClock>
</options>
<dependencies>
<dependency resourceType="Peripheral" resourceId="CAN2" description="Peripheral CAN2 is not initialized" problem_level="1" source="Pins:BOARD_InitCANPins">
<dependency resourceType="Peripheral" resourceId="CAN2" description="Peripheral CAN2 signals are routed in the Pins Tool, but the peripheral is not initialized in the Peripherals Tool." problem_level="1" source="Pins:BOARD_InitCANPins">
<feature name="initialized" evaluation="equal">
<data>true</data>
</feature>
@@ -479,7 +478,7 @@
<enableClock>true</enableClock>
</options>
<dependencies>
<dependency resourceType="Peripheral" resourceId="ENET" description="Peripheral ENET is not initialized" problem_level="1" source="Pins:BOARD_InitENETPins">
<dependency resourceType="Peripheral" resourceId="ENET" description="Peripheral ENET signals are routed in the Pins Tool, but the peripheral is not initialized in the Peripherals Tool." problem_level="1" source="Pins:BOARD_InitENETPins">
<feature name="initialized" evaluation="equal">
<data>true</data>
</feature>
@@ -516,7 +515,7 @@
<enableClock>true</enableClock>
</options>
<dependencies>
<dependency resourceType="Peripheral" resourceId="USDHC1" description="Peripheral USDHC1 is not initialized" problem_level="1" source="Pins:BOARD_InitUSDHCPins">
<dependency resourceType="Peripheral" resourceId="USDHC1" description="Peripheral USDHC1 signals are routed in the Pins Tool, but the peripheral is not initialized in the Peripherals Tool." problem_level="1" source="Pins:BOARD_InitUSDHCPins">
<feature name="initialized" evaluation="equal">
<data>true</data>
</feature>
@@ -550,7 +549,7 @@
<enableClock>true</enableClock>
</options>
<dependencies>
<dependency resourceType="Peripheral" resourceId="FLEXSPI" description="Peripheral FLEXSPI is not initialized" problem_level="1" source="Pins:BOARD_InitQSPIPins">
<dependency resourceType="Peripheral" resourceId="FLEXSPI" description="Peripheral FLEXSPI signals are routed in the Pins Tool, but the peripheral is not initialized in the Peripherals Tool." problem_level="1" source="Pins:BOARD_InitQSPIPins">
<feature name="initialized" evaluation="equal">
<data>true</data>
</feature>
@@ -578,13 +577,13 @@
</function>
</functions_list>
</pins>
<clocks name="Clocks" version="11.0" enabled="true" update_project_code="true">
<clocks name="Clocks" version="15.0" enabled="true" update_project_code="true">
<generated_project_files>
<file path="board/clock_config.c" update_enabled="true"/>
<file path="board/clock_config.h" update_enabled="true"/>
</generated_project_files>
<clocks_profile>
<processor_version>13.0.2</processor_version>
<processor_version>24.12.10</processor_version>
</clocks_profile>
<clock_configurations>
<clock_configuration name="BOARD_BootClockRUN" id_prefix="" prefix_user_defined="false">
@@ -751,10 +750,7 @@
<dcdx_configurations/>
</dcdx>
<periphs name="Peripherals" version="12.0" enabled="false" update_project_code="true">
<generated_project_files>
<file path="board/peripherals.c" update_enabled="true"/>
<file path="board/peripherals.h" update_enabled="true"/>
</generated_project_files>
<generated_project_files/>
<peripherals_profile>
<processor_version>13.0.2</processor_version>
</peripherals_profile>

4
hw/bsp/imxrt/boards/mimxrt1170_evkb/board/clock_config.c
View File

@@ -11,11 +11,11 @@
/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
!!GlobalInfo
product: Clocks v14.0
product: Clocks v15.0
processor: MIMXRT1176xxxxx
package_id: MIMXRT1176DVMAA
mcu_data: ksdk2_0
processor_version: 16.3.0
processor_version: 24.12.10
board: MIMXRT1170-EVKB
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/

56
hw/bsp/imxrt/boards/mimxrt1170_evkb/board/pin_mux.c
View File

@@ -6,11 +6,11 @@
/*
* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
!!GlobalInfo
product: Pins v16.0
product: Pins v17.0
processor: MIMXRT1176xxxxx
package_id: MIMXRT1176DVMAA
mcu_data: ksdk2_0
processor_version: 16.3.0
processor_version: 24.12.10
board: MIMXRT1170-EVKB
external_user_signals: {}
pin_labels:
@@ -31,6 +31,7 @@ pin_labels:
* END ****************************************************************************************************************/
void BOARD_InitBootPins(void) {
BOARD_InitPins();
BOARD_InitDEBUG_UARTPins();
}
/*
@@ -38,10 +39,6 @@ void BOARD_InitBootPins(void) {
BOARD_InitPins:
- options: {callFromInitBoot: 'true', coreID: cm7, enableClock: 'true'}
- pin_list:
- {pin_num: M15, peripheral: LPUART1, signal: RXD, pin_signal: GPIO_AD_25, software_input_on: Disable, pull_up_down_config: Pull_Down, pull_keeper_select: Keeper,
open_drain: Disable, drive_strength: High, slew_rate: Slow}
- {pin_num: L13, peripheral: LPUART1, signal: TXD, pin_signal: GPIO_AD_24, software_input_on: Disable, pull_up_down_config: Pull_Down, pull_keeper_select: Keeper,
open_drain: Disable, drive_strength: High, slew_rate: Slow}
- {pin_num: M13, peripheral: GPIO9, signal: 'gpio_io, 03', pin_signal: GPIO_AD_04, identifier: USER_LED, direction: OUTPUT, pull_up_down_config: Pull_Down, pull_keeper_select: Keeper}
- {pin_num: T8, peripheral: GPIO13, signal: 'gpio_io, 00', pin_signal: WAKEUP, direction: INPUT, pull_up_down_config: Pull_Up}
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
@@ -77,12 +74,6 @@ void BOARD_InitPins(void) {
IOMUXC_SetPinMux(
IOMUXC_GPIO_AD_04_GPIO9_IO03, /* GPIO_AD_04 is configured as GPIO9_IO03 */
0U); /* Software Input On Field: Input Path is determined by functionality */
IOMUXC_SetPinMux(
IOMUXC_GPIO_AD_24_LPUART1_TXD, /* GPIO_AD_24 is configured as LPUART1_TXD */
0U); /* Software Input On Field: Input Path is determined by functionality */
IOMUXC_SetPinMux(
IOMUXC_GPIO_AD_25_LPUART1_RXD, /* GPIO_AD_25 is configured as LPUART1_RXD */
0U); /* Software Input On Field: Input Path is determined by functionality */
IOMUXC_SetPinMux(
IOMUXC_WAKEUP_DIG_GPIO13_IO00, /* WAKEUP_DIG is configured as GPIO13_IO00 */
0U); /* Software Input On Field: Input Path is determined by functionality */
@@ -95,6 +86,40 @@ void BOARD_InitPins(void) {
Open Drain Field: Disabled
Domain write protection: Both cores are allowed
Domain write protection lock: Neither of DWP bits is locked */
IOMUXC_SetPinConfig(
IOMUXC_WAKEUP_DIG_GPIO13_IO00, /* WAKEUP_DIG PAD functional properties : */
0x0EU); /* Pull / Keep Select Field: Pull Enable
Pull Up / Down Config. Field: Weak pull up
Open Drain SNVS Field: Disabled
Domain write protection: Both cores are allowed
Domain write protection lock: Neither of DWP bits is locked */
}
/*
* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
BOARD_InitDEBUG_UARTPins:
- options: {callFromInitBoot: 'true', coreID: cm7, enableClock: 'true'}
- pin_list:
- {pin_num: L13, peripheral: LPUART1, signal: TXD, pin_signal: GPIO_AD_24, pull_keeper_select: Keeper, slew_rate: Slow}
- {pin_num: M15, peripheral: LPUART1, signal: RXD, pin_signal: GPIO_AD_25, pull_keeper_select: Keeper, slew_rate: Slow}
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
*/
/* FUNCTION ************************************************************************************************************
*
* Function Name : BOARD_InitDEBUG_UARTPins, assigned for the Cortex-M7F core.
* Description : Configures pin routing and optionally pin electrical features.
*
* END ****************************************************************************************************************/
void BOARD_InitDEBUG_UARTPins(void) {
CLOCK_EnableClock(kCLOCK_Iomuxc); /* LPCG on: LPCG is ON. */
IOMUXC_SetPinMux(
IOMUXC_GPIO_AD_24_LPUART1_TXD, /* GPIO_AD_24 is configured as LPUART1_TXD */
0U); /* Software Input On Field: Input Path is determined by functionality */
IOMUXC_SetPinMux(
IOMUXC_GPIO_AD_25_LPUART1_RXD, /* GPIO_AD_25 is configured as LPUART1_RXD */
0U); /* Software Input On Field: Input Path is determined by functionality */
IOMUXC_SetPinConfig(
IOMUXC_GPIO_AD_24_LPUART1_TXD, /* GPIO_AD_24 PAD functional properties : */
0x02U); /* Slew Rate Field: Slow Slew Rate
@@ -113,13 +138,6 @@ void BOARD_InitPins(void) {
Open Drain Field: Disabled
Domain write protection: Both cores are allowed
Domain write protection lock: Neither of DWP bits is locked */
IOMUXC_SetPinConfig(
IOMUXC_WAKEUP_DIG_GPIO13_IO00, /* WAKEUP_DIG PAD functional properties : */
0x0EU); /* Pull / Keep Select Field: Pull Enable
Pull Up / Down Config. Field: Weak pull up
Open Drain SNVS Field: Disabled
Domain write protection: Both cores are allowed
Domain write protection lock: Neither of DWP bits is locked */
}
/***********************************************************************************************************************
* EOF

27
hw/bsp/imxrt/boards/mimxrt1170_evkb/board/pin_mux.h
View File

@@ -25,16 +25,6 @@ extern "C" {
*/
void BOARD_InitBootPins(void);
/* GPIO_AD_25 (coord M15), LPUART1_RXD */
/* Routed pin properties */
#define BOARD_INITPINS_LPUART1_RXD_PERIPHERAL LPUART1 /*!< Peripheral name */
#define BOARD_INITPINS_LPUART1_RXD_SIGNAL RXD /*!< Signal name */
/* GPIO_AD_24 (coord L13), LPUART1_TXD */
/* Routed pin properties */
#define BOARD_INITPINS_LPUART1_TXD_PERIPHERAL LPUART1 /*!< Peripheral name */
#define BOARD_INITPINS_LPUART1_TXD_SIGNAL TXD /*!< Signal name */
/* GPIO_AD_04 (coord M13), SIM1_PD/J44[C8]/USER_LED_CTL1/J9[8]/J25[7] */
/* Routed pin properties */
#define BOARD_INITPINS_USER_LED_PERIPHERAL GPIO9 /*!< Peripheral name */
@@ -43,6 +33,7 @@ void BOARD_InitBootPins(void);
/* Symbols to be used with GPIO driver */
#define BOARD_INITPINS_USER_LED_GPIO GPIO9 /*!< GPIO peripheral base pointer */
#define BOARD_INITPINS_USER_LED_INIT_GPIO_VALUE 0U /*!< GPIO output initial state */
#define BOARD_INITPINS_USER_LED_GPIO_PIN 3U /*!< GPIO pin number */
#define BOARD_INITPINS_USER_LED_GPIO_PIN_MASK (1U << 3U) /*!< GPIO pin mask */
@@ -63,6 +54,22 @@ void BOARD_InitBootPins(void);
*/
void BOARD_InitPins(void); /* Function assigned for the Cortex-M7F */
/* GPIO_AD_24 (coord L13), LPUART1_TXD */
/* Routed pin properties */
#define BOARD_INITDEBUG_UARTPINS_LPUART1_TXD_PERIPHERAL LPUART1 /*!< Peripheral name */
#define BOARD_INITDEBUG_UARTPINS_LPUART1_TXD_SIGNAL TXD /*!< Signal name */
/* GPIO_AD_25 (coord M15), LPUART1_RXD */
/* Routed pin properties */
#define BOARD_INITDEBUG_UARTPINS_LPUART1_RXD_PERIPHERAL LPUART1 /*!< Peripheral name */
#define BOARD_INITDEBUG_UARTPINS_LPUART1_RXD_SIGNAL RXD /*!< Signal name */
/*!
* @brief Configures pin routing and optionally pin electrical features.
*
*/
void BOARD_InitDEBUG_UARTPins(void); /* Function assigned for the Cortex-M7F */
#if defined(__cplusplus)
}
#endif

75
hw/bsp/imxrt/boards/mimxrt1170_evkb/mimxrt1170_evkb.mex
View File

@@ -1,5 +1,5 @@
<?xml version="1.0" encoding= "UTF-8" ?>
<configuration name="MIMXRT1176xxxxx" xsi:schemaLocation="http://mcuxpresso.nxp.com/XSD/mex_configuration_16 http://mcuxpresso.nxp.com/XSD/mex_configuration_16.xsd" uuid="060646c1-2247-47a8-b52d-03c1968b4426" version="16" xmlns="http://mcuxpresso.nxp.com/XSD/mex_configuration_16" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
<configuration name="MIMXRT1176xxxxx" xsi:schemaLocation="http://mcuxpresso.nxp.com/XSD/mex_configuration_17 http://mcuxpresso.nxp.com/XSD/mex_configuration_17.xsd" uuid="060646c1-2247-47a8-b52d-03c1968b4426" version="17" xmlns="http://mcuxpresso.nxp.com/XSD/mex_configuration_17" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
<common>
<processor>MIMXRT1176xxxxx</processor>
<package>MIMXRT1176DVMAA</package>
@@ -13,19 +13,18 @@
</common>
<preferences>
<validate_boot_init_only>true</validate_boot_init_only>
<generate_extended_information>false</generate_extended_information>
<generate_code_modified_registers_only>false</generate_code_modified_registers_only>
<update_include_paths>true</update_include_paths>
<generate_registers_defines>false</generate_registers_defines>
</preferences>
<tools>
<pins name="Pins" version="16.0" enabled="true" update_project_code="true">
<pins name="Pins" version="17.0" enabled="true" update_project_code="true">
<generated_project_files>
<file path="board/pin_mux.c" update_enabled="true"/>
<file path="board/pin_mux.h" update_enabled="true"/>
</generated_project_files>
<pins_profile>
<processor_version>16.3.0</processor_version>
<processor_version>24.12.10</processor_version>
<pin_labels>
<pin_label pin_num="M13" pin_signal="GPIO_AD_04" label="SIM1_PD/J44[C8]/USER_LED_CTL1/J9[8]/J25[7]" identifier="SIM1_PD;LED;USER_LED"/>
</pin_labels>
@@ -43,11 +42,6 @@
<enableClock>true</enableClock>
</options>
<dependencies>
<dependency resourceType="Peripheral" resourceId="LPUART1" description="Peripheral LPUART1 signals are routed in the Pins Tool, but the peripheral is not initialized in the Peripherals Tool." problem_level="1" source="Pins:BOARD_InitPins">
<feature name="initialized" evaluation="equal">
<data>true</data>
</feature>
</dependency>
<dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitPins">
<feature name="enabled" evaluation="equal" configuration="cm7">
<data>true</data>
@@ -65,26 +59,6 @@
</dependency>
</dependencies>
<pins>
<pin peripheral="LPUART1" signal="RXD" pin_num="M15" pin_signal="GPIO_AD_25">
<pin_features>
<pin_feature name="software_input_on" value="Disable"/>
<pin_feature name="pull_up_down_config" value="Pull_Down"/>
<pin_feature name="pull_keeper_select" value="Keeper"/>
<pin_feature name="open_drain" value="Disable"/>
<pin_feature name="drive_strength" value="High"/>
<pin_feature name="slew_rate" value="Slow"/>
</pin_features>
</pin>
<pin peripheral="LPUART1" signal="TXD" pin_num="L13" pin_signal="GPIO_AD_24">
<pin_features>
<pin_feature name="software_input_on" value="Disable"/>
<pin_feature name="pull_up_down_config" value="Pull_Down"/>
<pin_feature name="pull_keeper_select" value="Keeper"/>
<pin_feature name="open_drain" value="Disable"/>
<pin_feature name="drive_strength" value="High"/>
<pin_feature name="slew_rate" value="Slow"/>
</pin_features>
</pin>
<pin peripheral="GPIO9" signal="gpio_io, 03" pin_num="M13" pin_signal="GPIO_AD_04">
<pin_features>
<pin_feature name="identifier" value="USER_LED"/>
@@ -101,15 +75,54 @@
</pin>
</pins>
</function>
<function name="BOARD_InitDEBUG_UARTPins">
<description>Configures pin routing and optionally pin electrical features.</description>
<options>
<callFromInitBoot>true</callFromInitBoot>
<coreID>cm7</coreID>
<enableClock>true</enableClock>
</options>
<dependencies>
<dependency resourceType="Peripheral" resourceId="LPUART1" description="Peripheral LPUART1 signals are routed in the Pins Tool, but the peripheral is not initialized in the Peripherals Tool." problem_level="1" source="Pins:BOARD_InitDEBUG_UARTPins">
<feature name="initialized" evaluation="equal">
<data>true</data>
</feature>
</dependency>
<dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitDEBUG_UARTPins">
<feature name="enabled" evaluation="equal" configuration="cm7">
<data>true</data>
</feature>
</dependency>
<dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Pins initialization requires the IOMUXC Driver in the project." problem_level="2" source="Pins:BOARD_InitDEBUG_UARTPins">
<feature name="enabled" evaluation="equal" configuration="cm7">
<data>true</data>
</feature>
</dependency>
</dependencies>
<pins>
<pin peripheral="LPUART1" signal="TXD" pin_num="L13" pin_signal="GPIO_AD_24">
<pin_features>
<pin_feature name="pull_keeper_select" value="Keeper"/>
<pin_feature name="slew_rate" value="Slow"/>
</pin_features>
</pin>
<pin peripheral="LPUART1" signal="RXD" pin_num="M15" pin_signal="GPIO_AD_25">
<pin_features>
<pin_feature name="pull_keeper_select" value="Keeper"/>
<pin_feature name="slew_rate" value="Slow"/>
</pin_features>
</pin>
</pins>
</function>
</functions_list>
</pins>
<clocks name="Clocks" version="14.0" enabled="true" update_project_code="true">
<clocks name="Clocks" version="15.0" enabled="true" update_project_code="true">
<generated_project_files>
<file path="board/clock_config.c" update_enabled="true"/>
<file path="board/clock_config.h" update_enabled="true"/>
</generated_project_files>
<clocks_profile>
<processor_version>16.3.0</processor_version>
<processor_version>24.12.10</processor_version>
</clocks_profile>
<clock_configurations>
<clock_configuration name="BOARD_BootClockRUN" id_prefix="" prefix_user_defined="false">

10
hw/bsp/imxrt/family.c
View File

@@ -61,7 +61,7 @@
- Define CFG_TUSB_MEM_SECTION=__attribute__((section("NonCacheable")))
*/
static void BOARD_ConfigMPU(void);
// static void BOARD_ConfigMPU(void);
// needed by fsl_flexspi_nor_boot
TU_ATTR_USED const uint8_t dcd_data[] = {0x00};
@@ -109,8 +109,8 @@ static void init_usb_phy(uint8_t usb_id) {
}
void board_init(void) {
BOARD_ConfigMPU();
BOARD_InitPins();
// BOARD_ConfigMPU();
BOARD_InitBootPins();
BOARD_BootClockRUN();
SystemCoreClockUpdate();
@@ -258,6 +258,7 @@ void _exit(int __status) {
//--------------------------------------------------------------------
// MPU configuration
//--------------------------------------------------------------------
#if 0 // TODO move to per board specific
#if __CORTEX_M == 7
static void BOARD_ConfigMPU(void) {
#if defined(__CC_ARM) || defined(__ARMCC_VERSION)
@@ -455,7 +456,7 @@ static void BOARD_ConfigMPU(void) {
#elif __CORTEX_M == 4
void BOARD_ConfigMPU(void) {
static void BOARD_ConfigMPU(void) {
#if defined(__CC_ARM) || defined(__ARMCC_VERSION)
extern uint32_t Image$$RW_m_ncache$$Base[];
/* RW_m_ncache_unused is a auxiliary region which is used to get the whole size of noncache section */
@@ -636,3 +637,4 @@ void BOARD_ConfigMPU(void) {
LMEM->PCCCR |= LMEM_PCCCR_ENCACHE_MASK;
}
#endif
#endif

4
hw/bsp/imxrt/family.cmake
View File

@@ -123,8 +123,6 @@ function(family_configure_example TARGET RTOS)
# Board target
add_board_target(board_${BOARD})
#---------- Port Specific ----------
# These files are built for each example since it depends on example's tusb_config.h
target_sources(${TARGET} PUBLIC
# BSP
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
@@ -146,8 +144,6 @@ function(family_configure_example TARGET RTOS)
)
target_link_libraries(${TARGET} PUBLIC board_${BOARD})
# Flashing
family_add_bin_hex(${TARGET})
family_flash_jlink(${TARGET})

1
hw/bsp/imxrt/family.mk
View File

@@ -1,6 +1,5 @@
UF2_FAMILY_ID = 0x4fb2d5bd
SDK_DIR = hw/mcu/nxp/mcux-sdk
DEPS_SUBMODULES += $(SDK_DIR) lib/CMSIS_5
include $(TOP)/$(BOARD_PATH)/board.mk

1
hw/bsp/kinetis_k/family.mk
View File

@@ -1,5 +1,4 @@
SDK_DIR = hw/mcu/nxp/mcux-sdk
DEPS_SUBMODULES += $(SDK_DIR) lib/CMSIS_5
MCU_DIR = $(SDK_DIR)/devices/${MCU_VARIANT}
include $(TOP)/$(BOARD_PATH)/board.mk

2
hw/bsp/kinetis_k32l2/boards/frdm_k32l2a4s/board.mk
View File

@@ -3,7 +3,7 @@ MCU = K32L2A41A
CFLAGS += -DCPU_K32L2A41VLH1A
# mcu driver cause following warnings
CFLAGS += -Wno-error=unused-parameter -Wno-error=redundant-decls -Wno-error=cast-qual
CFLAGS_GCC += -Wno-error=unused-parameter -Wno-error=redundant-decls -Wno-error=cast-qual
# All source paths should be relative to the top level.
LD_FILE = $(MCU_DIR)/gcc/K32L2A41xxxxA_flash.ld

1
hw/bsp/kinetis_kl/family.mk
View File

@@ -1,5 +1,4 @@
SDK_DIR = hw/mcu/nxp/mcux-sdk
DEPS_SUBMODULES += $(SDK_DIR) lib/CMSIS_5
MCU_DIR = $(SDK_DIR)/devices/$(MCU)
include $(TOP)/$(BOARD_PATH)/board.mk

2
hw/bsp/lpc13/boards/lpcxpresso1347/board.mk
View File

@@ -1,5 +1,3 @@
DEPS_SUBMODULES += hw/mcu/nxp/lpcopen
CFLAGS += \
-DCFG_TUSB_MEM_SECTION='__attribute__((section(".data.$$RAM2")))'

2
hw/bsp/lpc13/family.mk
View File

@@ -1,5 +1,3 @@
DEPS_SUBMODULES += hw/mcu/nxp/lpcopen
MCU_DIR = hw/mcu/nxp/lpcopen/lpc13xx/lpc_chip_13xx
include $(TOP)/$(BOARD_PATH)/board.mk
CPU_CORE ?= cortex-m3

4
hw/bsp/lpc15/family.mk
View File

@@ -1,5 +1,3 @@
DEPS_SUBMODULES += hw/mcu/nxp/lpcopen
include $(TOP)/$(BOARD_PATH)/board.mk
CPU_CORE ?= cortex-m3
@@ -15,7 +13,7 @@ CFLAGS += \
LDFLAGS_GCC += -specs=nosys.specs -specs=nano.specs
# mcu driver cause following warnings
CFLAGS += -Wno-error=strict-prototypes -Wno-error=unused-parameter -Wno-error=unused-variable -Wno-error=cast-qual
CFLAGS_GCC += -Wno-error=strict-prototypes -Wno-error=unused-parameter -Wno-error=unused-variable -Wno-error=cast-qual
MCU_DIR = hw/mcu/nxp/lpcopen/lpc15xx/lpc_chip_15xx

4
hw/bsp/lpc17/family.mk
View File

@@ -1,5 +1,3 @@
DEPS_SUBMODULES += hw/mcu/nxp/lpcopen
MCU_DIR = hw/mcu/nxp/lpcopen/lpc175x_6x/lpc_chip_175x_6x
include $(TOP)/$(BOARD_PATH)/board.mk
CPU_CORE ?= cortex-m3
@@ -13,7 +11,7 @@ CFLAGS += \
-DRTC_EV_SUPPORT=0
# lpc_types.h cause following errors
CFLAGS += -Wno-error=strict-prototypes -Wno-error=cast-qual
CFLAGS_GCC += -Wno-error=strict-prototypes -Wno-error=cast-qual
# caused by freeRTOS port !!
CFLAGS += -Wno-error=maybe-uninitialized

3
hw/bsp/lpc18/family.mk
View File

@@ -1,4 +1,3 @@
DEPS_SUBMODULES += hw/mcu/nxp/lpcopen
MCU_DIR = hw/mcu/nxp/lpcopen/lpc18xx/lpc_chip_18xx
include $(TOP)/$(BOARD_PATH)/board.mk
@@ -12,7 +11,7 @@ CFLAGS += \
-DCFG_TUSB_MCU=OPT_MCU_LPC18XX
# mcu driver cause following warnings
CFLAGS += -Wno-error=unused-parameter -Wno-error=cast-qual
CFLAGS_GCC += -Wno-error=unused-parameter -Wno-error=cast-qual
LDFLAGS_GCC += --specs=nosys.specs --specs=nano.specs

4
hw/bsp/lpc40/family.mk
View File

@@ -1,5 +1,3 @@
DEPS_SUBMODULES += hw/mcu/nxp/lpcopen
MCU_DIR = hw/mcu/nxp/lpcopen/lpc40xx/lpc_chip_40xx
include $(TOP)/$(BOARD_PATH)/board.mk
CPU_CORE ?= cortex-m4
@@ -13,7 +11,7 @@ CFLAGS += \
-DCFG_TUSB_MCU=OPT_MCU_LPC40XX
# mcu driver cause following warnings
CFLAGS += -Wno-error=strict-prototypes -Wno-error=unused-parameter -Wno-error=cast-qual
CFLAGS_GCC += -Wno-error=strict-prototypes -Wno-error=unused-parameter -Wno-error=cast-qual
LDFLAGS_GCC += --specs=nosys.specs --specs=nano.specs

7
hw/bsp/lpc43/family.mk
View File

@@ -1,18 +1,17 @@
DEPS_SUBMODULES += hw/mcu/nxp/lpcopen
SDK_DIR = hw/mcu/nxp/lpcopen/lpc43xx/lpc_chip_43xx
include ${TOP}/${BOARD_PATH}/board.mk
CPU_CORE ?= cortex-m4
CFLAGS += \
-flto \
-nostdlib \
-DCORE_M4 \
-D__USE_LPCOPEN \
-DCFG_TUSB_MCU=OPT_MCU_LPC43XX
# mcu driver cause following warnings
CFLAGS += \
CFLAGS_GCC += \
-flto \
-nostdlib \
-Wno-error=unused-parameter \
-Wno-error=cast-qual \
-Wno-error=incompatible-pointer-types \

2
hw/bsp/lpc51/family.cmake
View File

@@ -36,7 +36,7 @@ function(add_board_target BOARD_TARGET)
# driver
${SDK_DIR}/drivers/lpc_gpio/fsl_gpio.c
${SDK_DIR}/drivers/flexcomm/fsl_flexcomm.c
${SDK_DIR}/drivers/flexcomm/fsl_usart.c
${SDK_DIR}/drivers/flexcomm/usart/fsl_usart.c
# mcu
${SDK_DIR}/devices/${MCU_VARIANT}/system_${MCU_VARIANT}.c
${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_clock.c

7
hw/bsp/lpc51/family.mk
View File

@@ -28,15 +28,16 @@ SRC_C += \
$(MCU_DIR)/drivers/fsl_reset.c \
$(SDK_DIR)/drivers/lpc_gpio/fsl_gpio.c \
$(SDK_DIR)/drivers/flexcomm/fsl_flexcomm.c \
$(SDK_DIR)/drivers/flexcomm/fsl_usart.c
$(SDK_DIR)/drivers/flexcomm/usart/fsl_usart.c
INC += \
$(TOP)/$(BOARD_PATH) \
$(TOP)/lib/CMSIS_5/CMSIS/Core/Include \
$(TOP)/$(BOARD_PATH) \
$(TOP)/lib/CMSIS_5/CMSIS/Core/Include \
$(TOP)/$(MCU_DIR) \
$(TOP)/$(MCU_DIR)/drivers \
$(TOP)/$(SDK_DIR)/drivers/common \
$(TOP)/$(SDK_DIR)/drivers/flexcomm \
$(TOP)/$(SDK_DIR)/drivers/flexcomm/usart \
$(TOP)/$(SDK_DIR)/drivers/lpc_iocon \
$(TOP)/$(SDK_DIR)/drivers/lpc_gpio

3
hw/bsp/lpc54/family.cmake
View File

@@ -44,7 +44,7 @@ function(add_board_target BOARD_TARGET)
${SDK_DIR}/drivers/lpc_gpio/fsl_gpio.c
${SDK_DIR}/drivers/common/fsl_common_arm.c
${SDK_DIR}/drivers/flexcomm/fsl_flexcomm.c
${SDK_DIR}/drivers/flexcomm/fsl_usart.c
${SDK_DIR}/drivers/flexcomm/usart/fsl_usart.c
# mcu
${SDK_DIR}/devices/${MCU_VARIANT}/system_${MCU_CORE}.c
${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_clock.c
@@ -56,6 +56,7 @@ function(add_board_target BOARD_TARGET)
# driver
${SDK_DIR}/drivers/common
${SDK_DIR}/drivers/flexcomm
${SDK_DIR}/drivers/flexcomm/usart
${SDK_DIR}/drivers/lpc_iocon
${SDK_DIR}/drivers/lpc_gpio
${SDK_DIR}/drivers/lpuart

4
hw/bsp/lpc54/family.mk
View File

@@ -1,5 +1,4 @@
SDK_DIR = hw/mcu/nxp/mcux-sdk
DEPS_SUBMODULES += $(SDK_DIR) lib/CMSIS_5
include $(TOP)/$(BOARD_PATH)/board.mk
CPU_CORE ?= cortex-m4
@@ -36,7 +35,7 @@ SRC_C += \
$(MCU_DIR)/drivers/fsl_reset.c \
$(SDK_DIR)/drivers/lpc_gpio/fsl_gpio.c \
$(SDK_DIR)/drivers/flexcomm/fsl_flexcomm.c \
$(SDK_DIR)/drivers/flexcomm/fsl_usart.c \
$(SDK_DIR)/drivers/flexcomm/usart/fsl_usart.c \
$(SDK_DIR)/drivers/common/fsl_common_arm.c
INC += \
@@ -46,6 +45,7 @@ INC += \
$(TOP)/$(MCU_DIR)/drivers \
$(TOP)/$(SDK_DIR)/drivers/common \
$(TOP)/$(SDK_DIR)/drivers/flexcomm \
$(TOP)/$(SDK_DIR)/drivers/flexcomm/usart \
$(TOP)/$(SDK_DIR)/drivers/lpc_iocon \
$(TOP)/$(SDK_DIR)/drivers/lpc_gpio

4
hw/bsp/lpc55/family.cmake
View File

@@ -44,7 +44,7 @@ function(add_board_target BOARD_TARGET)
${SDK_DIR}/drivers/lpc_gpio/fsl_gpio.c
${SDK_DIR}/drivers/common/fsl_common_arm.c
${SDK_DIR}/drivers/flexcomm/fsl_flexcomm.c
${SDK_DIR}/drivers/flexcomm/fsl_usart.c
${SDK_DIR}/drivers/flexcomm/usart/fsl_usart.c
# mcu
${SDK_DIR}/devices/${MCU_VARIANT}/system_${MCU_CORE}.c
${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_clock.c
@@ -56,9 +56,9 @@ function(add_board_target BOARD_TARGET)
# driver
${SDK_DIR}/drivers/common
${SDK_DIR}/drivers/flexcomm
${SDK_DIR}/drivers/flexcomm/usart
${SDK_DIR}/drivers/lpc_iocon
${SDK_DIR}/drivers/lpc_gpio
${SDK_DIR}/drivers/lpuart
${SDK_DIR}/drivers/sctimer
# mcu
${SDK_DIR}/devices/${MCU_VARIANT}

8
hw/bsp/lpc55/family.mk
View File

@@ -1,6 +1,5 @@
UF2_FAMILY_ID = 0x2abc77ec
SDK_DIR = hw/mcu/nxp/mcux-sdk
DEPS_SUBMODULES += lib/CMSIS_5 lib/sct_neopixel $(SDK_DIR)
include $(TOP)/$(BOARD_PATH)/board.mk
CPU_CORE ?= cortex-m33
@@ -45,7 +44,7 @@ SRC_C += \
$(SDK_DIR)/drivers/lpc_gpio/fsl_gpio.c \
$(SDK_DIR)/drivers/common/fsl_common_arm.c \
$(SDK_DIR)/drivers/flexcomm/fsl_flexcomm.c \
$(SDK_DIR)/drivers/flexcomm/fsl_usart.c \
$(SDK_DIR)/drivers/flexcomm/usart/fsl_usart.c \
lib/sct_neopixel/sct_neopixel.c
INC += \
@@ -55,11 +54,10 @@ INC += \
$(TOP)/$(MCU_DIR) \
$(TOP)/$(MCU_DIR)/drivers \
$(TOP)/$(SDK_DIR)/drivers/common \
$(TOP)/$(SDK_DIR)/drivers/flexcomm \
$(TOP)/$(SDK_DIR)/drivers/flexcomm/usart \
$(TOP)/$(SDK_DIR)/drivers/flexcomm/ \
$(TOP)/$(SDK_DIR)/drivers/lpc_iocon \
$(TOP)/$(SDK_DIR)/drivers/lpc_gpio \
$(TOP)/$(SDK_DIR)/drivers/sctimer
SRC_S += $(MCU_DIR)/gcc/startup_$(MCU_CORE).S
LIBS += $(TOP)/$(MCU_DIR)/gcc/libpower_hardabi.a

46
hw/bsp/max32650/README.md
View File

@@ -1,46 +0,0 @@
# Analog Devices MAX32650/1/2
This BSP is for working with the Analog Devices
[MAX32650](https://www.analog.com/en/products/max32650.html),
[MAX32651](https://www.analog.com/en/products/max32651.html) and
[MAX32652](https://www.analog.com/en/products/max32652.html)
microcontrollers. The following boards are supported:
* [MAX32650EVKIT](https://www.analog.com/en/resources/evaluation-hardware-and-software/evaluation-boards-kits/max32650-evkit.html)
* [MAX32650FTHR](https://www.analog.com/en/resources/evaluation-hardware-and-software/evaluation-boards-kits/max32650fthr.html)
* [MAX32651EVKIT](https://www.analog.com/en/resources/evaluation-hardware-and-software/evaluation-boards-kits/max32651-evkit.html) (Secure Bootloader)
This part family leverages the Maxim Microcontrollers SDK (MSDK) for the device
interfaces and hardware abstraction layers. This source code package is fetched
as part of the get-deps script.
The microcontrollers utilize the standard GNU ARM toolchain. If this toolchain
is not already available on your build machine, it can be installed by using the
bundled MSDK installation. Details on downloading and installing can be found
in the [User's Guide](https://analogdevicesinc.github.io/msdk//USERGUIDE/).
## Flashing
### MAX32650 and MAX32652
The default flashing behavior in this BSP for the MAX32650 and MAX32652 is to
utilize JLink. This can be done by running the `flash` or `flash-jlink` rule
for Makefiles, or the `<target>-jlink` target for CMake.
Both the Evaluation Kit and Feather boards are shipped with a CMSIS-DAP
compatible debug probe. However, at the time of writing, the necessary flashing
algorithms for OpenOCD have not yet been incorporated into the OpenOCD master
branch. To utilize the provided debug probes, please install the bundled MSDK
package which includes the appropriate OpenOCD modifications. To leverage this
OpenOCD instance, run the `flash-msdk` Makefile rule, or `<target>-msdk` CMake
target.
### MAX32651
The MAX32651 features an integrated secure bootloader which requires the
application image be signed prior to flashing. Both the Makefile and CMake
scripts account for this signing automatically when building for the
MAX32651EVKIT.
To flash the signed image, the MSDK's OpenOCD variant must be used. To flash
the MAX32651EVKIT please install the bundled MSDK, and utilize the `flash-msdk`
and `<target>-msdk` rule and target.

10
hw/bsp/max32650/boards/max32650evkit/board.cmake
View File

@@ -1,10 +0,0 @@
# Use the standard, non-secure linker file
set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/max32650.ld)
function(update_board_extras TARGET)
#No extra arguments
endfunction()
function(prepare_image TARGET_IN)
#No signing required
endfunction()

2
hw/bsp/max32650/boards/max32650evkit/board.mk
View File

@@ -1,2 +0,0 @@
# Use the standard, non-secure linker file
LD_FILE = $(BOARD_PATH)/max32650.ld

10
hw/bsp/max32650/boards/max32650fthr/board.cmake
View File

@@ -1,10 +0,0 @@
# Use the standard, non-secure linker file
set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/max32650.ld)
function(update_board_extras TARGET)
#No extra arguments
endfunction()
function(prepare_image TARGET_IN)
#No signing required
endfunction()

2
hw/bsp/max32650/boards/max32650fthr/board.mk
View File

@@ -1,2 +0,0 @@
# Use the standard, non-secure linker file
LD_FILE = $(BOARD_PATH)/max32650.ld

119
hw/bsp/max32650/boards/max32650fthr/max32650.ld
View File

@@ -1,119 +0,0 @@
MEMORY {
ROM (rx) : ORIGIN = 0x00000000, LENGTH = 0x00010000 /* 64kB ROM */
FLASH (rx) : ORIGIN = 0x10000000, LENGTH = 0x00300000 /* 3MB flash */
SRAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00100000 /* 1MB SRAM */
}
SECTIONS {
.text :
{
_text = .;
KEEP(*(.isr_vector))
*(.text*) /* program code */
*(.rodata*) /* read-only data: "const" */
KEEP(*(.init))
KEEP(*(.fini))
/* .ctors */
*crtbegin.o(.ctors)
*crtbegin?.o(.ctors)
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
*(SORT(.ctors.*))
*(.ctors)
/* .dtors */
*crtbegin.o(.dtors)
*crtbegin?.o(.dtors)
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
*(SORT(.dtors.*))
*(.dtors)
/* C++ Exception handling */
KEEP(*(.eh_frame*))
_etext = .;
} > FLASH
.ARM.extab :
{
*(.ARM.extab* .gnu.linkonce.armextab.*)
} > FLASH
/* it's used for C++ exception handling */
/* we need to keep this to avoid overlapping */
.ARM.exidx :
{
__exidx_start = .;
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
__exidx_end = .;
} > FLASH
.data :
{
_data = ALIGN(., 4);
*(vtable)
*(.data*) /*read-write initialized data: initialized global variable*/
*(.spix_config*) /* SPIX configuration functions need to be run from SRAM */
*(.flashprog*) /* Flash program */
/* These array sections are used by __libc_init_array to call static C++ constructors */
. = ALIGN(4);
/* preinit data */
PROVIDE_HIDDEN (__preinit_array_start = .);
KEEP(*(.preinit_array))
PROVIDE_HIDDEN (__preinit_array_end = .);
. = ALIGN(4);
/* init data */
PROVIDE_HIDDEN (__init_array_start = .);
KEEP(*(SORT(.init_array.*)))
KEEP(*(.init_array))
PROVIDE_HIDDEN (__init_array_end = .);
. = ALIGN(4);
/* finit data */
PROVIDE_HIDDEN (__fini_array_start = .);
KEEP(*(SORT(.fini_array.*)))
KEEP(*(.fini_array))
PROVIDE_HIDDEN (__fini_array_end = .);
_edata = ALIGN(., 4);
} > SRAM AT>FLASH
__load_data = LOADADDR(.data);
.bss :
{
. = ALIGN(4);
_bss = .;
*(.bss*) /*read-write zero initialized data: uninitialized global variable*/
*(COMMON)
_ebss = ALIGN(., 4);
} > SRAM
/* Set stack top to end of RAM, and stack limit move down by
* size of stack_dummy section */
__StackTop = ORIGIN(SRAM) + LENGTH(SRAM);
__StackLimit = __StackTop - SIZEOF(.stack_dummy);
/* .stack_dummy section doesn't contains any symbols. It is only
* used for linker to calculate size of stack sections, and assign
* values to stack symbols later */
.stack_dummy (COPY):
{
*(.stack*)
} > SRAM
.heap (COPY):
{
. = ALIGN(4);
PROVIDE ( end = . );
PROVIDE ( _end = . );
*(.heap*)
__HeapLimit = ABSOLUTE(__StackLimit);
} > SRAM
PROVIDE(__stack = __StackTop);
/* Check if data + heap + stack exceeds RAM limit */
ASSERT(__StackLimit >= _ebss, "region RAM overflowed with stack")
}

177
hw/bsp/max32650/family.c
View File

@@ -1,177 +0,0 @@
/*
* The MIT License (MIT)
*
* Copyright (c) 2024 Brent Kowal (Analog Devices, Inc)
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*
* This file is part of the TinyUSB stack.
*/
/* metadata:
manufacturer: Analog Devices
*/
#ifdef __GNUC__
#pragma GCC diagnostic push
#pragma GCC diagnostic ignored "-Wstrict-prototypes" // _mxc_crit_get_state()
#endif
#include "gpio.h"
#include "mxc_sys.h"
#include "mxc_device.h"
#include "uart.h"
#ifdef __GNUC__
#pragma GCC diagnostic pop
#endif
#include "board.h"
#include "bsp/board_api.h"
//--------------------------------------------------------------------+
// Forward USB interrupt events to TinyUSB IRQ Handler
//--------------------------------------------------------------------+
void USB_IRQHandler(void) {
tud_int_handler(0);
}
//--------------------------------------------------------------------+
// MACRO TYPEDEF CONSTANT ENUM
//--------------------------------------------------------------------+
mxc_uart_regs_t *ConsoleUart = MXC_UART_GET_UART(UART_NUM);
void board_init(void) {
#if CFG_TUSB_OS == OPT_OS_NONE
// 1ms tick timer
SysTick_Config(SystemCoreClock / 1000);
#elif CFG_TUSB_OS == OPT_OS_FREERTOS
// If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
NVIC_SetPriority(USB_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
#endif
mxc_gpio_cfg_t gpioConfig;
// LED
gpioConfig.drvstr = MXC_GPIO_DRVSTR_0;
gpioConfig.func = MXC_GPIO_FUNC_OUT;
gpioConfig.mask = LED_PIN;
gpioConfig.pad = MXC_GPIO_PAD_NONE;
gpioConfig.port = LED_PORT;
gpioConfig.vssel = LED_VDDIO;
MXC_GPIO_Config(&gpioConfig);
board_led_write(false);
// Button
gpioConfig.drvstr = MXC_GPIO_DRVSTR_0;
gpioConfig.func = MXC_GPIO_FUNC_IN;
gpioConfig.mask = BUTTON_PIN;
gpioConfig.pad = BUTTON_PULL;
gpioConfig.port = BUTTON_PORT;
gpioConfig.vssel = MXC_GPIO_VSSEL_VDDIO;
MXC_GPIO_Config(&gpioConfig);
// UART
MXC_UART_Init(ConsoleUart, CFG_BOARD_UART_BAUDRATE);
//USB
// Startup the HIRC96M clock if it's not on already
if (!(MXC_GCR->clk_ctrl & MXC_F_GCR_CLK_CTRL_HIRC96_EN)) {
MXC_GCR->clk_ctrl |= MXC_F_GCR_CLK_CTRL_HIRC96_EN;
MXC_SYS_Clock_Timeout(MXC_F_GCR_CLK_CTRL_HIRC96_RDY);
}
MXC_SYS_ClockEnable(MXC_SYS_PERIPH_CLOCK_USB);
MXC_SYS_Reset_Periph(MXC_SYS_RESET_USB);
}
//--------------------------------------------------------------------+
// Board porting API
//--------------------------------------------------------------------+
void board_led_write(bool state) {
#if LED_STATE_ON
state = !state;
#endif
if (state) {
MXC_GPIO_OutClr(LED_PORT, LED_PIN);
} else {
MXC_GPIO_OutSet(LED_PORT, LED_PIN);
}
}
uint32_t board_button_read(void) {
uint32_t state = MXC_GPIO_InGet(BUTTON_PORT, BUTTON_PIN) ? 1 : 0;
return BUTTON_STATE_ACTIVE == state;
}
size_t board_get_unique_id(uint8_t id[], size_t max_len) {
uint8_t hw_id[13];//USN Buffer
MXC_SYS_GetUSN(hw_id, 13);
size_t act_len = TU_MIN(max_len, 13);
memcpy(id, hw_id, act_len);
return act_len;
}
int board_uart_read(uint8_t *buf, int len) {
int uart_val;
int act_len = 0;
while (act_len < len) {
if ((uart_val = MXC_UART_ReadCharacterRaw(ConsoleUart)) == E_UNDERFLOW) {
break;
} else {
*buf++ = (uint8_t) uart_val;
act_len++;
}
}
return act_len;
}
int board_uart_write(void const *buf, int len) {
int act_len = 0;
const uint8_t *ch_ptr = (const uint8_t *) buf;
while (act_len < len) {
MXC_UART_WriteCharacter(ConsoleUart, *ch_ptr++);
act_len++;
}
return len;
}
#if CFG_TUSB_OS == OPT_OS_NONE
volatile uint32_t system_ticks = 0;
void SysTick_Handler(void) {
system_ticks++;
}
uint32_t board_millis(void) {
return system_ticks;
}
#endif
void HardFault_Handler(void) {
__asm("BKPT #0\n");
}
// Required by __libc_init_array in startup code if we are compiling using
// -nostdlib/-nostartfiles.
void _init(void) {
}

169
hw/bsp/max32650/family.cmake
View File

@@ -1,169 +0,0 @@
include_guard()
set(MAX32_PERIPH ${TOP}/hw/mcu/analog/max32/Libraries/PeriphDrivers)
set(MAX32_CMSIS ${TOP}/hw/mcu/analog/max32/Libraries/CMSIS)
set(CMSIS_5 ${TOP}/lib/CMSIS_5)
# include board specific information and functions
include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
# Get the linker file
set(LD_FILE_Clang ${LD_FILE_GNU})
# toolchain set up
set(CMAKE_SYSTEM_CPU cortex-m4 CACHE INTERNAL "System Processor")
set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
set(JLINK_DEVICE max32650)
set(OPENOCD_OPTION "-f interface/cmsis-dap.cfg -f target/max32650.cfg")
set(FAMILY_MCUS MAX32650 CACHE INTERNAL "")
function(update_board TARGET)
target_compile_definitions(${TARGET} PUBLIC
TARGET=MAX32650
TARGET_REV=0x4131
MXC_ASSERT_ENABLE
MAX32650
IAR_PRAGMAS=0
CFG_TUSB_MCU=OPT_MCU_MAX32650
BOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED
)
# Run any board specific updates
update_board_extras(${TARGET})
endfunction()
#------------------------------------
# BOARD_TARGET
#------------------------------------
# only need to be built ONCE for all examples
function(add_board_target BOARD_TARGET)
if (TARGET ${BOARD_TARGET})
return()
endif ()
# Startup & Linker script
set(STARTUP_FILE_GNU ${MAX32_CMSIS}/Device/Maxim/MAX32650/Source/GCC/startup_max32650.S)
set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
set(PERIPH_SRC ${MAX32_PERIPH}/Source)
add_library(${BOARD_TARGET} STATIC
${MAX32_CMSIS}/Device/Maxim/MAX32650/Source/heap.c
${MAX32_CMSIS}/Device/Maxim/MAX32650/Source/header_MAX32650.c
${MAX32_CMSIS}/Device/Maxim/MAX32650/Source/system_max32650.c
${PERIPH_SRC}/SYS/mxc_assert.c
${PERIPH_SRC}/SYS/mxc_delay.c
${PERIPH_SRC}/SYS/mxc_lock.c
${PERIPH_SRC}/SYS/nvic_table.c
${PERIPH_SRC}/SYS/pins_me10.c
${PERIPH_SRC}/SYS/sys_me10.c
${PERIPH_SRC}/TPU/tpu_me10.c
${PERIPH_SRC}/TPU/tpu_reva.c
${PERIPH_SRC}/FLC/flc_common.c
${PERIPH_SRC}/FLC/flc_me10.c
${PERIPH_SRC}/FLC/flc_reva.c
${PERIPH_SRC}/GPIO/gpio_common.c
${PERIPH_SRC}/GPIO/gpio_me10.c
${PERIPH_SRC}/GPIO/gpio_reva.c
${PERIPH_SRC}/ICC/icc_me10.c
${PERIPH_SRC}/ICC/icc_reva.c
${PERIPH_SRC}/ICC/icc_common.c
${PERIPH_SRC}/UART/uart_common.c
${PERIPH_SRC}/UART/uart_me10.c
${PERIPH_SRC}/UART/uart_reva.c
${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
)
target_include_directories(${BOARD_TARGET} PUBLIC
${CMAKE_CURRENT_FUNCTION_LIST_DIR}
${MAX32_CMSIS}/Include
${MAX32_CMSIS}/Device/Maxim/MAX32650/Include
${MAX32_PERIPH}/Include/MAX32650
${PERIPH_SRC}/SYS
${PERIPH_SRC}/GPIO
${PERIPH_SRC}/TPU
${PERIPH_SRC}/ICC
${PERIPH_SRC}/FLC
${PERIPH_SRC}/UART
)
target_compile_options(${BOARD_TARGET} PRIVATE
-Wno-error=strict-prototypes
)
update_board(${BOARD_TARGET})
if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
target_link_options(${BOARD_TARGET} PUBLIC
"LINKER:--script=${LD_FILE_GNU}"
-nostartfiles
--specs=nosys.specs --specs=nano.specs
-u sb_header #Needed when linking libraries to not lose the Signing header
)
elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
target_link_options(${BOARD_TARGET} PUBLIC
"LINKER:--script=${LD_FILE_Clang}"
)
endif ()
endfunction()
#------------------------------------
# Functions
#------------------------------------
function(family_configure_example TARGET RTOS)
family_configure_common(${TARGET} ${RTOS})
# Board target
add_board_target(board_${BOARD})
#---------- Port Specific ----------
# These files are built for each example since it depends on example's tusb_config.h
target_sources(${TARGET} PUBLIC
# BSP
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
)
target_include_directories(${TARGET} PUBLIC
# family, hw, board
${CMAKE_CURRENT_FUNCTION_LIST_DIR}
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
)
# Add TinyUSB target and port source
family_add_tinyusb(${TARGET} OPT_MCU_MAX32650)
target_sources(${TARGET} PUBLIC
${TOP}/src/portable/mentor/musb/dcd_musb.c
)
target_compile_options(${TARGET} PRIVATE
-Wno-error=strict-prototypes
)
target_link_libraries(${TARGET} PUBLIC board_${BOARD})
target_compile_options(${TARGET} PRIVATE
-Wno-error=strict-prototypes
)
# Flashing
family_add_bin_hex(${TARGET})
family_flash_jlink(${TARGET})
family_flash_openocd_adi(${TARGET})
# Add the optional MSDK OpenOCD flashing
family_flash_msdk(${TARGET})
endfunction()
function(family_flash_msdk TARGET)
# Prepare the image (signed) if the board requires it
prepare_image(${TARGET})
set(MAXIM_PATH "$ENV{MAXIM_PATH}")
add_custom_target(${TARGET}-msdk
DEPENDS ${TARGET}
COMMAND ${MAXIM_PATH}/Tools/OpenOCD/openocd -s ${MAXIM_PATH}/Tools/OpenOCD/scripts
-f interface/cmsis-dap.cfg -f target/max32650.cfg
-c "program $<TARGET_FILE:${TARGET}> verify; init; reset; exit"
VERBATIM
)
endfunction()

140
hw/bsp/max32650/family.mk
View File

@@ -1,140 +0,0 @@
DEPS_SUBMODULES += lib/CMSIS_5 hw/mcu/analog/max32
# Important locations in the hw support for MCU
MAX32_CMSIS = hw/mcu/analog/max32/Libraries/CMSIS
MAX32_PERIPH = hw/mcu/analog/max32/Libraries/PeriphDrivers
# Add any board specific make rules
include $(TOP)/$(BOARD_PATH)/board.mk
CPU_CORE ?= cortex-m4
PORT ?= 0
# GCC
SRC_S_GCC += $(MAX32_CMSIS)/Device/Maxim/MAX32650/Source/GCC/startup_max32650.S
# --------------
# Compiler Flags
# --------------
# Flags for the MAX32650/1/2 SDK
CFLAGS += -DTARGET=MAX32650 \
-DTARGET_REV=0x4131 \
-DMXC_ASSERT_ENABLE \
-DMAX32650 \
-DIAR_PRAGMAS=0
# Flags for TUSB features
CFLAGS += \
-DCFG_TUSB_MCU=OPT_MCU_MAX32650 \
-DBOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED
# mcu driver cause following warnings
CFLAGS += -Wno-error=strict-prototypes \
-Wno-error=unused-parameter \
-Wno-error=cast-align \
-Wno-error=cast-qual \
-Wno-error=sign-compare
LDFLAGS_GCC += -nostartfiles --specs=nosys.specs --specs=nano.specs
# Configure the flash rule. By default, use JLink.
SIGNED_BUILD ?= 0
DEFAULT_FLASH = flash-jlink
# If the applications needs to be signed (for the MAX32651), sign it first and
# then need to use MSDK's OpenOCD to flash it
# Also need to include the __SLA_FWK__ define to enable the signed header into
# memory
ifeq ($(SIGNED_BUILD), 1)
# Extra definitions to build for the secure part
CFLAGS += -D__SLA_FWK__
DEFAULT_FLASH := sign-build flash-msdk
endif
# For flash-jlink target
JLINK_DEVICE = max32650
# Configure the flash rule
flash: $(DEFAULT_FLASH)
# -----------------
# Sources & Include
# -----------------
PERIPH_SRC = $(TOP)/$(MAX32_PERIPH)/Source
SRC_C += \
src/portable/mentor/musb/dcd_musb.c \
$(MAX32_CMSIS)/Device/Maxim/MAX32650/Source/heap.c \
$(MAX32_CMSIS)/Device/Maxim/MAX32650/Source/system_max32650.c \
$(MAX32_CMSIS)/Device/Maxim/MAX32650/Source/header_MAX32650.c \
$(PERIPH_SRC)/SYS/mxc_assert.c \
$(PERIPH_SRC)/SYS/mxc_delay.c \
$(PERIPH_SRC)/SYS/mxc_lock.c \
$(PERIPH_SRC)/SYS/nvic_table.c \
$(PERIPH_SRC)/SYS/pins_me10.c \
$(PERIPH_SRC)/SYS/sys_me10.c \
$(PERIPH_SRC)/FLC/flc_common.c \
$(PERIPH_SRC)/FLC/flc_me10.c \
$(PERIPH_SRC)/FLC/flc_reva.c \
$(PERIPH_SRC)/GPIO/gpio_common.c \
$(PERIPH_SRC)/GPIO/gpio_me10.c \
$(PERIPH_SRC)/GPIO/gpio_reva.c \
$(PERIPH_SRC)/ICC/icc_me10.c \
$(PERIPH_SRC)/ICC/icc_reva.c \
$(PERIPH_SRC)/ICC/icc_common.c \
$(PERIPH_SRC)/TPU/tpu_me10.c \
$(PERIPH_SRC)/TPU/tpu_reva.c \
$(PERIPH_SRC)/UART/uart_common.c \
$(PERIPH_SRC)/UART/uart_me10.c \
$(PERIPH_SRC)/UART/uart_reva.c \
INC += \
$(TOP)/$(BOARD_PATH) \
$(TOP)/$(MAX32_CMSIS)/Include \
$(TOP)/$(MAX32_CMSIS)/Device/Maxim/MAX32650/Include \
$(TOP)/$(MAX32_PERIPH)/Include/MAX32650 \
$(PERIPH_SRC)/SYS \
$(PERIPH_SRC)/GPIO \
$(PERIPH_SRC)/ICC \
$(PERIPH_SRC)/FLC \
$(PERIPH_SRC)/TPU \
$(PERIPH_SRC)/UART
# The MAX32651EVKIT is pin for pin identical to the MAX32650EVKIT, however the
# MAX32651 has a secure bootloader which requires the image to be signed before
# loading into flash. All MAX32651EVKIT's have the same key for evaluation
# purposes, so create a special flash rule to sign the binary and flash using
# the MSDK.
MCU_PATH = $(TOP)/hw/mcu/analog/max32/
# Assume no extension for sign utility
SIGN_EXE = sign_app
ifeq ($(OS), Windows_NT)
# Must use .exe extension on Windows, since the binaries
# for Linux may live in the same place.
SIGN_EXE := sign_app.exe
else
UNAME = $(shell uname -s)
ifneq ($(findstring MSYS_NT,$(UNAME)),)
# Must also use .exe extension for MSYS2
SIGN_EXE := sign_app.exe
endif
endif
# Rule to sign the build. This will in-place modify the existing .elf file
# an populate the .sig section with the signature value
sign-build: $(BUILD)/$(PROJECT).elf
$(OBJCOPY) $(BUILD)/$(PROJECT).elf -R .sig -O binary $(BUILD)/$(PROJECT).bin
$(MCU_PATH)/Tools/SBT/bin/$(SIGN_EXE) -c MAX32651 \
key_file="$(MCU_PATH)/Tools/SBT/devices/MAX32651/keys/maximtestcrk.key" \
ca=$(BUILD)/$(PROJECT).bin sca=$(BUILD)/$(PROJECT).sbin
$(OBJCOPY) $(BUILD)/$(PROJECT).elf --update-section .sig=$(BUILD)/$(PROJECT).sig
# Optional flash option when running within an installed MSDK to use OpenOCD
# Mainline OpenOCD does not yet have the MAX32's flash algorithm integrated.
# If the MSDK is installed, flash-msdk can be run to utilize the the modified
# openocd with the algorithms
MAXIM_PATH := $(subst \,/,$(MAXIM_PATH))
flash-msdk: $(BUILD)/$(PROJECT).elf
$(MAXIM_PATH)/Tools/OpenOCD/openocd -s $(MAXIM_PATH)/Tools/OpenOCD/scripts \
-f interface/cmsis-dap.cfg -f target/max32650.cfg \
-c "program $(BUILD)/$(PROJECT).elf verify; init; reset; exit"

149
hw/bsp/max32666/FreeRTOSConfig/FreeRTOSConfig.h
View File

@@ -1,149 +0,0 @@
/*
* FreeRTOS Kernel V10.0.0
* Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
* this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software. If you wish to use our Amazon
* FreeRTOS name, please do so in a fair use way that does not cause confusion.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* http://www.FreeRTOS.org
* http://aws.amazon.com/freertos
*
* 1 tab == 4 spaces!
*/
#ifndef FREERTOS_CONFIG_H
#define FREERTOS_CONFIG_H
/*-----------------------------------------------------------
* Application specific definitions.
*
* These definitions should be adjusted for your particular hardware and
* application requirements.
*
* THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
* FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
*
* See http://www.freertos.org/a00110.html.
*----------------------------------------------------------*/
// skip if included from IAR assembler
#ifndef __IASMARM__
#include "mxc_device.h"
#endif
/* Cortex M23/M33 port configuration. */
#define configENABLE_MPU 0
#define configENABLE_FPU 1
#define configENABLE_TRUSTZONE 0
#define configMINIMAL_SECURE_STACK_SIZE (1024)
#define configUSE_PREEMPTION 1
#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
#define configCPU_CLOCK_HZ SystemCoreClock
#define configTICK_RATE_HZ ( 1000 )
#define configMAX_PRIORITIES ( 5 )
#define configMINIMAL_STACK_SIZE ( 128 )
#define configTOTAL_HEAP_SIZE ( configSUPPORT_DYNAMIC_ALLOCATION*4*1024 )
#define configMAX_TASK_NAME_LEN 16
#define configUSE_16_BIT_TICKS 0
#define configIDLE_SHOULD_YIELD 1
#define configUSE_MUTEXES 1
#define configUSE_RECURSIVE_MUTEXES 1
#define configUSE_COUNTING_SEMAPHORES 1
#define configQUEUE_REGISTRY_SIZE 4
#define configUSE_QUEUE_SETS 0
#define configUSE_TIME_SLICING 0
#define configUSE_NEWLIB_REENTRANT 0
#define configENABLE_BACKWARD_COMPATIBILITY 1
#define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP 0
#define configSUPPORT_STATIC_ALLOCATION 1
#define configSUPPORT_DYNAMIC_ALLOCATION 0
/* Hook function related definitions. */
#define configUSE_IDLE_HOOK 0
#define configUSE_TICK_HOOK 0
#define configUSE_MALLOC_FAILED_HOOK 0 // cause nested extern warning
#define configCHECK_FOR_STACK_OVERFLOW 2
#define configCHECK_HANDLER_INSTALLATION 0
/* Run time and task stats gathering related definitions. */
#define configGENERATE_RUN_TIME_STATS 0
#define configRECORD_STACK_HIGH_ADDRESS 1
#define configUSE_TRACE_FACILITY 1 // legacy trace
#define configUSE_STATS_FORMATTING_FUNCTIONS 0
/* Co-routine definitions. */
#define configUSE_CO_ROUTINES 0
#define configMAX_CO_ROUTINE_PRIORITIES 2
/* Software timer related definitions. */
#define configUSE_TIMERS 1
#define configTIMER_TASK_PRIORITY (configMAX_PRIORITIES-2)
#define configTIMER_QUEUE_LENGTH 32
#define configTIMER_TASK_STACK_DEPTH configMINIMAL_STACK_SIZE
/* Optional functions - most linkers will remove unused functions anyway. */
#define INCLUDE_vTaskPrioritySet 0
#define INCLUDE_uxTaskPriorityGet 0
#define INCLUDE_vTaskDelete 0
#define INCLUDE_vTaskSuspend 1 // required for queue, semaphore, mutex to be blocked indefinitely with portMAX_DELAY
#define INCLUDE_xResumeFromISR 0
#define INCLUDE_vTaskDelayUntil 1
#define INCLUDE_vTaskDelay 1
#define INCLUDE_xTaskGetSchedulerState 0
#define INCLUDE_xTaskGetCurrentTaskHandle 1
#define INCLUDE_uxTaskGetStackHighWaterMark 0
#define INCLUDE_xTaskGetIdleTaskHandle 0
#define INCLUDE_xTimerGetTimerDaemonTaskHandle 0
#define INCLUDE_pcTaskGetTaskName 0
#define INCLUDE_eTaskGetState 0
#define INCLUDE_xEventGroupSetBitFromISR 0
#define INCLUDE_xTimerPendFunctionCall 0
/* FreeRTOS hooks to NVIC vectors */
#define xPortPendSVHandler PendSV_Handler
#define xPortSysTickHandler SysTick_Handler
#define vPortSVCHandler SVC_Handler
//--------------------------------------------------------------------+
// Interrupt nesting behavior configuration.
//--------------------------------------------------------------------+
// For Cortex-M specific: __NVIC_PRIO_BITS is defined in mcu header
#define configPRIO_BITS __NVIC_PRIO_BITS
/* The lowest interrupt priority that can be used in a call to a "set priority" function. */
#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY ((1<<configPRIO_BITS) - 1)
/* The highest interrupt priority that can be used by any interrupt service
routine that makes calls to interrupt safe FreeRTOS API functions. DO NOT CALL
INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
PRIORITY THAN THIS! (higher priorities are lower numeric values. */
#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 2
/* Interrupt priorities used by the kernel port layer itself. These are generic
to all Cortex-M ports, and do not rely on any particular library functions. */
#define configKERNEL_INTERRUPT_PRIORITY ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
#define configMAX_SYSCALL_INTERRUPT_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
#endif

32
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@@ -1,32 +0,0 @@
# Analog Devices MAX32665/6
This BSP is for working with the Analog Devices
[MAX32665](https://www.analog.com/en/products/max32665.html) and
[MAX32666](https://www.analog.com/en/products/max32666.html) microcontrollers.
The following boards are supported:
* [MAX32666EVKIT](https://www.analog.com/en/resources/evaluation-hardware-and-software/evaluation-boards-kits/max32666evkit.html)
* [MAX32666FTHR](https://www.analog.com/en/resources/evaluation-hardware-and-software/evaluation-boards-kits/max32666fthr.html)
This part family leverages the Maxim Microcontrollers SDK (MSDK) for the device
interfaces and hardware abstraction layers. This source code package is fetched
as part of the get-deps script.
The microcontrollers utilize the standard GNU ARM toolchain. If this toolchain
is not already available on your build machine, it can be installed by using the
bundled MSDK installation. Details on downloading and installing can be found
in the [User's Guide](https://analogdevicesinc.github.io/msdk//USERGUIDE/).
## Flashing
The default flashing behavior in this BSP is to utilize JLink. This can be done
by running the `flash` or `flash-jlink` rule for Makefiles, or the
`<target>-jlink` target for CMake.
Both the Evaluation Kit and Feather boards are shipped with a CMSIS-DAP
compatible debug probe. However, at the time of writing, the necessary flashing
algorithms for OpenOCD have not yet been incorporated into the OpenOCD master
branch. To utilize the provided debug probes, please install the bundled MSDK
package which includes the appropriate OpenOCD modifications. To leverage this
OpenOCD instance, run the `flash-msdk` Makefile rule, or `<target>-msdk` CMake
target.

1
hw/bsp/max32666/boards/max32666evkit/board.cmake
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# Nothing to be done at the board level

1
hw/bsp/max32666/boards/max32666evkit/board.mk
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# No specific build requirements for the board.

1
hw/bsp/max32666/boards/max32666fthr/board.cmake
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# Nothing to be done at the board level

1
hw/bsp/max32666/boards/max32666fthr/board.mk
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# No specific build requirements for the board.

147
hw/bsp/max32666/family.cmake
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include_guard()
set(MAX32_PERIPH ${TOP}/hw/mcu/analog/max32/Libraries/PeriphDrivers)
set(MAX32_CMSIS ${TOP}/hw/mcu/analog/max32/Libraries/CMSIS)
set(CMSIS_5 ${TOP}/lib/CMSIS_5)
# include board specific
include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
# Get the linker file from current location (family)
set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/max32666.ld)
set(LD_FILE_Clang ${LD_FILE_GNU})
# toolchain set up
set(CMAKE_SYSTEM_CPU cortex-m4 CACHE INTERNAL "System Processor")
set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
set(JLINK_DEVICE max32666)
set(OPENOCD_OPTION "-f interface/cmsis-dap.cfg -f target/max32665.cfg")
set(FAMILY_MCUS MAX32666 CACHE INTERNAL "")
function(update_board TARGET)
target_compile_definitions(${TARGET} PUBLIC
TARGET=MAX32665
TARGET_REV=0x4131
MXC_ASSERT_ENABLE
MAX32665
IAR_PRAGMAS=0
CFG_TUSB_MCU=OPT_MCU_MAX32666
BOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED
)
endfunction()
#------------------------------------
# BOARD_TARGET
#------------------------------------
# only need to be built ONCE for all examples
function(add_board_target BOARD_TARGET)
if (TARGET ${BOARD_TARGET})
return()
endif ()
# Startup & Linker script
set(STARTUP_FILE_GNU ${MAX32_CMSIS}/Device/Maxim/MAX32665/Source/GCC/startup_max32665.S)
set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
set(PERIPH_SRC ${MAX32_PERIPH}/Source)
add_library(${BOARD_TARGET} STATIC
${MAX32_CMSIS}/Device/Maxim/MAX32665/Source/heap.c
${MAX32_CMSIS}/Device/Maxim/MAX32665/Source/system_max32665.c
${PERIPH_SRC}/SYS/mxc_assert.c
${PERIPH_SRC}/SYS/mxc_delay.c
${PERIPH_SRC}/SYS/mxc_lock.c
${PERIPH_SRC}/SYS/nvic_table.c
${PERIPH_SRC}/SYS/pins_me14.c
${PERIPH_SRC}/SYS/sys_me14.c
${PERIPH_SRC}/TPU/tpu_me14.c
${PERIPH_SRC}/TPU/tpu_reva.c
${PERIPH_SRC}/FLC/flc_common.c
${PERIPH_SRC}/FLC/flc_me14.c
${PERIPH_SRC}/FLC/flc_reva.c
${PERIPH_SRC}/GPIO/gpio_common.c
${PERIPH_SRC}/GPIO/gpio_me14.c
${PERIPH_SRC}/GPIO/gpio_reva.c
${PERIPH_SRC}/ICC/icc_me14.c
${PERIPH_SRC}/ICC/icc_reva.c
${PERIPH_SRC}/UART/uart_common.c
${PERIPH_SRC}/UART/uart_me14.c
${PERIPH_SRC}/UART/uart_reva.c
${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
)
target_include_directories(${BOARD_TARGET} PUBLIC
${CMAKE_CURRENT_FUNCTION_LIST_DIR}
${MAX32_CMSIS}/Include
${MAX32_CMSIS}/Device/Maxim/MAX32665/Include
${MAX32_PERIPH}/Include/MAX32665
${PERIPH_SRC}/SYS
${PERIPH_SRC}/GPIO
${PERIPH_SRC}/TPU
${PERIPH_SRC}/ICC
${PERIPH_SRC}/FLC
${PERIPH_SRC}/UART
)
target_compile_options(${BOARD_TARGET} PRIVATE
-Wno-error=strict-prototypes
)
update_board(${BOARD_TARGET})
if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
target_link_options(${BOARD_TARGET} PUBLIC
"LINKER:--script=${LD_FILE_GNU}"
-nostartfiles
--specs=nosys.specs --specs=nano.specs
)
elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
target_link_options(${BOARD_TARGET} PUBLIC
"LINKER:--script=${LD_FILE_Clang}"
)
endif ()
endfunction()
#------------------------------------
# Functions
#------------------------------------
function(family_configure_example TARGET RTOS)
family_configure_common(${TARGET} ${RTOS})
# Board target
add_board_target(board_${BOARD})
#---------- Port Specific ----------
# These files are built for each example since it depends on example's tusb_config.h
target_sources(${TARGET} PUBLIC
# BSP
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
)
target_include_directories(${TARGET} PUBLIC
# family, hw, board
${CMAKE_CURRENT_FUNCTION_LIST_DIR}
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
)
# Add TinyUSB target and port source
family_add_tinyusb(${TARGET} OPT_MCU_MAX32666)
target_sources(${TARGET} PUBLIC
${TOP}/src/portable/mentor/musb/dcd_musb.c
)
target_compile_options(${TARGET} PRIVATE
-Wno-error=strict-prototypes
)
target_link_libraries(${TARGET} PUBLIC board_${BOARD})
target_compile_options(${TARGET} PRIVATE
-Wno-error=strict-prototypes
)
# Flashing
family_add_bin_hex(${TARGET})
family_flash_jlink(${TARGET})
family_flash_openocd_adi(${TARGET})
endfunction()

93
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DEPS_SUBMODULES += lib/CMSIS_5 hw/mcu/analog/max32
# Important locations in the hw support for MCU
MAX32_CMSIS = hw/mcu/analog/max32/Libraries/CMSIS
MAX32_PERIPH = hw/mcu/analog/max32/Libraries/PeriphDrivers
# Add any board specific make rules
include $(TOP)/$(BOARD_PATH)/board.mk
CPU_CORE ?= cortex-m4
PORT ?= 0
# GCC
SRC_S_GCC += $(MAX32_CMSIS)/Device/Maxim/MAX32665/Source/GCC/startup_max32665.S
LD_FILE = $(FAMILY_PATH)/max32666.ld
# --------------
# Compiler Flags
# --------------
# Flags for the MAX32665/6 SDK
CFLAGS += -DTARGET=MAX32665 \
-DTARGET_REV=0x4131 \
-DMXC_ASSERT_ENABLE \
-DMAX32665 \
-DIAR_PRAGMAS=0
# Flags for TUSB features
CFLAGS += \
-DCFG_TUSB_MCU=OPT_MCU_MAX32666 \
-DBOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED
# mcu driver cause following warnings
CFLAGS += -Wno-error=strict-prototypes \
-Wno-error=unused-parameter \
-Wno-error=cast-align \
-Wno-error=cast-qual
LDFLAGS_GCC += -nostartfiles --specs=nosys.specs --specs=nano.specs
# For flash-jlink target
JLINK_DEVICE = max32666
# flash target using Jlink by default
flash: flash-jlink
# Optional flash option when running within an installed MSDK to use OpenOCD
# Mainline OpenOCD does not yet have the MAX32's flash algorithm integrated.
# If the MSDK is installed, flash-msdk can be run to utilize the the modified
# openocd with the algorithms
MAXIM_PATH := $(subst \,/,$(MAXIM_PATH))
flash-msdk: $(BUILD)/$(PROJECT).elf
$(MAXIM_PATH)/Tools/OpenOCD/openocd -s $(MAXIM_PATH)/Tools/OpenOCD/scripts \
-f interface/cmsis-dap.cfg -f target/max32665.cfg \
-c "program $(BUILD)/$(PROJECT).elf verify; init; reset; exit"
# -----------------
# Sources & Include
# -----------------
PERIPH_SRC = $(TOP)/$(MAX32_PERIPH)/Source
SRC_C += \
src/portable/mentor/musb/dcd_musb.c \
$(MAX32_CMSIS)/Device/Maxim/MAX32665/Source/heap.c \
$(MAX32_CMSIS)/Device/Maxim/MAX32665/Source/system_max32665.c \
$(PERIPH_SRC)/SYS/mxc_assert.c \
$(PERIPH_SRC)/SYS/mxc_delay.c \
$(PERIPH_SRC)/SYS/mxc_lock.c \
$(PERIPH_SRC)/SYS/nvic_table.c \
$(PERIPH_SRC)/SYS/pins_me14.c \
$(PERIPH_SRC)/SYS/sys_me14.c \
$(PERIPH_SRC)/FLC/flc_common.c \
$(PERIPH_SRC)/FLC/flc_me14.c \
$(PERIPH_SRC)/FLC/flc_reva.c \
$(PERIPH_SRC)/GPIO/gpio_common.c \
$(PERIPH_SRC)/GPIO/gpio_me14.c \
$(PERIPH_SRC)/GPIO/gpio_reva.c \
$(PERIPH_SRC)/ICC/icc_me14.c \
$(PERIPH_SRC)/ICC/icc_reva.c \
$(PERIPH_SRC)/TPU/tpu_me14.c \
$(PERIPH_SRC)/TPU/tpu_reva.c \
$(PERIPH_SRC)/UART/uart_common.c \
$(PERIPH_SRC)/UART/uart_me14.c \
$(PERIPH_SRC)/UART/uart_reva.c \
INC += \
$(TOP)/$(BOARD_PATH) \
$(TOP)/$(MAX32_CMSIS)/Include \
$(TOP)/$(MAX32_CMSIS)/Device/Maxim/MAX32665/Include \
$(TOP)/$(MAX32_PERIPH)/Include/MAX32665 \
$(PERIPH_SRC)/SYS \
$(PERIPH_SRC)/GPIO \
$(PERIPH_SRC)/ICC \
$(PERIPH_SRC)/FLC \
$(PERIPH_SRC)/TPU \
$(PERIPH_SRC)/UART

31
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# Analog Devices MAX32690
This BSP is for working with the Analog Devices
[MAX32690](https://www.analog.com/en/products/max32690.html) microcontroller.
The following boards are supported:
* [MAX32690EVKIT](https://www.analog.com/en/resources/evaluation-hardware-and-software/evaluation-boards-kits/max32690evkit.html)
* [AD-APARD32690-SL](https://www.analog.com/en/resources/evaluation-hardware-and-software/evaluation-boards-kits/ad-apard32690-sl.html)
This part family leverages the Maxim Microcontrollers SDK (MSDK) for the device
interfaces and hardware abstraction layers. This source code package is fetched
as part of the get-deps script.
The microcontroller utilizes the standard GNU ARM toolchain. If this toolchain
is not already available on your build machine, it can be installed by using the
bundled MSDK installation. Details on downloading and installing can be found
in the [User's Guide](https://analogdevicesinc.github.io/msdk//USERGUIDE/).
## Flashing
The default flashing behavior in this BSP is to utilize JLink. This can be done
by running the `flash` or `flash-jlink` rule for Makefiles, or the
`<target>-jlink` target for CMake.
Both the Evaluation Kit and APARD boards are shipped with a CMSIS-DAP
compatible debug probe. However, at the time of writing, the necessary flashing
algorithms for OpenOCD have not yet been incorporated into the OpenOCD master
branch. To utilize the provided debug probes, please install the bundled MSDK
package which includes the appropriate OpenOCD modifications. To leverage this
OpenOCD instance, run the `flash-msdk` Makefile rule, or `<target>-msdk` CMake
target.

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hw/bsp/max32690/boards/apard32690/board.cmake
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# Nothing to be done at the board level

1
hw/bsp/max32690/boards/apard32690/board.mk
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# No specific build requirements for the board.

1
hw/bsp/max32690/boards/max32690evkit/board.cmake
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@@ -1 +0,0 @@
# Nothing to be done at the board level

1
hw/bsp/max32690/boards/max32690evkit/board.mk
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# No specific build requirements for the board.

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hw/bsp/max32690/family.c
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/*
* The MIT License (MIT)
*
* Copyright (c) 2024 Brent Kowal (Analog Devices, Inc)
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*
* This file is part of the TinyUSB stack.
*/
/* metadata:
manufacturer: Analog Devices
*/
#ifdef __GNUC__
#pragma GCC diagnostic push
#pragma GCC diagnostic ignored "-Wstrict-prototypes" // _mxc_crit_get_state()
#endif
#include "gpio.h"
#include "mxc_sys.h"
#include "mcr_regs.h"
#include "mxc_device.h"
#include "uart.h"
#ifdef __GNUC__
#pragma GCC diagnostic pop
#endif
#include "board.h"
#include "bsp/board_api.h"
//--------------------------------------------------------------------+
// Forward USB interrupt events to TinyUSB IRQ Handler
//--------------------------------------------------------------------+
void USB_IRQHandler(void) {
tud_int_handler(0);
}
//--------------------------------------------------------------------+
// MACRO TYPEDEF CONSTANT ENUM
//--------------------------------------------------------------------+
mxc_uart_regs_t *ConsoleUart = MXC_UART_GET_UART(UART_NUM);
void board_init(void) {
#if CFG_TUSB_OS == OPT_OS_NONE
// 1ms tick timer
SysTick_Config(SystemCoreClock / 1000);
#elif CFG_TUSB_OS == OPT_OS_FREERTOS
// If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
NVIC_SetPriority(USB_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
#endif
mxc_gpio_cfg_t gpioConfig;
// LED
gpioConfig.drvstr = MXC_GPIO_DRVSTR_0;
gpioConfig.func = MXC_GPIO_FUNC_OUT;
gpioConfig.mask = LED_PIN;
gpioConfig.pad = MXC_GPIO_PAD_NONE;
gpioConfig.port = LED_PORT;
gpioConfig.vssel = LED_VDDIO;
MXC_GPIO_Config(&gpioConfig);
board_led_write(false);
// Button
gpioConfig.drvstr = MXC_GPIO_DRVSTR_0;
gpioConfig.func = MXC_GPIO_FUNC_IN;
gpioConfig.mask = BUTTON_PIN;
gpioConfig.pad = BUTTON_PULL;
gpioConfig.port = BUTTON_PORT;
gpioConfig.vssel = MXC_GPIO_VSSEL_VDDIO;
MXC_GPIO_Config(&gpioConfig);
// UART
MXC_UART_Init(ConsoleUart, CFG_BOARD_UART_BAUDRATE, MXC_UART_IBRO_CLK);
//USB
MXC_SYS_ClockSourceEnable(MXC_SYS_CLOCK_IPO);
MXC_MCR->ldoctrl |= MXC_F_MCR_LDOCTRL_0P9EN;
MXC_SYS_ClockEnable(MXC_SYS_PERIPH_CLOCK_USB);
MXC_SYS_Reset_Periph(MXC_SYS_RESET0_USB);
}
//--------------------------------------------------------------------+
// Board porting API
//--------------------------------------------------------------------+
void board_led_write(bool state) {
#if LED_STATE_ON
state = !state;
#endif
if (state) {
MXC_GPIO_OutClr(LED_PORT, LED_PIN);
} else {
MXC_GPIO_OutSet(LED_PORT, LED_PIN);
}
}
uint32_t board_button_read(void) {
uint32_t state = MXC_GPIO_InGet(BUTTON_PORT, BUTTON_PIN) ? 1 : 0;
return BUTTON_STATE_ACTIVE == state;
}
size_t board_get_unique_id(uint8_t id[], size_t max_len) {
uint8_t hw_id[MXC_SYS_USN_CHECKSUM_LEN];//USN Buffer
/* All other 2nd parameter is optional checksum buffer */
MXC_SYS_GetUSN(hw_id, NULL);
size_t act_len = TU_MIN(max_len, MXC_SYS_USN_LEN);
memcpy(id, hw_id, act_len);
return act_len;
}
int board_uart_read(uint8_t *buf, int len) {
int uart_val;
int act_len = 0;
while (act_len < len) {
if ((uart_val = MXC_UART_ReadCharacterRaw(ConsoleUart)) == E_UNDERFLOW) {
break;
} else {
*buf++ = (uint8_t) uart_val;
act_len++;
}
}
return act_len;
}
int board_uart_write(void const *buf, int len) {
int act_len = 0;
const uint8_t *ch_ptr = (const uint8_t *) buf;
while (act_len < len) {
MXC_UART_WriteCharacter(ConsoleUart, *ch_ptr++);
act_len++;
}
return len;
}
#if CFG_TUSB_OS == OPT_OS_NONE
volatile uint32_t system_ticks = 0;
void SysTick_Handler(void) {
system_ticks++;
}
uint32_t board_millis(void) {
return system_ticks;
}
#endif
void HardFault_Handler(void) {
__asm("BKPT #0\n");
}
// Required by __libc_init_array in startup code if we are compiling using
// -nostdlib/-nostartfiles.
void _init(void) {
}

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@@ -1,152 +0,0 @@
include_guard()
set(MAX32_PERIPH ${TOP}/hw/mcu/analog/max32/Libraries/PeriphDrivers)
set(MAX32_CMSIS ${TOP}/hw/mcu/analog/max32/Libraries/CMSIS)
set(CMSIS_5 ${TOP}/lib/CMSIS_5)
# include board specific
include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
# Get the linker file from current location (family)
set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/max32690.ld)
set(LD_FILE_Clang ${LD_FILE_GNU})
# toolchain set up
set(CMAKE_SYSTEM_CPU cortex-m4 CACHE INTERNAL "System Processor")
set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
set(JLINK_DEVICE max32690)
set(OPENOCD_OPTION "-f interface/cmsis-dap.cfg -f target/max32690.cfg")
set(FAMILY_MCUS MAX32690 CACHE INTERNAL "")
function(update_board TARGET)
target_compile_definitions(${TARGET} PUBLIC
TARGET=MAX32690
TARGET_REV=0x4131
MXC_ASSERT_ENABLE
MAX32690
FLASH_ORIGIN=0x10000000
FLASH_SIZE=0x340000
SRAM_ORIGIN=0x20000000
SRAM_SIZE=0x100000
IAR_PRAGMAS=0
CFG_TUSB_MCU=OPT_MCU_MAX32690
BOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED
)
endfunction()
#------------------------------------
# BOARD_TARGET
#------------------------------------
# only need to be built ONCE for all examples
function(add_board_target BOARD_TARGET)
if (TARGET ${BOARD_TARGET})
return()
endif ()
# Startup & Linker script
set(STARTUP_FILE_GNU ${MAX32_CMSIS}/Device/Maxim/MAX32690/Source/GCC/startup_max32690.S)
set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
set(PERIPH_SRC ${MAX32_PERIPH}/Source)
add_library(${BOARD_TARGET} STATIC
${MAX32_CMSIS}/Device/Maxim/MAX32690/Source/heap.c
${MAX32_CMSIS}/Device/Maxim/MAX32690/Source/system_max32690.c
${PERIPH_SRC}/SYS/mxc_assert.c
${PERIPH_SRC}/SYS/mxc_delay.c
${PERIPH_SRC}/SYS/mxc_lock.c
${PERIPH_SRC}/SYS/nvic_table.c
${PERIPH_SRC}/SYS/pins_me18.c
${PERIPH_SRC}/SYS/sys_me18.c
${PERIPH_SRC}/CTB/ctb_me18.c
${PERIPH_SRC}/CTB/ctb_reva.c
${PERIPH_SRC}/CTB/ctb_common.c
${PERIPH_SRC}/FLC/flc_common.c
${PERIPH_SRC}/FLC/flc_me18.c
${PERIPH_SRC}/FLC/flc_reva.c
${PERIPH_SRC}/GPIO/gpio_common.c
${PERIPH_SRC}/GPIO/gpio_me18.c
${PERIPH_SRC}/GPIO/gpio_reva.c
${PERIPH_SRC}/ICC/icc_me18.c
${PERIPH_SRC}/ICC/icc_reva.c
${PERIPH_SRC}/UART/uart_common.c
${PERIPH_SRC}/UART/uart_me18.c
${PERIPH_SRC}/UART/uart_revb.c
${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
)
target_include_directories(${BOARD_TARGET} PUBLIC
${CMAKE_CURRENT_FUNCTION_LIST_DIR}
${MAX32_CMSIS}/Include
${MAX32_CMSIS}/Device/Maxim/MAX32690/Include
${MAX32_PERIPH}/Include/MAX32690
${PERIPH_SRC}/SYS
${PERIPH_SRC}/GPIO
${PERIPH_SRC}/CTB
${PERIPH_SRC}/ICC
${PERIPH_SRC}/FLC
${PERIPH_SRC}/UART
)
target_compile_options(${BOARD_TARGET} PRIVATE
-Wno-error=strict-prototypes
)
update_board(${BOARD_TARGET})
if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
target_link_options(${BOARD_TARGET} PUBLIC
"LINKER:--script=${LD_FILE_GNU}"
-nostartfiles
--specs=nosys.specs --specs=nano.specs
)
elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
target_link_options(${BOARD_TARGET} PUBLIC
"LINKER:--script=${LD_FILE_Clang}"
)
endif ()
endfunction()
#------------------------------------
# Functions
#------------------------------------
function(family_configure_example TARGET RTOS)
family_configure_common(${TARGET} ${RTOS})
# Board target
add_board_target(board_${BOARD})
#---------- Port Specific ----------
# These files are built for each example since it depends on example's tusb_config.h
target_sources(${TARGET} PUBLIC
# BSP
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
)
target_include_directories(${TARGET} PUBLIC
# family, hw, board
${CMAKE_CURRENT_FUNCTION_LIST_DIR}
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
)
# Add TinyUSB target and port source
family_add_tinyusb(${TARGET} OPT_MCU_MAX32690)
target_sources(${TARGET} PUBLIC
${TOP}/src/portable/mentor/musb/dcd_musb.c
)
target_compile_options(${TARGET} PRIVATE
-Wno-error=strict-prototypes
)
target_link_libraries(${TARGET} PUBLIC board_${BOARD})
target_compile_options(${TARGET} PRIVATE
-Wno-error=strict-prototypes
)
# Flashing
family_add_bin_hex(${TARGET})
family_flash_jlink(${TARGET})
family_flash_openocd_adi(${TARGET})
endfunction()

101
hw/bsp/max32690/family.mk
View File

@@ -1,101 +0,0 @@
DEPS_SUBMODULES += lib/CMSIS_5 hw/mcu/analog/max32
# Important locations in the hw support for MCU
MAX32_CMSIS = hw/mcu/analog/max32/Libraries/CMSIS
MAX32_PERIPH = hw/mcu/analog/max32/Libraries/PeriphDrivers
# Add any board specific make rules
include $(TOP)/$(BOARD_PATH)/board.mk
CPU_CORE ?= cortex-m4
PORT ?= 0
# GCC
SRC_S_GCC += $(MAX32_CMSIS)/Device/Maxim/MAX32690/Source/GCC/startup_max32690.S
LD_FILE = $(FAMILY_PATH)/max32690.ld
# --------------
# Compiler Flags
# --------------
# Flags for the MAX32690 SDK
CFLAGS += -DTARGET=MAX32690 \
-DTARGET_REV=0x4131 \
-DMXC_ASSERT_ENABLE \
-DMAX32690 \
-DFLASH_ORIGIN=0x10000000 \
-DFLASH_SIZE=0x340000 \
-DSRAM_ORIGIN=0x20000000 \
-DSRAM_SIZE=0x100000 \
-DIAR_PRAGMAS=0
# Flags for TUSB features
CFLAGS += \
-DCFG_TUSB_MCU=OPT_MCU_MAX32690 \
-DBOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED
# mcu driver cause following warnings
CFLAGS += -Wno-error=unused-parameter \
-Wno-error=strict-prototypes \
-Wno-error=old-style-declaration \
-Wno-error=sign-compare \
-Wno-error=cast-qual \
-Wno-lto-type-mismatch
LDFLAGS_GCC += -nostartfiles --specs=nosys.specs --specs=nano.specs
# For flash-jlink target
JLINK_DEVICE = max32690
# flash target using Jlink by default
flash: flash-jlink
# Optional flash option when running within an installed MSDK to use OpenOCD
# Mainline OpenOCD does not yet have the MAX32's flash algorithm integrated.
# If the MSDK is installed, flash-msdk can be run to utilize the the modified
# openocd with the algorithms
MAXIM_PATH := $(subst \,/,$(MAXIM_PATH))
flash-msdk: $(BUILD)/$(PROJECT).elf
$(MAXIM_PATH)/Tools/OpenOCD/openocd -s $(MAXIM_PATH)/Tools/OpenOCD/scripts \
-f interface/cmsis-dap.cfg -f target/max32690.cfg \
-c "program $(BUILD)/$(PROJECT).elf verify; init; reset; exit"
# -----------------
# Sources & Include
# -----------------
PERIPH_SRC = $(TOP)/$(MAX32_PERIPH)/Source
SRC_C += \
src/portable/mentor/musb/dcd_musb.c \
$(MAX32_CMSIS)/Device/Maxim/MAX32690/Source/heap.c \
$(MAX32_CMSIS)/Device/Maxim/MAX32690/Source/system_max32690.c \
$(PERIPH_SRC)/SYS/mxc_assert.c \
$(PERIPH_SRC)/SYS/mxc_delay.c \
$(PERIPH_SRC)/SYS/mxc_lock.c \
$(PERIPH_SRC)/SYS/nvic_table.c \
$(PERIPH_SRC)/SYS/pins_me18.c \
$(PERIPH_SRC)/SYS/sys_me18.c \
$(PERIPH_SRC)/CTB/ctb_me18.c \
$(PERIPH_SRC)/CTB/ctb_reva.c \
$(PERIPH_SRC)/CTB/ctb_common.c \
$(PERIPH_SRC)/FLC/flc_common.c \
$(PERIPH_SRC)/FLC/flc_me18.c \
$(PERIPH_SRC)/FLC/flc_reva.c \
$(PERIPH_SRC)/GPIO/gpio_common.c \
$(PERIPH_SRC)/GPIO/gpio_me18.c \
$(PERIPH_SRC)/GPIO/gpio_reva.c \
$(PERIPH_SRC)/ICC/icc_me18.c \
$(PERIPH_SRC)/ICC/icc_reva.c \
$(PERIPH_SRC)/UART/uart_common.c \
$(PERIPH_SRC)/UART/uart_me18.c \
$(PERIPH_SRC)/UART/uart_revb.c \
INC += \
$(TOP)/$(BOARD_PATH) \
$(TOP)/$(MAX32_CMSIS)/Include \
$(TOP)/$(MAX32_CMSIS)/Device/Maxim/MAX32690/Include \
$(TOP)/$(MAX32_PERIPH)/Include/MAX32690 \
$(PERIPH_SRC)/SYS \
$(PERIPH_SRC)/GPIO \
$(PERIPH_SRC)/CTB \
$(PERIPH_SRC)/ICC \
$(PERIPH_SRC)/FLC \
$(PERIPH_SRC)/UART

28
hw/bsp/max78002/README.md
View File

@@ -1,28 +0,0 @@
# Analog Devices MAX78002
This BSP is for working with the Analog Devices
[MAX78002](https://www.analog.com/en/products/max78002.html) AI microcontroller.
The following boards are supported:
* [MAX78002EVKIT](https://www.analog.com/en/resources/evaluation-hardware-and-software/evaluation-boards-kits/max78002evkit.html)
This part family leverages the Maxim Microcontrollers SDK (MSDK) for the device
interfaces and hardware abstraction layers. This source code package is fetched
as part of the get-deps script.
The microcontroller utilizes the standard GNU ARM toolchain. If this toolchain
is not already available on your build machine, it can be installed by using the
bundled MSDK installation. Details on downloading and installing can be found
in the [User's Guide](https://analogdevicesinc.github.io/msdk//USERGUIDE/).
## Flashing
The default flashing behavior in this BSP is to utilize JLink. This can be done
by running the `flash` or `flash-jlink` rule for Makefiles, or the
`<target>-jlink` target for CMake.
The Evaluation Kit is shipped with a CMSIS-DAP compatible debug probe. However,
at the time of writing, the necessary flashing algorithms for OpenOCD have not
yet been incorporated into the OpenOCD master branch. To utilize the provided
debug probes, please install the bundled MSDK package which includes the
appropriate OpenOCD modifications. To leverage this OpenOCD instance, run the
`flash-msdk` Makefile rule, or `<target>-msdk` CMake target.

1
hw/bsp/max78002/boards/max78002evkit/board.cmake
View File

@@ -1 +0,0 @@
# Nothing to be done at the board level

1
hw/bsp/max78002/boards/max78002evkit/board.mk
View File

@@ -1 +0,0 @@
# No specific build requirements for the board.

173
hw/bsp/max78002/family.c
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@@ -1,173 +0,0 @@
/*
* The MIT License (MIT)
*
* Copyright (c) 2024 Brent Kowal (Analog Devices, Inc)
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*
* This file is part of the TinyUSB stack.
*/
/* metadata:
manufacturer: Analog Devices
*/
#ifdef __GNUC__
#pragma GCC diagnostic push
#pragma GCC diagnostic ignored "-Wstrict-prototypes" // _mxc_crit_get_state()
#endif
#include "gpio.h"
#include "mxc_sys.h"
#include "mcr_regs.h"
#include "mxc_device.h"
#include "uart.h"
#ifdef __GNUC__
#pragma GCC diagnostic pop
#endif
#include "board.h"
#include "bsp/board_api.h"
//--------------------------------------------------------------------+
// Forward USB interrupt events to TinyUSB IRQ Handler
//--------------------------------------------------------------------+
void USB_IRQHandler(void) {
tud_int_handler(0);
}
//--------------------------------------------------------------------+
// MACRO TYPEDEF CONSTANT ENUM
//--------------------------------------------------------------------+
mxc_uart_regs_t *ConsoleUart = MXC_UART_GET_UART(UART_NUM);
void board_init(void) {
#if CFG_TUSB_OS == OPT_OS_NONE
// 1ms tick timer
SysTick_Config(SystemCoreClock / 1000);
#elif CFG_TUSB_OS == OPT_OS_FREERTOS
// If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
NVIC_SetPriority(USB_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
#endif
mxc_gpio_cfg_t gpioConfig;
// LED
gpioConfig.drvstr = MXC_GPIO_DRVSTR_0;
gpioConfig.func = MXC_GPIO_FUNC_OUT;
gpioConfig.mask = LED_PIN;
gpioConfig.pad = MXC_GPIO_PAD_NONE;
gpioConfig.port = LED_PORT;
gpioConfig.vssel = LED_VDDIO;
MXC_GPIO_Config(&gpioConfig);
board_led_write(false);
// Button
gpioConfig.drvstr = MXC_GPIO_DRVSTR_0;
gpioConfig.func = MXC_GPIO_FUNC_IN;
gpioConfig.mask = BUTTON_PIN;
gpioConfig.pad = BUTTON_PULL;
gpioConfig.port = BUTTON_PORT;
gpioConfig.vssel = MXC_GPIO_VSSEL_VDDIO;
MXC_GPIO_Config(&gpioConfig);
// UART
MXC_UART_Init(ConsoleUart, CFG_BOARD_UART_BAUDRATE, MXC_UART_IBRO_CLK);
UART_PORT->vssel |= UART_VDDIO_BITS; //Set necessary bits to 3.3V
//USB
MXC_MCR->ldoctrl |= MXC_F_MCR_LDOCTRL_0P9EN;
MXC_SYS_ClockEnable(MXC_SYS_PERIPH_CLOCK_USB);
}
//--------------------------------------------------------------------+
// Board porting API
//--------------------------------------------------------------------+
void board_led_write(bool state) {
#if LED_STATE_ON
state = !state;
#endif
if (state) {
MXC_GPIO_OutClr(LED_PORT, LED_PIN);
} else {
MXC_GPIO_OutSet(LED_PORT, LED_PIN);
}
}
uint32_t board_button_read(void) {
uint32_t state = MXC_GPIO_InGet(BUTTON_PORT, BUTTON_PIN) ? 1 : 0;
return BUTTON_STATE_ACTIVE == state;
}
size_t board_get_unique_id(uint8_t id[], size_t max_len) {
uint8_t hw_id[MXC_SYS_USN_CHECKSUM_LEN];//USN Buffer
/* All other 2nd parameter is optional checksum buffer */
MXC_SYS_GetUSN(hw_id, NULL);
size_t act_len = TU_MIN(max_len, MXC_SYS_USN_LEN);
memcpy(id, hw_id, act_len);
return act_len;
}
int board_uart_read(uint8_t *buf, int len) {
int uart_val;
int act_len = 0;
while (act_len < len) {
if ((uart_val = MXC_UART_ReadCharacterRaw(ConsoleUart)) == E_UNDERFLOW) {
break;
} else {
*buf++ = (uint8_t) uart_val;
act_len++;
}
}
return act_len;
}
int board_uart_write(void const *buf, int len) {
int act_len = 0;
const uint8_t *ch_ptr = (const uint8_t *) buf;
while (act_len < len) {
MXC_UART_WriteCharacter(ConsoleUart, *ch_ptr++);
act_len++;
}
return len;
}
#if CFG_TUSB_OS == OPT_OS_NONE
volatile uint32_t system_ticks = 0;
void SysTick_Handler(void) {
system_ticks++;
}
uint32_t board_millis(void) {
return system_ticks;
}
#endif
void HardFault_Handler(void) {
__asm("BKPT #0\n");
}
// Required by __libc_init_array in startup code if we are compiling using
// -nostdlib/-nostartfiles.
void _init(void) {
}

166
hw/bsp/max78002/family.cmake
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@@ -1,166 +0,0 @@
include_guard()
set(MAX32_PERIPH ${TOP}/hw/mcu/analog/max32/Libraries/PeriphDrivers)
set(MAX32_CMSIS ${TOP}/hw/mcu/analog/max32/Libraries/CMSIS)
set(CMSIS_5 ${TOP}/lib/CMSIS_5)
# include board specific
include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
# Get the linker file from current location (family)
set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/max78002.ld)
set(LD_FILE_Clang ${LD_FILE_GNU})
# toolchain set up
set(CMAKE_SYSTEM_CPU cortex-m4 CACHE INTERNAL "System Processor")
set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
set(JLINK_DEVICE max78000)
set(FAMILY_MCUS MAX78002 CACHE INTERNAL "")
function(update_board TARGET)
target_compile_definitions(${TARGET} PUBLIC
TARGET=MAX78002
TARGET_REV=0x4131
MXC_ASSERT_ENABLE
MAX78002
IAR_PRAGMAS=0
CFG_TUSB_MCU=OPT_MCU_MAX78002
BOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED
)
endfunction()
#------------------------------------
# BOARD_TARGET
#------------------------------------
# only need to be built ONCE for all examples
function(add_board_target BOARD_TARGET)
if (TARGET ${BOARD_TARGET})
return()
endif ()
# Startup & Linker script
set(STARTUP_FILE_GNU ${MAX32_CMSIS}/Device/Maxim/MAX78002/Source/GCC/startup_max78002.S)
set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
set(PERIPH_SRC ${MAX32_PERIPH}/Source)
add_library(${BOARD_TARGET} STATIC
${MAX32_CMSIS}/Device/Maxim/MAX78002/Source/heap.c
${MAX32_CMSIS}/Device/Maxim/MAX78002/Source/system_max78002.c
${PERIPH_SRC}/SYS/mxc_assert.c
${PERIPH_SRC}/SYS/mxc_delay.c
${PERIPH_SRC}/SYS/mxc_lock.c
${PERIPH_SRC}/SYS/nvic_table.c
${PERIPH_SRC}/SYS/pins_ai87.c
${PERIPH_SRC}/SYS/sys_ai87.c
${PERIPH_SRC}/AES/aes_ai87.c
${PERIPH_SRC}/AES/aes_revb.c
${PERIPH_SRC}/FLC/flc_common.c
${PERIPH_SRC}/FLC/flc_ai87.c
${PERIPH_SRC}/FLC/flc_reva.c
${PERIPH_SRC}/GPIO/gpio_common.c
${PERIPH_SRC}/GPIO/gpio_ai87.c
${PERIPH_SRC}/GPIO/gpio_reva.c
${PERIPH_SRC}/ICC/icc_ai87.c
${PERIPH_SRC}/ICC/icc_reva.c
${PERIPH_SRC}/TRNG/trng_ai87.c
${PERIPH_SRC}/TRNG/trng_revb.c
${PERIPH_SRC}/UART/uart_common.c
${PERIPH_SRC}/UART/uart_ai87.c
${PERIPH_SRC}/UART/uart_revb.c
${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
)
target_include_directories(${BOARD_TARGET} PUBLIC
${CMAKE_CURRENT_FUNCTION_LIST_DIR}
${MAX32_CMSIS}/Include
${MAX32_CMSIS}/Device/Maxim/MAX78002/Include
${MAX32_PERIPH}/Include/MAX78002
${PERIPH_SRC}/SYS
${PERIPH_SRC}/GPIO
${PERIPH_SRC}/AES
${PERIPH_SRC}/TRNG
${PERIPH_SRC}/ICC
${PERIPH_SRC}/FLC
${PERIPH_SRC}/UART
)
target_compile_options(${BOARD_TARGET} PRIVATE
-Wno-error=strict-prototypes
-Wno-error=redundant-decls
)
update_board(${BOARD_TARGET})
if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
target_link_options(${BOARD_TARGET} PUBLIC
"LINKER:--script=${LD_FILE_GNU}"
-nostartfiles
--specs=nosys.specs --specs=nano.specs
)
elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
target_link_options(${BOARD_TARGET} PUBLIC
"LINKER:--script=${LD_FILE_Clang}"
)
endif ()
endfunction()
#------------------------------------
# Functions
#------------------------------------
function(family_configure_example TARGET RTOS)
family_configure_common(${TARGET} ${RTOS})
# Board target
add_board_target(board_${BOARD})
#---------- Port Specific ----------
# These files are built for each example since it depends on example's tusb_config.h
target_sources(${TARGET} PUBLIC
# BSP
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
)
target_include_directories(${TARGET} PUBLIC
# family, hw, board
${CMAKE_CURRENT_FUNCTION_LIST_DIR}
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
)
target_compile_options(${TARGET} PRIVATE
-Wno-error=strict-prototypes
-Wno-error=redundant-decls
)
# Add TinyUSB target and port source
family_add_tinyusb(${TARGET} OPT_MCU_MAX78002)
target_sources(${TARGET} PUBLIC
${TOP}/src/portable/mentor/musb/dcd_musb.c
)
target_link_libraries(${TARGET} PUBLIC board_${BOARD})
target_compile_options(${TARGET} PRIVATE
-Wno-error=strict-prototypes
-Wno-error=redundant-decls
)
# Flashing
family_add_bin_hex(${TARGET})
family_flash_jlink(${TARGET})
family_flash_msdk(${TARGET})
endfunction()
# Add flash msdk target
function(family_flash_msdk TARGET)
set(MAXIM_PATH "$ENV{MAXIM_PATH}")
add_custom_target(${TARGET}-msdk
DEPENDS ${TARGET}
COMMAND ${MAXIM_PATH}/Tools/OpenOCD/openocd -s ${MAXIM_PATH}/Tools/OpenOCD/scripts
-f interface/cmsis-dap.cfg -f target/max78002.cfg
-c "program $<TARGET_FILE:${TARGET}> verify; init; reset; exit"
VERBATIM
)
endfunction()

99
hw/bsp/max78002/family.mk
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@@ -1,99 +0,0 @@
DEPS_SUBMODULES += lib/CMSIS_5 hw/mcu/analog/max32
# Important locations in the hw support for MCU
MAX32_CMSIS = hw/mcu/analog/max32/Libraries/CMSIS
MAX32_PERIPH = hw/mcu/analog/max32/Libraries/PeriphDrivers
# Add any board specific make rules
include $(TOP)/$(BOARD_PATH)/board.mk
CPU_CORE ?= cortex-m4
PORT ?= 0
# GCC
SRC_S_GCC += $(MAX32_CMSIS)/Device/Maxim/MAX78002/Source/GCC/startup_max78002.S
LD_FILE = $(FAMILY_PATH)/max78002.ld
# --------------
# Compiler Flags
# --------------
# Flags for the MAX78002 SDK
CFLAGS += -DTARGET=MAX78002 \
-DTARGET_REV=0x4131 \
-DMXC_ASSERT_ENABLE \
-DMAX78002 \
-DIAR_PRAGMAS=0
# Flags for TUSB features
CFLAGS += \
-DCFG_TUSB_MCU=OPT_MCU_MAX78002 \
-DBOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED
# mcu driver cause following warnings
CFLAGS += -Wno-error=redundant-decls \
-Wno-error=strict-prototypes \
-Wno-error=unused-parameter \
-Wno-error=enum-conversion \
-Wno-error=sign-compare \
-Wno-error=cast-qual
LDFLAGS_GCC += -nostartfiles --specs=nosys.specs --specs=nano.specs
# For flash-jlink target
JLINK_DEVICE = max78000
# flash target using Jlink by default
flash: flash-jlink
# Optional flash option when running within an installed MSDK to use OpenOCD
# Mainline OpenOCD does not yet have the MAX32's flash algorithm integrated.
# If the MSDK is installed, flash-msdk can be run to utilize the the modified
# openocd with the algorithms
MAXIM_PATH := $(subst \,/,$(MAXIM_PATH))
flash-msdk: $(BUILD)/$(PROJECT).elf
$(MAXIM_PATH)/Tools/OpenOCD/openocd -s $(MAXIM_PATH)/Tools/OpenOCD/scripts \
-f interface/cmsis-dap.cfg -f target/max78002.cfg \
-c "program $(BUILD)/$(PROJECT).elf verify; init; reset; exit"
# -----------------
# Sources & Include
# -----------------
PERIPH_SRC = $(TOP)/$(MAX32_PERIPH)/Source
SRC_C += \
src/portable/mentor/musb/dcd_musb.c \
$(MAX32_CMSIS)/Device/Maxim/MAX78002/Source/heap.c \
$(MAX32_CMSIS)/Device/Maxim/MAX78002/Source/system_max78002.c \
$(PERIPH_SRC)/SYS/mxc_assert.c \
$(PERIPH_SRC)/SYS/mxc_delay.c \
$(PERIPH_SRC)/SYS/mxc_lock.c \
$(PERIPH_SRC)/SYS/nvic_table.c \
$(PERIPH_SRC)/SYS/pins_ai87.c \
$(PERIPH_SRC)/SYS/sys_ai87.c \
$(PERIPH_SRC)/AES/aes_ai87.c \
$(PERIPH_SRC)/AES/aes_revb.c \
$(PERIPH_SRC)/FLC/flc_common.c \
$(PERIPH_SRC)/FLC/flc_ai87.c \
$(PERIPH_SRC)/FLC/flc_reva.c \
$(PERIPH_SRC)/GPIO/gpio_common.c \
$(PERIPH_SRC)/GPIO/gpio_ai87.c \
$(PERIPH_SRC)/GPIO/gpio_reva.c \
$(PERIPH_SRC)/ICC/icc_ai87.c \
$(PERIPH_SRC)/ICC/icc_reva.c \
$(PERIPH_SRC)/TRNG/trng_ai87.c \
$(PERIPH_SRC)/TRNG/trng_revb.c \
$(PERIPH_SRC)/UART/uart_common.c \
$(PERIPH_SRC)/UART/uart_ai87.c \
$(PERIPH_SRC)/UART/uart_revb.c \
INC += \
$(TOP)/$(BOARD_PATH) \
$(TOP)/$(MAX32_CMSIS)/Include \
$(TOP)/$(MAX32_CMSIS)/Device/Maxim/MAX78002/Include \
$(TOP)/$(MAX32_PERIPH)/Include/MAX78002 \
$(PERIPH_SRC)/SYS \
$(PERIPH_SRC)/GPIO \
$(PERIPH_SRC)/AES \
$(PERIPH_SRC)/ICC \
$(PERIPH_SRC)/FLC \
$(PERIPH_SRC)/TRNG \
$(PERIPH_SRC)/UART

0
hw/bsp/max32650/FreeRTOSConfig/FreeRTOSConfig.h → hw/bsp/maxim/FreeRTOSConfig/FreeRTOSConfig.h
View File

43
hw/bsp/maxim/README.md Normal file
View File

@@ -0,0 +1,43 @@
# Analog Devices MAXIM
This BSP is for working with the Analog microcontrollers
- [MAX32650](https://www.analog.com/en/products/max32650.html),
- [MAX32651](https://www.analog.com/en/products/max32651.html)
- [MAX32652](https://www.analog.com/en/products/max32652.html)
- [MAX32665](https://www.analog.com/en/products/max32665.html)
- [MAX32666](https://www.analog.com/en/products/max32666.html)
- [MAX32690](https://www.analog.com/en/products/max32690.html)
- [MAX78002](https://www.analog.com/en/products/max78002.html) AI microcontroller.
The following boards are supported:
* [MAX32650EVKIT](https://www.analog.com/en/resources/evaluation-hardware-and-software/evaluation-boards-kits/max32650-evkit.html)
* [MAX32650FTHR](https://www.analog.com/en/resources/evaluation-hardware-and-software/evaluation-boards-kits/max32650fthr.html)
* [MAX32651EVKIT](https://www.analog.com/en/resources/evaluation-hardware-and-software/evaluation-boards-kits/max32651-evkit.html) (Secure Bootloader)
* [MAX32666EVKIT](https://www.analog.com/en/resources/evaluation-hardware-and-software/evaluation-boards-kits/max32666evkit.html)
* [MAX32666FTHR](https://www.analog.com/en/resources/evaluation-hardware-and-software/evaluation-boards-kits/max32666fthr.html)
* [MAX32690EVKIT](https://www.analog.com/en/resources/evaluation-hardware-and-software/evaluation-boards-kits/max32690evkit.html)
* [AD-APARD32690-SL](https://www.analog.com/en/resources/evaluation-hardware-and-software/evaluation-boards-kits/ad-apard32690-sl.html)
* [MAX78002EVKIT](https://www.analog.com/en/resources/evaluation-hardware-and-software/evaluation-boards-kits/max78002evkit.html)
This part family leverages the Maxim Microcontrollers SDK (MSDK) for the device
interfaces and hardware abstraction layers. This source code package is fetched
as part of the get-deps script.
The microcontroller utilizes the standard GNU ARM toolchain. If this toolchain
is not already available on your build machine, it can be installed by using the
bundled MSDK installation. Details on downloading and installing can be found
in the [User's Guide](https://analogdevicesinc.github.io/msdk//USERGUIDE/).
## Flashing
The default flashing behavior in this BSP is to utilize JLink. This can be done
by running the `flash` or `flash-jlink` rule for Makefiles, or the
`<target>-jlink` target for CMake.
Most the Evaluation Kit and boards are shipped with a CMSIS-DAP
compatible debug probe. However, at the time of writing, the necessary flashing
algorithms for OpenOCD have not yet been incorporated into the OpenOCD master
branch. To utilize the provided debug probes, please install the bundled MSDK
package which includes the appropriate OpenOCD modifications. To leverage this
OpenOCD instance, run the `flash-msdk` Makefile rule, or `<target>-openocd` CMake
target.

4
hw/bsp/maxim/boards/apard32690/board.cmake Normal file
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@@ -0,0 +1,4 @@
set(MAX_DEVICE max32690)
function(update_board TARGET)
endfunction()

3
hw/bsp/max32690/boards/apard32690/board.h → hw/bsp/maxim/boards/apard32690/board.h
View File

@@ -32,8 +32,7 @@
#ifndef BOARD_H_
#define BOARD_H_
#include "gpio.h"
#include "mxc_sys.h"
#include "max32690.h"
#ifdef __cplusplus
extern "C" {

1
hw/bsp/maxim/boards/apard32690/board.mk Normal file
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@@ -0,0 +1 @@
MAX_DEVICE = max32690

8
hw/bsp/maxim/boards/max32650evkit/board.cmake Normal file
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@@ -0,0 +1,8 @@
set(MAX_DEVICE max32650)
function(update_board TARGET)
endfunction()
function(prepare_image TARGET_IN)
#No signing required
endfunction()

5
hw/bsp/max32650/boards/max32650evkit/board.h → hw/bsp/maxim/boards/max32650evkit/board.h
View File

@@ -26,14 +26,13 @@
/* metadata:
name: MAX32650 EVKIT
url: https://www.analog.com/en/resources/evaluation-hardware-and-software/evaluation-boards-kits/max32650-evkit.html#eb-overview
url: https://www.analog.com/en/resources/evaluation-hardware-and-software/evaluation-boards-kits/max32650-evkit.html
*/
#ifndef BOARD_H_
#define BOARD_H_
#include "gpio.h"
#include "mxc_sys.h"
#include "max32650.h"
#ifdef __cplusplus
extern "C" {

1
hw/bsp/maxim/boards/max32650evkit/board.mk Normal file
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@@ -0,0 +1 @@
MAX_DEVICE = max32650

8
hw/bsp/maxim/boards/max32650fthr/board.cmake Normal file
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@@ -0,0 +1,8 @@
set(MAX_DEVICE max32650)
function(update_board TARGET)
endfunction()
function(prepare_image TARGET_IN)
#No signing required
endfunction()

3
hw/bsp/max32650/boards/max32650fthr/board.h → hw/bsp/maxim/boards/max32650fthr/board.h
View File

@@ -32,8 +32,7 @@
#ifndef BOARD_H_
#define BOARD_H_
#include "gpio.h"
#include "mxc_sys.h"
#include "max32650.h"
#ifdef __cplusplus
extern "C" {

1
hw/bsp/maxim/boards/max32650fthr/board.mk Normal file
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@@ -0,0 +1 @@
MAX_DEVICE = max32650

15
hw/bsp/max32650/boards/max32651evkit/board.cmake → hw/bsp/maxim/boards/max32651evkit/board.cmake
View File

@@ -1,22 +1,23 @@
# Use the secure linker file
set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/max32651.ld)
set(MAX_DEVICE max32650)
function(update_board_extras TARGET)
# Use the secure linker file
set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/../../linker/max32651.ld)
function(update_board TARGET)
# for the signed target, need to add the __SLA_FWK__ define
target_compile_definitions(${TARGET} PUBLIC
__SLA_FWK__
)
endfunction()
function(prepare_image TARGET_IN)
#For the signed target, set up a POST_BUILD command to sign the elf file once
#created
function(sign_image TARGET_IN)
#For the signed target, set up a POST_BUILD command to sign the elf file once created
if((WIN32) OR (MINGW) OR (MSYS))
set(SIGN_EXE "sign_app.exe")
else()
set(SIGN_EXE "sign_app")
endif()
set(MCU_PATH "${TOP}/hw/mcu/analog/max32/")
set(MCU_PATH "${TOP}/hw/mcu/analog/msdk/")
# Custom POST_BUILD command
add_custom_command(

3
hw/bsp/max32650/boards/max32651evkit/board.h → hw/bsp/maxim/boards/max32651evkit/board.h
View File

@@ -32,8 +32,7 @@
#ifndef BOARD_H_
#define BOARD_H_
#include "gpio.h"
#include "mxc_sys.h"
#include "max32650.h"
#ifdef __cplusplus
extern "C" {

4
hw/bsp/max32650/boards/max32651evkit/board.mk → hw/bsp/maxim/boards/max32651evkit/board.mk
View File

@@ -1,5 +1,7 @@
MAX_DEVICE = max32650
# Use the secure linker file
LD_FILE = $(BOARD_PATH)/max32651.ld
LD_FILE = $(FAMILY_PATH)/linker/max32651.ld
# Let the family script know the build needs to be signed
SIGNED_BUILD := 1

4
hw/bsp/maxim/boards/max32666evkit/board.cmake Normal file
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@@ -0,0 +1,4 @@
set(MAX_DEVICE max32665)
function(update_board TARGET)
endfunction()

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