Add tuh_rhport_is_active() and tuh_rhport_reset_bus()
- also improve ehci bus reset - seperate bus reset delay and contact debouncing delay in enumeration
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@@ -39,24 +39,27 @@
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#include "ci_hs_type.h"
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#if CFG_TUSB_MCU == OPT_MCU_MIMXRT1XXX
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#include "ci_hs_imxrt.h"
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bool hcd_dcache_clean(void const* addr, uint32_t data_size) {
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return imxrt_dcache_clean(addr, data_size);
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}
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#include "ci_hs_imxrt.h"
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bool hcd_dcache_invalidate(void const* addr, uint32_t data_size) {
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return imxrt_dcache_invalidate(addr, data_size);
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}
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bool hcd_dcache_clean(void const* addr, uint32_t data_size) {
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return imxrt_dcache_clean(addr, data_size);
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}
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bool hcd_dcache_clean_invalidate(void const* addr, uint32_t data_size) {
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return imxrt_dcache_clean_invalidate(addr, data_size);
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}
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bool hcd_dcache_invalidate(void const* addr, uint32_t data_size) {
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return imxrt_dcache_invalidate(addr, data_size);
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}
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bool hcd_dcache_clean_invalidate(void const* addr, uint32_t data_size) {
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return imxrt_dcache_clean_invalidate(addr, data_size);
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}
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#elif TU_CHECK_MCU(OPT_MCU_LPC18XX, OPT_MCU_LPC43XX)
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#include "ci_hs_lpc18_43.h"
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#include "ci_hs_lpc18_43.h"
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#else
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#error "Unsupported MCUs"
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#error "Unsupported MCUs"
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#endif
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//--------------------------------------------------------------------+
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@@ -67,25 +70,25 @@
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// Controller API
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//--------------------------------------------------------------------+
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bool hcd_init(uint8_t rhport)
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{
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ci_hs_regs_t* hcd_reg = CI_HS_REG(rhport);
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bool hcd_init(uint8_t rhport) {
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ci_hs_regs_t *hcd_reg = CI_HS_REG(rhport);
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// Reset controller
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hcd_reg->USBCMD |= USBCMD_RESET;
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while( hcd_reg->USBCMD & USBCMD_RESET ) {}
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while ( hcd_reg->USBCMD & USBCMD_RESET ) {}
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// Set mode to device, must be set immediately after reset
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#if CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_LPC43XX
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// LPC18XX/43XX need to set VBUS Power Select to HIGH
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// RHPORT1 is fullspeed only (need external PHY for Highspeed)
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hcd_reg->USBMODE = USBMODE_CM_HOST | USBMODE_VBUS_POWER_SELECT;
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if (rhport == 1) hcd_reg->PORTSC1 |= PORTSC1_FORCE_FULL_SPEED;
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if ( rhport == 1 ) hcd_reg->PORTSC1 |= PORTSC1_FORCE_FULL_SPEED;
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#else
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hcd_reg->USBMODE = USBMODE_CM_HOST;
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#endif
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// FIXME force full speed, still have issue with Highspeed enumeration
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// probably due to physical connection bouncing when plug/unplug
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// 1. Have issue when plug/unplug devices, maybe the port is not reset properly
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// 2. Also does not seems to detect disconnection
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hcd_reg->PORTSC1 |= PORTSC1_FORCE_FULL_SPEED;
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@@ -93,13 +96,11 @@ bool hcd_init(uint8_t rhport)
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return ehci_init(rhport, (uint32_t) &hcd_reg->CAPLENGTH, (uint32_t) &hcd_reg->USBCMD);
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}
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void hcd_int_enable(uint8_t rhport)
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{
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void hcd_int_enable(uint8_t rhport) {
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CI_HCD_INT_ENABLE(rhport);
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}
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void hcd_int_disable(uint8_t rhport)
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{
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void hcd_int_disable(uint8_t rhport) {
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CI_HCD_INT_DISABLE(rhport);
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}
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@@ -188,6 +188,11 @@ void hcd_port_reset(uint8_t rhport)
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ehci_registers_t* regs = ehci_data.regs;
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// skip if already in reset
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if (regs->portsc_bm.port_reset) {
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return;
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}
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// mask out Write-1-to-Clear bits
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uint32_t portsc = regs->portsc & ~EHCI_PORTSC_MASK_W1C;
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@@ -202,16 +207,18 @@ void hcd_port_reset(uint8_t rhport)
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void hcd_port_reset_end(uint8_t rhport)
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{
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(void) rhport;
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#if 0 // TODO check if this is necessary
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ehci_registers_t* regs = ehci_data.regs;
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// skip if reset is already complete
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if (!regs->portsc_bm.port_reset) {
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return;
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}
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// mask out all change bits since they are Write 1 to clear
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uint32_t portsc = regs->portsc & ~EHCI_PORTSC_MASK_CHANGE_ALL;
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portsc &= ~(EHCI_PORTSC_MASK_PORT_RESET);
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uint32_t portsc = regs->portsc & ~EHCI_PORTSC_MASK_W1C;
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portsc &= ~EHCI_PORTSC_MASK_PORT_RESET;
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regs->portsc = portsc;
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#endif
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}
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bool hcd_port_connect_status(uint8_t rhport)
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@@ -426,6 +433,11 @@ bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet
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hcd_dcache_clean(setup_packet, 8);
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// Control endpoint never be stalled. Skip reset Data Toggle since it is fixed per stage
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if (qhd->qtd_overlay.halted) {
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qhd->qtd_overlay.halted = false;
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}
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// attach TD to QHD -> start transferring
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qhd_attach_qtd(qhd, td);
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@@ -662,7 +674,7 @@ void hcd_int_handler(uint8_t rhport)
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if (int_status & EHCI_INT_MASK_PORT_CHANGE) {
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// Including: Force port resume, over-current change, enable/disable change and connect status change.
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uint32_t const port_status = regs->portsc & EHCI_PORTSC_MASK_W1C;
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print_portsc(regs);
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// print_portsc(regs);
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if (regs->portsc_bm.connect_status_change) {
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port_connect_status_change_isr(rhport);
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