diff --git a/demos/host/host_freertos/.cproject b/demos/host/host_freertos/.cproject
index 18a9818fe..7f1d3643d 100644
--- a/demos/host/host_freertos/.cproject
+++ b/demos/host/host_freertos/.cproject
@@ -30,7 +30,7 @@
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@@ -402,86 +2089,73 @@
<?xml version="1.0" encoding="UTF-8"?>
<TargetConfig>
-<Properties property_0="" property_2="LPC18x7_43x7_2x512_BootA.cfx" property_3="NXP" property_4="LPC4357" property_count="5" version="1"/>
-<infoList vendor="NXP"><info chip="LPC4357" flash_driver="LPC18x7_43x7_2x512_BootA.cfx" match_id="0x0" name="LPC4357" resetscript="LPC18LPC43InternalFLASHBootResetscript.scp" stub="crt_emu_lpc18_43_nxp"><chip><name>LPC4357</name>
-<family>LPC43xx</family>
+<Properties property_0="" property_3="NXP" property_4="LPC1769" property_count="5" version="1"/>
+<infoList vendor="NXP"><info chip="LPC1769" match_id="0x26113F37" name="LPC1769" package="lpc17_lqfp100.xml"><chip><name>LPC1769</name>
+<family>LPC17xx</family>
<vendor>NXP (formerly Philips)</vendor>
<reset board="None" core="Real" sys="Real"/>
<clock changeable="TRUE" freq="20MHz" is_accurate="TRUE"/>
<memory can_program="true" id="Flash" is_ro="true" type="Flash"/>
<memory id="RAM" type="RAM"/>
<memory id="Periph" is_volatile="true" type="Peripheral"/>
-<memoryInstance derived_from="Flash" id="MFlashA512" location="0x1a000000" size="0x80000"/>
-<memoryInstance derived_from="Flash" id="MFlashB512" location="0x1b000000" size="0x80000"/>
+<memoryInstance derived_from="Flash" id="MFlash512" location="0x0" size="0x80000"/>
<memoryInstance derived_from="RAM" id="RamLoc32" location="0x10000000" size="0x8000"/>
-<memoryInstance derived_from="RAM" id="RamLoc40" location="0x10080000" size="0xa000"/>
-<memoryInstance derived_from="RAM" id="RamAHB32" location="0x20000000" size="0x8000"/>
-<memoryInstance derived_from="RAM" id="RamAHB16" location="0x20008000" size="0x4000"/>
-<memoryInstance derived_from="RAM" id="RamAHB_ETB16" location="0x2000c000" size="0x4000"/>
-<prog_flash blocksz="0x2000" location="0x1a000000" maxprgbuff="0x400" progwithcode="TRUE" size="0x10000"/>
-<prog_flash blocksz="0x10000" location="0x1a010000" maxprgbuff="0x400" progwithcode="TRUE" size="0x70000"/>
-<prog_flash blocksz="0x2000" location="0x1b000000" maxprgbuff="0x400" progwithcode="TRUE" size="0x10000"/>
-<prog_flash blocksz="0x10000" location="0x1b010000" maxprgbuff="0x400" progwithcode="TRUE" size="0x70000"/>
-<peripheralInstance derived_from="V7M_MPU" determined="infoFile" id="MPU" location="0xe000ed90"/>
-<peripheralInstance derived_from="V7M_NVIC" determined="infoFile" id="NVIC" location="0xe000e000"/>
-<peripheralInstance derived_from="V7M_DCR" determined="infoFile" id="DCR" location="0xe000edf0"/>
-<peripheralInstance derived_from="V7M_ITM" determined="infoFile" id="ITM" location="0xe0000000"/>
-<peripheralInstance derived_from="SCT" determined="infoFile" id="SCT" location="0x40000000"/>
-<peripheralInstance derived_from="GPDMA" determined="infoFile" id="GPDMA" location="0x40002000"/>
-<peripheralInstance derived_from="SPIFI" determined="infoFile" id="SPIFI" location="0x40003000"/>
-<peripheralInstance derived_from="SDMMC" determined="infoFile" id="SDMMC" location="0x40004000"/>
-<peripheralInstance derived_from="EMC" determined="infoFile" id="EMC" location="0x40005000"/>
-<peripheralInstance derived_from="USB0" determined="infoFile" id="USB0" location="0x40006000"/>
-<peripheralInstance derived_from="USB1" determined="infoFile" id="USB1" location="0x40007000"/>
-<peripheralInstance derived_from="LCD" determined="infoFile" id="LCD" location="0x40008000"/>
-<peripheralInstance derived_from="EEPROM" determined="infoFile" id="EEPROM" location="0x4000e000"/>
-<peripheralInstance derived_from="ETHERNET" determined="infoFile" id="ETHERNET" location="0x40010000"/>
-<peripheralInstance derived_from="ATIMER" determined="infoFile" id="ATIMER" location="0x40040000"/>
-<peripheralInstance derived_from="REGFILE" determined="infoFile" id="REGFILE" location="0x40041000"/>
-<peripheralInstance derived_from="PMC" determined="infoFile" id="PMC" location="0x40042000"/>
-<peripheralInstance derived_from="CREG" determined="infoFile" id="CREG" location="0x40043000"/>
-<peripheralInstance derived_from="EVENTROUTER" determined="infoFile" id="EVENTROUTER" location="0x40044000"/>
-<peripheralInstance derived_from="RTC" determined="infoFile" id="RTC" location="0x40046000"/>
-<peripheralInstance derived_from="CGU" determined="infoFile" id="CGU" location="0x40050000"/>
-<peripheralInstance derived_from="CCU1" determined="infoFile" id="CCU1" location="0x40051000"/>
-<peripheralInstance derived_from="CCU2" determined="infoFile" id="CCU2" location="0x40052000"/>
-<peripheralInstance derived_from="RGU" determined="infoFile" id="RGU" location="0x40053000"/>
-<peripheralInstance derived_from="WWDT" determined="infoFile" id="WWDT" location="0x40080000"/>
-<peripheralInstance derived_from="USART0" determined="infoFile" id="USART0" location="0x40081000"/>
-<peripheralInstance derived_from="USART2" determined="infoFile" id="USART2" location="0x400c1000"/>
-<peripheralInstance derived_from="USART3" determined="infoFile" id="USART3" location="0x400c2000"/>
-<peripheralInstance derived_from="UART1" determined="infoFile" id="UART1" location="0x40082000"/>
-<peripheralInstance derived_from="SSP0" determined="infoFile" id="SSP0" location="0x40083000"/>
-<peripheralInstance derived_from="SSP1" determined="infoFile" id="SSP1" location="0x400c5000"/>
-<peripheralInstance derived_from="TIMER0" determined="infoFile" id="TIMER0" location="0x40084000"/>
-<peripheralInstance derived_from="TIMER1" determined="infoFile" id="TIMER1" location="0x40085000"/>
-<peripheralInstance derived_from="TIMER2" determined="infoFile" id="TIMER2" location="0x400c3000"/>
-<peripheralInstance derived_from="TIMER3" determined="infoFile" id="TIMER3" location="0x400c4000"/>
-<peripheralInstance derived_from="SCU" determined="infoFile" id="SCU" location="0x40086000"/>
-<peripheralInstance derived_from="GPIO-PIN-INT" determined="infoFile" id="GPIO-PIN-INT" location="0x40087000"/>
-<peripheralInstance derived_from="GPIO-GROUP-INT0" determined="infoFile" id="GPIO-GROUP-INT0" location="0x40088000"/>
-<peripheralInstance derived_from="GPIO-GROUP-INT1" determined="infoFile" id="GPIO-GROUP-INT1" location="0x40089000"/>
-<peripheralInstance derived_from="MCPWM" determined="infoFile" id="MCPWM" location="0x400a0000"/>
-<peripheralInstance derived_from="I2C0" determined="infoFile" id="I2C0" location="0x400a1000"/>
-<peripheralInstance derived_from="I2C1" determined="infoFile" id="I2C1" location="0x400e0000"/>
-<peripheralInstance derived_from="I2S0" determined="infoFile" id="I2S0" location="0x400a2000"/>
-<peripheralInstance derived_from="I2S1" determined="infoFile" id="I2S1" location="0x400a3000"/>
-<peripheralInstance derived_from="C-CAN1" determined="infoFile" id="C-CAN1" location="0x400a4000"/>
-<peripheralInstance derived_from="RITIMER" determined="infoFile" id="RITIMER" location="0x400c0000"/>
-<peripheralInstance derived_from="QEI" determined="infoFile" id="QEI" location="0x400c6000"/>
-<peripheralInstance derived_from="GIMA" determined="infoFile" id="GIMA" location="0x400c7000"/>
-<peripheralInstance derived_from="DAC" determined="infoFile" id="DAC" location="0x400e1000"/>
-<peripheralInstance derived_from="C-CAN0" determined="infoFile" id="C-CAN0" location="0x400e2000"/>
-<peripheralInstance derived_from="ADC0" determined="infoFile" id="ADC0" location="0x400e3000"/>
-<peripheralInstance derived_from="ADC1" determined="infoFile" id="ADC1" location="0x400e4000"/>
-<peripheralInstance derived_from="GPIO-PORT" determined="infoFile" id="GPIO-PORT" location="0x400f4000"/>
-<peripheralInstance derived_from="SPI" determined="infoFile" id="SPI" location="0x40100000"/>
-<peripheralInstance derived_from="SGPIO" determined="infoFile" id="SGPIO" location="0x40101000"/>
+<memoryInstance derived_from="RAM" id="RamAHB32" location="0x2007c000" size="0x8000"/>
+<prog_flash blocksz="0x1000" location="0" maxprgbuff="0x1000" progwithcode="TRUE" size="0x10000"/>
+<prog_flash blocksz="0x8000" location="0x10000" maxprgbuff="0x1000" progwithcode="TRUE" size="0x70000"/>
+<peripheralInstance derived_from="LPC17_NVIC" id="NVIC" location="0xE000E000"/>
+<peripheralInstance derived_from="TIMER" enable="SYSCTL.PCONP.PCTIM0&0x1" id="TIMER0" location="0x40004000"/>
+<peripheralInstance derived_from="TIMER" enable="SYSCTL.PCONP.PCTIM1&0x1" id="TIMER1" location="0x40008000"/>
+<peripheralInstance derived_from="TIMER" enable="SYSCTL.PCONP.PCTIM2&0x1" id="TIMER2" location="0x40090000"/>
+<peripheralInstance derived_from="TIMER" enable="SYSCTL.PCONP.PCTIM3&0x1" id="TIMER3" location="0x40094000"/>
+<peripheralInstance derived_from="LPC17_RIT" enable="SYSCTL.PCONP.PCRIT&0x1" id="RIT" location="0x400B0000"/>
+<peripheralInstance derived_from="FGPIO" enable="SYSCTL.PCONP.PCGPIO&0x1" id="GPIO0" location="0x2009C000"/>
+<peripheralInstance derived_from="FGPIO" enable="SYSCTL.PCONP.PCGPIO&0x1" id="GPIO1" location="0x2009C020"/>
+<peripheralInstance derived_from="FGPIO" enable="SYSCTL.PCONP.PCGPIO&0x1" id="GPIO2" location="0x2009C040"/>
+<peripheralInstance derived_from="FGPIO" enable="SYSCTL.PCONP.PCGPIO&0x1" id="GPIO3" location="0x2009C060"/>
+<peripheralInstance derived_from="FGPIO" enable="SYSCTL.PCONP.PCGPIO&0x1" id="GPIO4" location="0x2009C080"/>
+<peripheralInstance derived_from="LPC17_I2S" enable="SYSCTL.PCONP&0x08000000" id="I2S" location="0x400A8000"/>
+<peripheralInstance derived_from="LPC17_SYSCTL" id="SYSCTL" location="0x400FC000"/>
+<peripheralInstance derived_from="LPC17_DAC" enable="PCB.PINSEL1.P0_26&0x2=2" id="DAC" location="0x4008C000"/>
+<peripheralInstance derived_from="LPC17xx_UART" enable="SYSCTL.PCONP.PCUART0&0x1" id="UART0" location="0x4000C000"/>
+<peripheralInstance derived_from="LPC17xx_UART_MODEM" enable="SYSCTL.PCONP.PCUART1&0x1" id="UART1" location="0x40010000"/>
+<peripheralInstance derived_from="LPC17xx_UART" enable="SYSCTL.PCONP.PCUART2&0x1" id="UART2" location="0x40098000"/>
+<peripheralInstance derived_from="LPC17xx_UART" enable="SYSCTL.PCONP.PCUART3&0x1" id="UART3" location="0x4009C000"/>
+<peripheralInstance derived_from="SPI" enable="SYSCTL.PCONP.PCSPI&0x1" id="SPI" location="0x40020000"/>
+<peripheralInstance derived_from="LPC17_SSP" enable="SYSCTL.PCONP.PCSSP0&0x1" id="SSP0" location="0x40088000"/>
+<peripheralInstance derived_from="LPC17_SSP" enable="SYSCTL.PCONP.PCSSP1&0x1" id="SSP1" location="0x40030000"/>
+<peripheralInstance derived_from="LPC17_ADC" enable="SYSCTL.PCONP.PCAD&0x1" id="ADC" location="0x40034000"/>
+<peripheralInstance derived_from="LPC17_USBINTST" enable="USBCLKCTL.USBClkCtrl&0x12" id="USBINTSTAT" location="0x400fc1c0"/>
+<peripheralInstance derived_from="LPC17_USB_CLK_CTL" id="USBCLKCTL" location="0x5000cff4"/>
+<peripheralInstance derived_from="LPC17_USBDEV" enable="USBCLKCTL.USBClkSt&0x12=0x12" id="USBDEV" location="0x5000C200"/>
+<peripheralInstance derived_from="LPC17_PWM" enable="SYSCTL.PCONP.PWM1&0x1" id="PWM" location="0x40018000"/>
+<peripheralInstance derived_from="LPC17_I2C" enable="SYSCTL.PCONP.PCI2C0&0x1" id="I2C0" location="0x4001C000"/>
+<peripheralInstance derived_from="LPC17_I2C" enable="SYSCTL.PCONP.PCI2C1&0x1" id="I2C1" location="0x4005C000"/>
+<peripheralInstance derived_from="LPC17_I2C" enable="SYSCTL.PCONP.PCI2C2&0x1" id="I2C2" location="0x400A0000"/>
+<peripheralInstance derived_from="LPC17_DMA" enable="SYSCTL.PCONP.PCGPDMA&0x1" id="DMA" location="0x50004000"/>
+<peripheralInstance derived_from="LPC17_ENET" enable="SYSCTL.PCONP.PCENET&0x1" id="ENET" location="0x50000000"/>
+<peripheralInstance derived_from="CM3_DCR" id="DCR" location="0xE000EDF0"/>
+<peripheralInstance derived_from="LPC17_PCB" id="PCB" location="0x4002c000"/>
+<peripheralInstance derived_from="LPC17_QEI" enable="SYSCTL.PCONP.PCQEI&0x1" id="QEI" location="0x400bc000"/>
+<peripheralInstance derived_from="LPC17_USBHOST" enable="USBCLKCTL.USBClkSt&0x11=0x11" id="USBHOST" location="0x5000C000"/>
+<peripheralInstance derived_from="LPC17_USBOTG" enable="USBCLKCTL.USBClkSt&0x1c=0x1c" id="USBOTG" location="0x5000C000"/>
+<peripheralInstance derived_from="LPC17_RTC" enable="SYSCTL.PCONP.PCRTC&0x1" id="RTC" location="0x40024000"/>
+<peripheralInstance derived_from="MPU" id="MPU" location="0xE000ED90"/>
+<peripheralInstance derived_from="LPC1x_WDT" id="WDT" location="0x40000000"/>
+<peripheralInstance derived_from="LPC17_FLASHCFG" id="FLASHACCEL" location="0x400FC000"/>
+<peripheralInstance derived_from="GPIO_INT" id="GPIOINTMAP" location="0x40028080"/>
+<peripheralInstance derived_from="LPC17_CANAFR" enable="SYSCTL.PCONP.PCCAN1&0x1|SYSCTL.PCONP.PCCAN2&0x1" id="CANAFR" location="0x4003C000"/>
+<peripheralInstance derived_from="LPC17_CANCEN" enable="SYSCTL.PCONP.PCCAN1&0x1|SYSCTL.PCONP.PCCAN2&0x1" id="CANCEN" location="0x40040000"/>
+<peripheralInstance derived_from="LPC17_CANWAKESLEEP" id="CANWAKESLEEP" location="0x400FC110"/>
+<peripheralInstance derived_from="LPC17_CANCON" enable="SYSCTL.PCONP.PCCAN1&0x1" id="CANCON1" location="0x40044000"/>
+<peripheralInstance derived_from="LPC17_CANCON" enable="SYSCTL.PCONP.PCCAN2&0x1" id="CANCON2" location="0x40048000"/>
+<peripheralInstance derived_from="LPC17_MCPWM" enable="SYSCTL.PCONP.PCMCPWM&0x1" id="MCPWM" location="0x400B8000"/>
+<peripheralInstance derived_from="LPC17_FMC" id="FMC" location="0x40084000"/>
</chip>
-<processor><name gcc_name="cortex-m4">Cortex-M4</name>
+<processor><name gcc_name="cortex-m3">Cortex-M3</name>
<family>Cortex-M</family>
</processor>
-<link href="nxp_lpc43xx_peripheral.xme" show="embed" type="simple"/>
+<link href="nxp_lpcxxxx_peripheral.xme" show="embed" type="simple"/>
</info>
</infoList>
</TargetConfig>
diff --git a/demos/host/host_freertos/.project b/demos/host/host_freertos/.project
index 1ca476add..445134f47 100644
--- a/demos/host/host_freertos/.project
+++ b/demos/host/host_freertos/.project
@@ -95,11 +95,6 @@
2
PARENT-3-PROJECT_LOC/vendor/freertos
-
- lwip
- 2
- PARENT-3-PROJECT_LOC/vendor/lwip
-
src
2
diff --git a/demos/host/host_freertos/host_freertos.uvopt b/demos/host/host_freertos/host_freertos.uvopt
index dd5d26eb6..fbee75471 100644
--- a/demos/host/host_freertos/host_freertos.uvopt
+++ b/demos/host/host_freertos/host_freertos.uvopt
@@ -331,7 +331,7 @@
0
0
0
- 100
+ 101
102
0
..\src\main.c
@@ -379,7 +379,7 @@
0
7
0
- 69
+ 70
74
0
..\src\mouse_app.c
@@ -859,7 +859,7 @@
0
0
0
- 106
+ 107
110
0
..\..\..\tinyusb\class\msc_host.c
@@ -881,9 +881,9 @@
1
0
0
- 55
+ 56
0
- 352
+ 353
355
0
..\..\bsp\lpc43xx\CMSIS_LPC43xx_DriverLib\src\lpc43xx_uart.c
@@ -1123,7 +1123,7 @@
0
27
0
- 26
+ 27
29
0
..\..\..\vendor\freertos\freertos\Source\portable\RVDS\ARM_CM4F\port.c
@@ -1163,7 +1163,7 @@
0
5
0
- 52
+ 53
62
0
..\..\..\vendor\fatfs\diskio.c
@@ -1177,10 +1177,10 @@
1
0
0
- 39
+ 83
0
- 1699
- 1730
+ 1711
+ 1718
0
..\..\..\vendor\fatfs\ff.c
ff.c
diff --git a/demos/host/host_os_none/.cproject b/demos/host/host_os_none/.cproject
index a926209d8..569f09885 100644
--- a/demos/host/host_os_none/.cproject
+++ b/demos/host/host_os_none/.cproject
@@ -30,7 +30,7 @@
-
+
-
+
@@ -62,7 +62,7 @@
-
+
@@ -119,7 +119,7 @@
-
+
-
+
@@ -157,7 +157,7 @@
-
+
@@ -216,7 +216,7 @@
-
+
-
+
@@ -250,7 +250,7 @@
-
+
@@ -308,7 +308,7 @@
-
+
-
+
@@ -342,7 +342,7 @@
-
+
@@ -400,7 +400,7 @@
-
+
-
+
@@ -432,7 +432,7 @@
-
+
@@ -489,7 +489,7 @@
-
+
-
+
@@ -524,7 +524,7 @@
-
+
@@ -563,86 +563,73 @@
<?xml version="1.0" encoding="UTF-8"?>
<TargetConfig>
-<Properties property_0="" property_2="LPC18x7_43x7_2x512_BootA.cfx" property_3="NXP" property_4="LPC4357" property_count="5" version="1"/>
-<infoList vendor="NXP"><info chip="LPC4357" flash_driver="LPC18x7_43x7_2x512_BootA.cfx" match_id="0x0" name="LPC4357" resetscript="LPC18LPC43InternalFLASHBootResetscript.scp" stub="crt_emu_lpc18_43_nxp"><chip><name>LPC4357</name>
-<family>LPC43xx</family>
+<Properties property_0="" property_3="NXP" property_4="LPC1769" property_count="5" version="1"/>
+<infoList vendor="NXP"><info chip="LPC1769" match_id="0x26113F37" name="LPC1769" package="lpc17_lqfp100.xml"><chip><name>LPC1769</name>
+<family>LPC17xx</family>
<vendor>NXP (formerly Philips)</vendor>
<reset board="None" core="Real" sys="Real"/>
<clock changeable="TRUE" freq="20MHz" is_accurate="TRUE"/>
<memory can_program="true" id="Flash" is_ro="true" type="Flash"/>
<memory id="RAM" type="RAM"/>
<memory id="Periph" is_volatile="true" type="Peripheral"/>
-<memoryInstance derived_from="Flash" id="MFlashA512" location="0x1a000000" size="0x80000"/>
-<memoryInstance derived_from="Flash" id="MFlashB512" location="0x1b000000" size="0x80000"/>
+<memoryInstance derived_from="Flash" id="MFlash512" location="0x0" size="0x80000"/>
<memoryInstance derived_from="RAM" id="RamLoc32" location="0x10000000" size="0x8000"/>
-<memoryInstance derived_from="RAM" id="RamLoc40" location="0x10080000" size="0xa000"/>
-<memoryInstance derived_from="RAM" id="RamAHB32" location="0x20000000" size="0x8000"/>
-<memoryInstance derived_from="RAM" id="RamAHB16" location="0x20008000" size="0x4000"/>
-<memoryInstance derived_from="RAM" id="RamAHB_ETB16" location="0x2000c000" size="0x4000"/>
-<prog_flash blocksz="0x2000" location="0x1a000000" maxprgbuff="0x400" progwithcode="TRUE" size="0x10000"/>
-<prog_flash blocksz="0x10000" location="0x1a010000" maxprgbuff="0x400" progwithcode="TRUE" size="0x70000"/>
-<prog_flash blocksz="0x2000" location="0x1b000000" maxprgbuff="0x400" progwithcode="TRUE" size="0x10000"/>
-<prog_flash blocksz="0x10000" location="0x1b010000" maxprgbuff="0x400" progwithcode="TRUE" size="0x70000"/>
-<peripheralInstance derived_from="V7M_MPU" id="MPU" location="0xe000ed90"/>
-<peripheralInstance derived_from="V7M_NVIC" id="NVIC" location="0xe000e000"/>
-<peripheralInstance derived_from="V7M_DCR" id="DCR" location="0xe000edf0"/>
-<peripheralInstance derived_from="V7M_ITM" id="ITM" location="0xe0000000"/>
-<peripheralInstance derived_from="SCT" id="SCT" location="0x40000000"/>
-<peripheralInstance derived_from="GPDMA" id="GPDMA" location="0x40002000"/>
-<peripheralInstance derived_from="SPIFI" id="SPIFI" location="0x40003000"/>
-<peripheralInstance derived_from="SDMMC" id="SDMMC" location="0x40004000"/>
-<peripheralInstance derived_from="EMC" id="EMC" location="0x40005000"/>
-<peripheralInstance derived_from="USB0" id="USB0" location="0x40006000"/>
-<peripheralInstance derived_from="USB1" id="USB1" location="0x40007000"/>
-<peripheralInstance derived_from="LCD" id="LCD" location="0x40008000"/>
-<peripheralInstance derived_from="EEPROM" id="EEPROM" location="0x4000e000"/>
-<peripheralInstance derived_from="ETHERNET" id="ETHERNET" location="0x40010000"/>
-<peripheralInstance derived_from="ATIMER" id="ATIMER" location="0x40040000"/>
-<peripheralInstance derived_from="REGFILE" id="REGFILE" location="0x40041000"/>
-<peripheralInstance derived_from="PMC" id="PMC" location="0x40042000"/>
-<peripheralInstance derived_from="CREG" id="CREG" location="0x40043000"/>
-<peripheralInstance derived_from="EVENTROUTER" id="EVENTROUTER" location="0x40044000"/>
-<peripheralInstance derived_from="RTC" id="RTC" location="0x40046000"/>
-<peripheralInstance derived_from="CGU" id="CGU" location="0x40050000"/>
-<peripheralInstance derived_from="CCU1" id="CCU1" location="0x40051000"/>
-<peripheralInstance derived_from="CCU2" id="CCU2" location="0x40052000"/>
-<peripheralInstance derived_from="RGU" id="RGU" location="0x40053000"/>
-<peripheralInstance derived_from="WWDT" id="WWDT" location="0x40080000"/>
-<peripheralInstance derived_from="USART0" id="USART0" location="0x40081000"/>
-<peripheralInstance derived_from="USART2" id="USART2" location="0x400c1000"/>
-<peripheralInstance derived_from="USART3" id="USART3" location="0x400c2000"/>
-<peripheralInstance derived_from="UART1" id="UART1" location="0x40082000"/>
-<peripheralInstance derived_from="SSP0" id="SSP0" location="0x40083000"/>
-<peripheralInstance derived_from="SSP1" id="SSP1" location="0x400c5000"/>
-<peripheralInstance derived_from="TIMER0" id="TIMER0" location="0x40084000"/>
-<peripheralInstance derived_from="TIMER1" id="TIMER1" location="0x40085000"/>
-<peripheralInstance derived_from="TIMER2" id="TIMER2" location="0x400c3000"/>
-<peripheralInstance derived_from="TIMER3" id="TIMER3" location="0x400c4000"/>
-<peripheralInstance derived_from="SCU" id="SCU" location="0x40086000"/>
-<peripheralInstance derived_from="GPIO-PIN-INT" id="GPIO-PIN-INT" location="0x40087000"/>
-<peripheralInstance derived_from="GPIO-GROUP-INT0" id="GPIO-GROUP-INT0" location="0x40088000"/>
-<peripheralInstance derived_from="GPIO-GROUP-INT1" id="GPIO-GROUP-INT1" location="0x40089000"/>
-<peripheralInstance derived_from="MCPWM" id="MCPWM" location="0x400a0000"/>
-<peripheralInstance derived_from="I2C0" id="I2C0" location="0x400a1000"/>
-<peripheralInstance derived_from="I2C1" id="I2C1" location="0x400e0000"/>
-<peripheralInstance derived_from="I2S0" id="I2S0" location="0x400a2000"/>
-<peripheralInstance derived_from="I2S1" id="I2S1" location="0x400a3000"/>
-<peripheralInstance derived_from="C-CAN1" id="C-CAN1" location="0x400a4000"/>
-<peripheralInstance derived_from="RITIMER" id="RITIMER" location="0x400c0000"/>
-<peripheralInstance derived_from="QEI" id="QEI" location="0x400c6000"/>
-<peripheralInstance derived_from="GIMA" id="GIMA" location="0x400c7000"/>
-<peripheralInstance derived_from="DAC" id="DAC" location="0x400e1000"/>
-<peripheralInstance derived_from="C-CAN0" id="C-CAN0" location="0x400e2000"/>
-<peripheralInstance derived_from="ADC0" id="ADC0" location="0x400e3000"/>
-<peripheralInstance derived_from="ADC1" id="ADC1" location="0x400e4000"/>
-<peripheralInstance derived_from="GPIO-PORT" id="GPIO-PORT" location="0x400f4000"/>
-<peripheralInstance derived_from="SPI" id="SPI" location="0x40100000"/>
-<peripheralInstance derived_from="SGPIO" id="SGPIO" location="0x40101000"/>
+<memoryInstance derived_from="RAM" id="RamAHB32" location="0x2007c000" size="0x8000"/>
+<prog_flash blocksz="0x1000" location="0" maxprgbuff="0x1000" progwithcode="TRUE" size="0x10000"/>
+<prog_flash blocksz="0x8000" location="0x10000" maxprgbuff="0x1000" progwithcode="TRUE" size="0x70000"/>
+<peripheralInstance derived_from="LPC17_NVIC" id="NVIC" location="0xE000E000"/>
+<peripheralInstance derived_from="TIMER" enable="SYSCTL.PCONP.PCTIM0&0x1" id="TIMER0" location="0x40004000"/>
+<peripheralInstance derived_from="TIMER" enable="SYSCTL.PCONP.PCTIM1&0x1" id="TIMER1" location="0x40008000"/>
+<peripheralInstance derived_from="TIMER" enable="SYSCTL.PCONP.PCTIM2&0x1" id="TIMER2" location="0x40090000"/>
+<peripheralInstance derived_from="TIMER" enable="SYSCTL.PCONP.PCTIM3&0x1" id="TIMER3" location="0x40094000"/>
+<peripheralInstance derived_from="LPC17_RIT" enable="SYSCTL.PCONP.PCRIT&0x1" id="RIT" location="0x400B0000"/>
+<peripheralInstance derived_from="FGPIO" enable="SYSCTL.PCONP.PCGPIO&0x1" id="GPIO0" location="0x2009C000"/>
+<peripheralInstance derived_from="FGPIO" enable="SYSCTL.PCONP.PCGPIO&0x1" id="GPIO1" location="0x2009C020"/>
+<peripheralInstance derived_from="FGPIO" enable="SYSCTL.PCONP.PCGPIO&0x1" id="GPIO2" location="0x2009C040"/>
+<peripheralInstance derived_from="FGPIO" enable="SYSCTL.PCONP.PCGPIO&0x1" id="GPIO3" location="0x2009C060"/>
+<peripheralInstance derived_from="FGPIO" enable="SYSCTL.PCONP.PCGPIO&0x1" id="GPIO4" location="0x2009C080"/>
+<peripheralInstance derived_from="LPC17_I2S" enable="SYSCTL.PCONP&0x08000000" id="I2S" location="0x400A8000"/>
+<peripheralInstance derived_from="LPC17_SYSCTL" id="SYSCTL" location="0x400FC000"/>
+<peripheralInstance derived_from="LPC17_DAC" enable="PCB.PINSEL1.P0_26&0x2=2" id="DAC" location="0x4008C000"/>
+<peripheralInstance derived_from="LPC17xx_UART" enable="SYSCTL.PCONP.PCUART0&0x1" id="UART0" location="0x4000C000"/>
+<peripheralInstance derived_from="LPC17xx_UART_MODEM" enable="SYSCTL.PCONP.PCUART1&0x1" id="UART1" location="0x40010000"/>
+<peripheralInstance derived_from="LPC17xx_UART" enable="SYSCTL.PCONP.PCUART2&0x1" id="UART2" location="0x40098000"/>
+<peripheralInstance derived_from="LPC17xx_UART" enable="SYSCTL.PCONP.PCUART3&0x1" id="UART3" location="0x4009C000"/>
+<peripheralInstance derived_from="SPI" enable="SYSCTL.PCONP.PCSPI&0x1" id="SPI" location="0x40020000"/>
+<peripheralInstance derived_from="LPC17_SSP" enable="SYSCTL.PCONP.PCSSP0&0x1" id="SSP0" location="0x40088000"/>
+<peripheralInstance derived_from="LPC17_SSP" enable="SYSCTL.PCONP.PCSSP1&0x1" id="SSP1" location="0x40030000"/>
+<peripheralInstance derived_from="LPC17_ADC" enable="SYSCTL.PCONP.PCAD&0x1" id="ADC" location="0x40034000"/>
+<peripheralInstance derived_from="LPC17_USBINTST" enable="USBCLKCTL.USBClkCtrl&0x12" id="USBINTSTAT" location="0x400fc1c0"/>
+<peripheralInstance derived_from="LPC17_USB_CLK_CTL" id="USBCLKCTL" location="0x5000cff4"/>
+<peripheralInstance derived_from="LPC17_USBDEV" enable="USBCLKCTL.USBClkSt&0x12=0x12" id="USBDEV" location="0x5000C200"/>
+<peripheralInstance derived_from="LPC17_PWM" enable="SYSCTL.PCONP.PWM1&0x1" id="PWM" location="0x40018000"/>
+<peripheralInstance derived_from="LPC17_I2C" enable="SYSCTL.PCONP.PCI2C0&0x1" id="I2C0" location="0x4001C000"/>
+<peripheralInstance derived_from="LPC17_I2C" enable="SYSCTL.PCONP.PCI2C1&0x1" id="I2C1" location="0x4005C000"/>
+<peripheralInstance derived_from="LPC17_I2C" enable="SYSCTL.PCONP.PCI2C2&0x1" id="I2C2" location="0x400A0000"/>
+<peripheralInstance derived_from="LPC17_DMA" enable="SYSCTL.PCONP.PCGPDMA&0x1" id="DMA" location="0x50004000"/>
+<peripheralInstance derived_from="LPC17_ENET" enable="SYSCTL.PCONP.PCENET&0x1" id="ENET" location="0x50000000"/>
+<peripheralInstance derived_from="CM3_DCR" id="DCR" location="0xE000EDF0"/>
+<peripheralInstance derived_from="LPC17_PCB" id="PCB" location="0x4002c000"/>
+<peripheralInstance derived_from="LPC17_QEI" enable="SYSCTL.PCONP.PCQEI&0x1" id="QEI" location="0x400bc000"/>
+<peripheralInstance derived_from="LPC17_USBHOST" enable="USBCLKCTL.USBClkSt&0x11=0x11" id="USBHOST" location="0x5000C000"/>
+<peripheralInstance derived_from="LPC17_USBOTG" enable="USBCLKCTL.USBClkSt&0x1c=0x1c" id="USBOTG" location="0x5000C000"/>
+<peripheralInstance derived_from="LPC17_RTC" enable="SYSCTL.PCONP.PCRTC&0x1" id="RTC" location="0x40024000"/>
+<peripheralInstance derived_from="MPU" id="MPU" location="0xE000ED90"/>
+<peripheralInstance derived_from="LPC1x_WDT" id="WDT" location="0x40000000"/>
+<peripheralInstance derived_from="LPC17_FLASHCFG" id="FLASHACCEL" location="0x400FC000"/>
+<peripheralInstance derived_from="GPIO_INT" id="GPIOINTMAP" location="0x40028080"/>
+<peripheralInstance derived_from="LPC17_CANAFR" enable="SYSCTL.PCONP.PCCAN1&0x1|SYSCTL.PCONP.PCCAN2&0x1" id="CANAFR" location="0x4003C000"/>
+<peripheralInstance derived_from="LPC17_CANCEN" enable="SYSCTL.PCONP.PCCAN1&0x1|SYSCTL.PCONP.PCCAN2&0x1" id="CANCEN" location="0x40040000"/>
+<peripheralInstance derived_from="LPC17_CANWAKESLEEP" id="CANWAKESLEEP" location="0x400FC110"/>
+<peripheralInstance derived_from="LPC17_CANCON" enable="SYSCTL.PCONP.PCCAN1&0x1" id="CANCON1" location="0x40044000"/>
+<peripheralInstance derived_from="LPC17_CANCON" enable="SYSCTL.PCONP.PCCAN2&0x1" id="CANCON2" location="0x40048000"/>
+<peripheralInstance derived_from="LPC17_MCPWM" enable="SYSCTL.PCONP.PCMCPWM&0x1" id="MCPWM" location="0x400B8000"/>
+<peripheralInstance derived_from="LPC17_FMC" id="FMC" location="0x40084000"/>
</chip>
-<processor><name gcc_name="cortex-m4">Cortex-M4</name>
+<processor><name gcc_name="cortex-m3">Cortex-M3</name>
<family>Cortex-M</family>
</processor>
-<link href="nxp_lpc43xx_peripheral.xme" show="embed" type="simple"/>
+<link href="nxp_lpcxxxx_peripheral.xme" show="embed" type="simple"/>
</info>
</infoList>
</TargetConfig>
diff --git a/demos/host/host_os_none/host_os_none.ewp b/demos/host/host_os_none/host_os_none.ewp
index bf2616f34..c0e587409 100644
--- a/demos/host/host_os_none/host_os_none.ewp
+++ b/demos/host/host_os_none/host_os_none.ewp
@@ -1,1080 +1,1080 @@
-
-
-
- 2
-
- Board EA4357
-
- ARM
-
- 1
-
- General
- 3
-
- 21
- 1
- 1
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
- ICCARM
- 2
-
- 28
- 1
- 1
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
- AARM
- 2
-
- 8
- 1
- 1
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
- OBJCOPY
- 0
-
- 1
- 1
- 1
-
-
-
-
-
-
-
-
- CUSTOM
- 3
-
-
-
-
-
-
- BICOMP
- 0
-
-
-
- BUILDACTION
- 1
-
-
-
-
-
-
- ILINK
- 0
-
- 15
- 1
- 1
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
- IARCHIVE
- 0
-
- 0
- 1
- 1
-
-
-
-
-
-
- BILINK
- 0
-
-
-
-
- app
-
- $PROJ_DIR$\..\src\cdc_serial_app.c
-
-
- $PROJ_DIR$\..\src\cli.c
-
-
- $PROJ_DIR$\..\src\keyboard_app.c
-
-
- $PROJ_DIR$\..\src\main.c
-
-
- $PROJ_DIR$\..\src\mouse_app.c
-
-
- $PROJ_DIR$\..\src\msc_app.c
-
-
- $PROJ_DIR$\..\src\rndis_app.c
-
-
-
- bsp
-
- boards
-
- $PROJ_DIR$\..\..\bsp\boards\board.c
-
-
- $PROJ_DIR$\..\..\bsp\boards\embedded_artists\board_ea4357.c
-
-
- $PROJ_DIR$\..\..\bsp\boards\microbuilder\board_lpc4357usb.c
-
-
- $PROJ_DIR$\..\..\bsp\boards\ngx\board_ngx4330.c
-
-
- $PROJ_DIR$\..\..\bsp\boards\embedded_artists\oem_base_board\pca9532.c
-
-
- $PROJ_DIR$\..\..\bsp\boards\printf_retarget.c
-
-
-
- lpc43xx
-
- $PROJ_DIR$\..\..\bsp\lpc43xx\CMSIS_LPC43xx_DriverLib\src\lpc43xx_cgu.c
-
-
- $PROJ_DIR$\..\..\bsp\lpc43xx\CMSIS_LPC43xx_DriverLib\src\lpc43xx_gpio.c
-
-
- $PROJ_DIR$\..\..\bsp\lpc43xx\CMSIS_LPC43xx_DriverLib\src\lpc43xx_i2c.c
-
-
- $PROJ_DIR$\..\..\bsp\lpc43xx\CMSIS_LPC43xx_DriverLib\src\lpc43xx_scu.c
-
-
- $PROJ_DIR$\..\..\bsp\lpc43xx\CMSIS_LPC43xx_DriverLib\src\lpc43xx_uart.c
-
-
- $PROJ_DIR$\..\..\bsp\lpc43xx\startup_iar\startup_LPC43xx.s
-
-
- $PROJ_DIR$\..\..\bsp\lpc43xx\CMSIS_LPC43xx_DriverLib\src\system_LPC43xx.c
-
-
-
-
- fatfs
-
- $PROJ_DIR$\..\..\..\vendor\fatfs\ccsbcs.c
-
-
- $PROJ_DIR$\..\..\..\vendor\fatfs\diskio.c
-
-
- $PROJ_DIR$\..\..\..\vendor\fatfs\ff.c
-
-
-
- tinyusb
-
- class
-
- $PROJ_DIR$\..\..\..\tinyusb\class\cdc_host.c
-
-
- $PROJ_DIR$\..\..\..\tinyusb\class\cdc_rndis_host.c
-
-
- $PROJ_DIR$\..\..\..\tinyusb\class\hid_host.c
-
-
- $PROJ_DIR$\..\..\..\tinyusb\class\msc_host.c
-
-
-
- common
-
- $PROJ_DIR$\..\..\..\tinyusb\common\errors.c
-
-
-
- hal
-
- $PROJ_DIR$\..\..\..\tinyusb\hal\hal_lpc11uxx.c
-
-
- $PROJ_DIR$\..\..\..\tinyusb\hal\hal_lpc13uxx.c
-
-
- $PROJ_DIR$\..\..\..\tinyusb\hal\hal_lpc175x_6x.c
-
-
- $PROJ_DIR$\..\..\..\tinyusb\hal\hal_lpc43xx.c
-
-
-
- host
-
- ehci
-
- $PROJ_DIR$\..\..\..\tinyusb\host\ehci\ehci.c
-
-
-
- $PROJ_DIR$\..\..\..\tinyusb\host\hcd.c
-
-
- $PROJ_DIR$\..\..\..\tinyusb\host\hub.c
-
-
- $PROJ_DIR$\..\..\..\tinyusb\host\usbh.c
-
-
-
- osal
-
- $PROJ_DIR$\..\..\..\tinyusb\osal\osal_none.c
-
-
-
- $PROJ_DIR$\..\..\..\tinyusb\tusb.c
-
-
-
-
-
+
+
+
+ 2
+
+ Board EA4357
+
+ ARM
+
+ 1
+
+ General
+ 3
+
+ 21
+ 1
+ 1
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ ICCARM
+ 2
+
+ 28
+ 1
+ 1
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ AARM
+ 2
+
+ 8
+ 1
+ 1
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ OBJCOPY
+ 0
+
+ 1
+ 1
+ 1
+
+
+
+
+
+
+
+
+ CUSTOM
+ 3
+
+
+
+
+
+
+ BICOMP
+ 0
+
+
+
+ BUILDACTION
+ 1
+
+
+
+
+
+
+ ILINK
+ 0
+
+ 15
+ 1
+ 1
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ IARCHIVE
+ 0
+
+ 0
+ 1
+ 1
+
+
+
+
+
+
+ BILINK
+ 0
+
+
+
+
+ app
+
+ $PROJ_DIR$\..\src\cdc_serial_app.c
+
+
+ $PROJ_DIR$\..\src\cli.c
+
+
+ $PROJ_DIR$\..\src\keyboard_app.c
+
+
+ $PROJ_DIR$\..\src\main.c
+
+
+ $PROJ_DIR$\..\src\mouse_app.c
+
+
+ $PROJ_DIR$\..\src\msc_app.c
+
+
+ $PROJ_DIR$\..\src\rndis_app.c
+
+
+
+ bsp
+
+ boards
+
+ $PROJ_DIR$\..\..\bsp\boards\board.c
+
+
+ $PROJ_DIR$\..\..\bsp\boards\embedded_artists\ea4357\board_ea4357.c
+
+
+ $PROJ_DIR$\..\..\bsp\boards\microbuilder\board_lpc4357usb.c
+
+
+ $PROJ_DIR$\..\..\bsp\boards\ngx\board_ngx4330.c
+
+
+ $PROJ_DIR$\..\..\bsp\boards\embedded_artists\oem_base_board\pca9532.c
+
+
+ $PROJ_DIR$\..\..\bsp\boards\printf_retarget.c
+
+
+
+ lpc43xx
+
+ $PROJ_DIR$\..\..\bsp\lpc43xx\CMSIS_LPC43xx_DriverLib\src\lpc43xx_cgu.c
+
+
+ $PROJ_DIR$\..\..\bsp\lpc43xx\CMSIS_LPC43xx_DriverLib\src\lpc43xx_gpio.c
+
+
+ $PROJ_DIR$\..\..\bsp\lpc43xx\CMSIS_LPC43xx_DriverLib\src\lpc43xx_i2c.c
+
+
+ $PROJ_DIR$\..\..\bsp\lpc43xx\CMSIS_LPC43xx_DriverLib\src\lpc43xx_scu.c
+
+
+ $PROJ_DIR$\..\..\bsp\lpc43xx\CMSIS_LPC43xx_DriverLib\src\lpc43xx_uart.c
+
+
+ $PROJ_DIR$\..\..\bsp\lpc43xx\startup_iar\startup_LPC43xx.s
+
+
+ $PROJ_DIR$\..\..\bsp\lpc43xx\CMSIS_LPC43xx_DriverLib\src\system_LPC43xx.c
+
+
+
+
+ fatfs
+
+ $PROJ_DIR$\..\..\..\vendor\fatfs\ccsbcs.c
+
+
+ $PROJ_DIR$\..\..\..\vendor\fatfs\diskio.c
+
+
+ $PROJ_DIR$\..\..\..\vendor\fatfs\ff.c
+
+
+
+ tinyusb
+
+ class
+
+ $PROJ_DIR$\..\..\..\tinyusb\class\cdc_host.c
+
+
+ $PROJ_DIR$\..\..\..\tinyusb\class\cdc_rndis_host.c
+
+
+ $PROJ_DIR$\..\..\..\tinyusb\class\hid_host.c
+
+
+ $PROJ_DIR$\..\..\..\tinyusb\class\msc_host.c
+
+
+
+ common
+
+ $PROJ_DIR$\..\..\..\tinyusb\common\errors.c
+
+
+
+ hal
+
+ $PROJ_DIR$\..\..\..\tinyusb\hal\hal_lpc11uxx.c
+
+
+ $PROJ_DIR$\..\..\..\tinyusb\hal\hal_lpc13uxx.c
+
+
+ $PROJ_DIR$\..\..\..\tinyusb\hal\hal_lpc175x_6x.c
+
+
+ $PROJ_DIR$\..\..\..\tinyusb\hal\hal_lpc43xx.c
+
+
+
+ host
+
+ ehci
+
+ $PROJ_DIR$\..\..\..\tinyusb\host\ehci\ehci.c
+
+
+
+ $PROJ_DIR$\..\..\..\tinyusb\host\hcd.c
+
+
+ $PROJ_DIR$\..\..\..\tinyusb\host\hub.c
+
+
+ $PROJ_DIR$\..\..\..\tinyusb\host\usbh.c
+
+
+
+ osal
+
+ $PROJ_DIR$\..\..\..\tinyusb\osal\osal_none.c
+
+
+
+ $PROJ_DIR$\..\..\..\tinyusb\tusb.c
+
+
+
+
+
diff --git a/vendor/freertos/FreeRTOSConfig.h b/vendor/freertos/FreeRTOSConfig.h
index 9e395069a..e991b3424 100644
--- a/vendor/freertos/FreeRTOSConfig.h
+++ b/vendor/freertos/FreeRTOSConfig.h
@@ -1,10 +1,14 @@
#ifndef __FREERTOS_CONFIG__H
#define __FREERTOS_CONFIG__H
-#ifdef CORE_M4
+#include "hal/hal.h"
+
+#if __CORTEX_M == 4
#include "lpc43xx_m4_FreeRTOSConfig.h"
-#elif defined(CORE_M0)
+#elif __CORTEX_M == 0
#include "lpc43xx_m0_FreeRTOSConfig.h"
+#elif __CORTEX_M == 3
+ #include "FreeRTOSConfig_lpc175x_6x.h"
#else
#error "For LPC43XX one of CORE_M0 or CORE_M4 must be defined!"
#endif /* ifdef CORE_M4 */
diff --git a/vendor/freertos/FreeRTOSConfig_lpc175x_6x.h b/vendor/freertos/FreeRTOSConfig_lpc175x_6x.h
index 88e63f46a..a36848066 100644
--- a/vendor/freertos/FreeRTOSConfig_lpc175x_6x.h
+++ b/vendor/freertos/FreeRTOSConfig_lpc175x_6x.h
@@ -55,25 +55,9 @@
#define FREERTOS_CONFIG_H
#include
+#include "hal/hal.h"
extern uint32_t SystemCoreClock;
-/* Priorities to assign to tasks created by this demo. */
-#define configUART_COMMAND_CONSOLE_TASK_PRIORITY ( 3U )
-#define configSPI_7_SEG_WRITE_TASK_PRIORITY ( 2U )
-#define configI2C_TASK_PRIORITY ( 0U )
-
-/* Stack sizes to assign to tasks created by this demo. */
-#define configUART_COMMAND_CONSOLE_STACK_SIZE ( configMINIMAL_STACK_SIZE * 2 )
-#define configSPI_7_SEG_WRITE_TASK_STACK_SIZE ( configMINIMAL_STACK_SIZE * 2 )
-#define configI2C_TASK_STACK_SIZE ( configMINIMAL_STACK_SIZE * 3 )
-
-/* Dimensions a buffer that can be used by the FreeRTOS+CLI command
-interpreter. Set this value to 1 to save RAM if FreeRTOS+CLI does not supply
-the output butter. See the FreeRTOS+CLI documentation for more information:
-http://www.FreeRTOS.org/FreeRTOS-Plus/FreeRTOS_Plus_CLI/ */
-#define configCOMMAND_INT_MAX_OUTPUT_SIZE 1024
-
-
/*-----------------------------------------------------------
* Application specific definitions.
*
@@ -90,8 +74,8 @@ http://www.FreeRTOS.org/FreeRTOS-Plus/FreeRTOS_Plus_CLI/ */
#define configCPU_CLOCK_HZ ( SystemCoreClock )
#define configTICK_RATE_HZ ( ( portTickType ) 1000 )
#define configMINIMAL_STACK_SIZE ( ( unsigned short ) 90 )
-#define configTOTAL_HEAP_SIZE ( ( size_t ) ( 15 * 1024 ) ) /* Has not effect in this demo as the heap is manually pointed to AHB RAM. */
-#define configMAX_TASK_NAME_LEN ( 12 )
+#define configTOTAL_HEAP_SIZE ( ( size_t ) ( 16 * 1024 ) )
+#define configMAX_TASK_NAME_LEN ( 32 )
#define configIDLE_SHOULD_YIELD 0
#define configQUEUE_REGISTRY_SIZE 10
#define configUSE_TRACE_FACILITY 1
@@ -111,17 +95,17 @@ http://www.FreeRTOS.org/FreeRTOS-Plus/FreeRTOS_Plus_CLI/ */
/* Software timer related definitions. */
-#define configUSE_TIMERS 1
+#define configUSE_TIMERS 0
#define configTIMER_TASK_PRIORITY ( configMAX_PRIORITIES - 3 )
#define configTIMER_QUEUE_LENGTH 10
#define configTIMER_TASK_STACK_DEPTH configMINIMAL_STACK_SIZE
/* Run time stats gathering definitions. */
-void vMainConfigureTimerForRunTimeStats( void );
-uint32_t ulMainGetRunTimeCounterValue( void );
-#define configGENERATE_RUN_TIME_STATS 1
-#define portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() vMainConfigureTimerForRunTimeStats()
-#define portGET_RUN_TIME_COUNTER_VALUE() ulMainGetRunTimeCounterValue()
+//void vMainConfigureTimerForRunTimeStats( void );
+//uint32_t ulMainGetRunTimeCounterValue( void );
+//#define configGENERATE_RUN_TIME_STATS 1
+//#define portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() vMainConfigureTimerForRunTimeStats()
+//#define portGET_RUN_TIME_COUNTER_VALUE() ulMainGetRunTimeCounterValue()
/* Set the following definitions to 1 to include the API function, or zero
diff --git a/vendor/freertos/freertos/Source/include/portable.h b/vendor/freertos/freertos/Source/include/portable.h
index 79919c01f..390a7793e 100644
--- a/vendor/freertos/freertos/Source/include/portable.h
+++ b/vendor/freertos/freertos/Source/include/portable.h
@@ -318,8 +318,10 @@
#include "tusb_option.h"
#ifdef __GNUC__
- #if TUSB_CFG_MCU==MCU_LPC43XX // TODO M0 M4
+ #if __CORTEX_M == 4 // TODO M0 M4
#include "../portable/GCC/ARM_CM4F/portmacro.h"
+ #elif __CORTEX_M == 3
+ #include "../portable/GCC/ARM_CM3/portmacro.h"
#else
#error portmacro.h for mcu is not supported yet
#endif
diff --git a/vendor/freertos/lpc43xx_m4_FreeRTOSConfig.h b/vendor/freertos/lpc43xx_m4_FreeRTOSConfig.h
index 3669230b2..143526c9c 100644
--- a/vendor/freertos/lpc43xx_m4_FreeRTOSConfig.h
+++ b/vendor/freertos/lpc43xx_m4_FreeRTOSConfig.h
@@ -120,8 +120,7 @@ to exclude the API function. */
/* Cortex-M specific definitions. */
#ifdef __NVIC_PRIO_BITS
- /* __BVIC_PRIO_BITS will be specified when CMSIS is being used. */
- #define configPRIO_BITS __NVIC_PRIO_BITS
+ #define configPRIO_BITS __NVIC_PRIO_BITS
#else
#define configPRIO_BITS 5 /* 32 priority levels */
#endif