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support ra2a1 pipe numbering, fix ra2a1 ek led/button. Though usb not enumerated yet, probably due to bsp/clock setup

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This commit is contained in:
hathach
2024-04-10 19:17:23 +07:00
parent fb69d80e70
commit 241e436d19
4 changed files with 42 additions and 48 deletions
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4
hw/bsp/ra/boards/ra2a1_ek/board.h
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@@ -31,10 +31,10 @@
extern "C" {
#endif
#define LED1 BSP_IO_PORT_01_PIN_06
#define LED1 BSP_IO_PORT_02_PIN_05
#define LED_STATE_ON 1
#define SW1 BSP_IO_PORT_01_PIN_05
#define SW1 BSP_IO_PORT_02_PIN_06
#define BUTTON_STATE_ACTIVE 0
static const ioport_pin_cfg_t board_pin_cfg[] = {

3
hw/bsp/ra/family.c
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@@ -64,8 +64,11 @@ BSP_DONT_REMOVE BSP_PLACE_IN_SECTION(BSP_SECTION_APPLICATION_VECTORS)
const fsp_vector_t g_vector_table[BSP_ICU_VECTOR_MAX_ENTRIES] = {
[0] = usbfs_interrupt_handler, /* USBFS INT (USBFS interrupt) */
[1] = usbfs_resume_handler, /* USBFS RESUME (USBFS resume interrupt) */
#ifndef BSP_MCU_GROUP_RA2A1
[2] = usbfs_d0fifo_handler, /* USBFS FIFO 0 (DMA transfer request 0) */
[3] = usbfs_d1fifo_handler, /* USBFS FIFO 1 (DMA transfer request 1) */
#endif
#ifdef BOARD_HAS_USB_HIGHSPEED
[4] = usbhs_interrupt_handler, /* USBHS INT (USBHS interrupt) */

3
hw/bsp/ra/vector_data.h
View File

@@ -9,8 +9,11 @@ extern "C" {
/* ISR prototypes */
void usbfs_interrupt_handler(void);
void usbfs_resume_handler(void);
#ifndef BSP_MCU_GROUP_RA2A1
void usbfs_d0fifo_handler(void);
void usbfs_d1fifo_handler(void);
#endif
#ifdef BOARD_HAS_USB_HIGHSPEED
void usbhs_interrupt_handler(void);

80
src/portable/renesas/rusb2/dcd_rusb2.c
View File

@@ -89,6 +89,10 @@ static dcd_data_t _dcd;
// INTERNAL OBJECT & FUNCTION DECLARATION
//--------------------------------------------------------------------+
enum {
PIPE_COUNT = 10,
};
// Transfer conditions specifiable for each pipe for most MCUs
// - Pipe 0: Control transfer with 64-byte single buffer
// - Pipes 1 and 2: Bulk or ISO
@@ -97,44 +101,33 @@ static dcd_data_t _dcd;
//
// Note: for small mcu such as
// - RA2A1: only pipe 4-7 are available, and no support for ISO
enum {
PIPE_LAST_ISO = 2,
PIPE_LAST_BULK = 5,
PIPE_LAST_INTERRUPT = 9,
PIPE_COUNT = 10,
};
static unsigned find_pipe(unsigned xfer_type) {
switch (xfer_type) {
case TUSB_XFER_ISOCHRONOUS:
for (int i = PIPE_LAST_ISO; i > 0; i--) {
if (0 == _dcd.pipe[i].ep) return i;
}
break;
#if defined(BSP_MCU_GROUP_RA2A1)
const uint8_t pipe_idx_arr[4][2] = {
{ 0, 0 }, // Control
{ 0, 0 }, // Isochronous not supported
{ 4, 5 }, // Bulk
{ 6, 7 }, // Interrupt
};
#else
const uint8_t pipe_idx_arr[4][2] = {
{ 0, 0 }, // Control
{ 1, 2 }, // Isochronous
{ 1, 5 }, // Bulk
{ 6, 9 }, // Interrupt
};
#endif
case TUSB_XFER_BULK:
// find backward since only pipe 1, 2 support ISO
for (int i = PIPE_LAST_BULK; i > 0; i--) {
if (0 == _dcd.pipe[i].ep) return i;
}
break;
case TUSB_XFER_INTERRUPT:
for(int i = PIPE_LAST_INTERRUPT; i > PIPE_LAST_BULK; i--) {
if (0 == _dcd.pipe[i].ep) return i;
}
break;
default:
/* No support for control transfer */
break;
// find backward since only pipe 1, 2 support ISO
const uint8_t* idx = pipe_idx_arr[xfer_type];
for (int i = idx[1]; i >= idx[0]; i--) {
if (0 == _dcd.pipe[i].ep) return i;
}
return 0;
}
static volatile uint16_t* get_pipectr(rusb2_reg_t *rusb, unsigned num)
{
static volatile uint16_t* get_pipectr(rusb2_reg_t *rusb, unsigned num) {
if (num) {
return (volatile uint16_t*)&(rusb->PIPE_CTR[num - 1]);
} else {
@@ -142,8 +135,7 @@ static volatile uint16_t* get_pipectr(rusb2_reg_t *rusb, unsigned num)
}
}
static volatile reg_pipetre_t* get_pipetre(rusb2_reg_t *rusb, unsigned num)
{
static volatile reg_pipetre_t* get_pipetre(rusb2_reg_t *rusb, unsigned num) {
volatile reg_pipetre_t* tre = NULL;
if ((1 <= num) && (num <= 5)) {
tre = (volatile reg_pipetre_t*)&(rusb->PIPE_TR[num - 1].E);
@@ -151,8 +143,7 @@ static volatile reg_pipetre_t* get_pipetre(rusb2_reg_t *rusb, unsigned num)
return tre;
}
static volatile uint16_t* ep_addr_to_pipectr(uint8_t rhport, unsigned ep_addr)
{
static volatile uint16_t* ep_addr_to_pipectr(uint8_t rhport, unsigned ep_addr) {
rusb2_reg_t *rusb = RUSB2_REG(rhport);
const unsigned epn = tu_edpt_number(ep_addr);
@@ -165,19 +156,16 @@ static volatile uint16_t* ep_addr_to_pipectr(uint8_t rhport, unsigned ep_addr)
}
}
static uint16_t edpt0_max_packet_size(rusb2_reg_t* rusb)
{
static uint16_t edpt0_max_packet_size(rusb2_reg_t* rusb) {
return rusb->DCPMAXP_b.MXPS;
}
static uint16_t edpt_max_packet_size(rusb2_reg_t *rusb, unsigned num)
{
static uint16_t edpt_max_packet_size(rusb2_reg_t *rusb, unsigned num) {
rusb->PIPESEL = num;
return rusb->PIPEMAXP;
}
static inline void pipe_wait_for_ready(rusb2_reg_t * rusb, unsigned num)
{
static inline void pipe_wait_for_ready(rusb2_reg_t * rusb, unsigned num) {
while ( rusb->D0FIFOSEL_b.CURPIPE != num ) {}
while ( !rusb->D0FIFOCTR_b.FRDY ) {}
}
@@ -1026,10 +1014,10 @@ void dcd_int_handler(uint8_t rhport)
/* clear active bits (don't write 0 to already cleared bits according to the HW manual) */
rusb->BRDYSTS = ~s;
for (unsigned pipe = 0; pipe < PIPE_COUNT; ++pipe) {
if (tu_bit_test(s, pipe)) {
process_pipe_brdy(rhport, pipe);
s = tu_bit_clear(s, pipe);
for (unsigned p = 0; p < PIPE_COUNT; ++p) {
if (tu_bit_test(s, p)) {
process_pipe_brdy(rhport, p);
s = tu_bit_clear(s, p);
}
}
}